STP9NC60 STP9NC60FP N - CHANNEL 600V - 0.6Ω - 9A TO-220/TO-220FP PowerMESH ΙΙ MOSFET T YPE STP9NC60 STP9NC60FP ν ν ν ν ν V DSS R DS(on) ID 600 V 600 V < 0.75 Ω < 0.75 Ω 9.0 A 5.2 A TYPICAL RDS(on) = 0.6 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED NEW HIGH VOLTAGE BENCHMARK GATE CHARGE MINIMIZED 3 DESCRIPTION The PowerMESH II is the evolution of the first generation of MESH OVERLAY . The layout refinements introduced greatly improve the Ron*area figure of merit while keeping the device at the leading edge for what concerns switching speed, gate charge and ruggedness. 1 3 2 2 1 TO-220 TO-220FP INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ν HIGH CURRENT, HIGH SPEED SWITCHING ν SWITH MODE POWER SUPPLIES (SMPS) ν DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVER ABSOLUTE MAXIMUM RATINGS Symb ol V DS Parameter Value ST P9NC60 STP9NC60F P Unit Drain-source Voltage (VGS = 0) 600 V Drain- gate Voltage (R GS = 20 kΩ) G ate-source Voltage Drain Current (continuous) at Tc = 25 o C 600 ± 30 9.0 5.2 V V A Drain Current (continuous) at Tc = 100 C 5.7 3.3 A Drain Current (pulsed) T otal Dissipation at T c = 25 o C 36 125 36 40 A W Derating Factor Peak Diode Recovery voltage slope 1.0 4.5 0.32 4.5 W/ C V/ns V ISO Insulation Withstand Voltage (DC) T s tg Tj Storage Temperature Max. O perating Junction Temperature V DGR V GS ID ID I DM (•) P tot dv/dt( 1 ) o (•) Pulse width limited by safe operating area February 2000 2000 -65 to 150 150 o V o o C C (1) ISD ≤ 9A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX 1/9 STP9NC60/FP THERMAL DATA R thj- ca se R t hj-a mb R thc -sin k Tl Thermal Resistance Junction-case T O- 220 T O-220F P 1.0 3.12 Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature For Soldering Purpose o C/W 62.5 0.5 300 o C/W C/W o C Max Valu e Unit 9 A 850 mJ o AVALANCHE CHARACTERISTICS Symbo l Parameter I AR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by T j max, δ < 1%) E AS Single Pulse Avalanche Energy o (starting Tj = 25 C, I D = IAR , V DD = 50 V) ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbo l V ( BR)DSS I DSS I GSS Parameter Drain-source Breakdown Voltage Test Cond itions ID = 250 µA Typ . Max. 600 V GS = 0 VDS = Max Rating Zero G ate Voltage Drain Current (V GS = 0) VDS = Max Rating Gate-body Leakage Current (VDS = 0) Min. Un it V o Tc = 125 C VGS = ± 30 V 1 50 µA µA ± 100 nA ON (∗) Symbo l Parameter Test Cond itions V GS(th ) Gate Threshold Voltage VDS = V GS ID = 250 µA R DS(on ) Static Drain-source On Resistance VGS = 10V ID = 4 A I D(on) On State Drain Current VDS > I D(on ) x R DS(on )max VGS = 10 V Min. Typ . Max. Un it 2 3 4 V 0.6 0.75 Ω 9.0 A DYNAMIC Symbo l g fs (∗) C is s C os s C rs s 2/9 Parameter Test Cond itions Forward Transconductance VDS > I D(on ) x R DS(on )max Input Capacitance Output Capacitance Reverse T ransfer Capacitance VDS = 25 V f = 1 MHz ID = 4 A V GS = 0 Min. Typ . Max. Un it 10 S 1400 196 31 pF pF pF STP9NC60/FP ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l Parameter Test Cond itions Min. Typ . Max. Un it t d( on) tr Turn-on Delay T ime Rise Time VDD = 300 V I D = 4.5 A VGS = 10 V R G = 4.7 Ω (Resistive Load, see fig. 3) 28 15 ns ns Qg Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = 480 V I D = 9.0 A V GS = 10 V 44 10.5 19.5 62 nC nC nC Typ . Max. Un it SWITCHING OFF Symbo l Parameter Test Cond itions Min. t d( off ) tf Turn-off Delay Time Fall T ime VDD = 300 V I D = 4.5 A VGS = 10 V R G = 4.7 Ω (Resistive Load, see fig. 3) 53 30 ns ns t r(Vof f ) tf tc Off-voltage Rise Time Fall T ime Cross-over Time VDD = 480 V I D = 9.0 A V GS = 10 V R G = 4.7 Ω (I nductive Load, see fig. 5) 15 12 24 ns ns ns SOURCE DRAIN DIODE Symbo l Parameter Test Cond itions I SD I SDM (•) Source-drain Current Source-drain Current (pulsed) V SD (∗) Forward O n Voltage ISD = 9 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current di/dt = 100 A/µs ISD = 9 A o T j = 150 C VDD = 100 V (see test circuit, fig. 5) t rr Q rr IRRM Min. Typ . V GS = 0 Max. Un it 9.0 36 A A 1.6 V 610 ns 5.4 µC 17 A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area Safe Operating Area for TO-220 Safe Operating Area for TO-220FP 3/9 STP9NC60/FP Thermal Impedance for TO-220 Thermal Impedance forTO-220FP Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance 4/9 STP9NC60/FP Gate Charge vs Gate-source Voltage Capacitance Variations Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/9 STP9NC60/FP Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9 STP9NC60/FP TO-220 MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 4.40 4.60 0.173 0.1 81 C 1.23 1.32 0.048 0.0 51 D 2.40 2.72 0.094 D1 0.1 07 1.27 0.050 E 0.49 0.70 0.019 0.0 27 F 0.61 0.88 0.024 0.0 34 F1 1.14 1.70 0.044 0.0 67 F2 1.14 1.70 0.044 0.0 67 G 4.95 5.15 0.194 0.2 03 G1 2.4 2.7 0.094 0.1 06 H2 10.0 1 0.4 0 0.393 0.4 09 14.0 0.511 L2 16.4 L4 0.645 13.0 0.5 51 2.65 2.95 0.104 0.1 16 L6 15.2 5 1 5.7 5 0.600 0.6 20 L7 6.2 6.6 0.244 0.2 60 L9 3.5 3.93 0.137 0.1 54 DIA. 3.75 3.85 0.147 0.1 51 D1 C D A E L5 H2 G G1 F1 L2 F2 F Dia. L5 L9 L7 L6 L4 P011C 7/9 STP9NC60/FP TO-220FP MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 4.4 4.6 0.173 0.1 81 B 2.5 2.7 0.098 0.1 06 D 2.5 2.75 0.098 0.1 08 E 0.45 0.7 0.017 0.0 27 F 0.75 1 0.030 0.0 39 F1 1.15 1.7 0.045 0.0 67 F2 1.15 1.7 0.045 0.0 67 G 4.95 5.2 0.195 0.2 04 G1 2.4 2.7 0.094 0.1 06 H 10 10.4 0.393 0.4 09 L2 16 0.630 28.6 30.6 1.126 1.2 04 L4 9.8 10.6 0.385 0.4 17 L6 15.9 16.4 0.626 0.6 45 L7 9 9.3 0.354 0.3 66 Ø 3 3.2 0.118 0.1 26 B D A E L3 L3 L6 F F1 L7 F2 H G G1 ¯ 1 2 3 L2 8/9 L4 STP9NC60/FP Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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