U2008B Low Cost Current Feedback Phase Control Circuit Description The U2008B is designed as a phase control circuit in bipolar technology. It enables load-current detection as well as mains-compensated phase control. Motor control with load-current feedback and overload protection are preferred applications. Features D Full wave current sensing D Internal supply-voltage monitoring D Current requirement 3 mA v D Mains supply variation compensated D Variable soft-start or load-current sensing Applications D Voltage and current synchronization D Automatic retriggering switchable D Low cost motor control D Domestic appliance D Triggering pulse typ. 125 mA Package: DIP8, SO8 Block Diagram 22 kW/2W BYT51K 230 V ~ R1 R2 330 kW D1 amax R8 1 MW 96 11643 Load 7 Limiting detector 6 Mains voltage compensation Voltage detector Automatic retriggering Current detector TIC 226 R3 Phase control unit 5 ö = f (V3) Supply voltage limiting 8 180W 1 Full wave load current detector + 2 4 C3 3.3 nF C4 100 nF C1 GND Reference voltage R14 47 kW 3 R10 R6 – 22 mF/ 25 V Voltage monitoring Soft start ^ V(R6) = ±250 mV –VS 100 kW Load current compensation Set point P1 50 kW R7 12 kW Figure 1. Block diagram with typical circuit: Load current sensing TELEFUNKEN Semiconductors Rev. A1, 28-May-96 1 (10) U2008B 22 kW/2W 230 V ~ R1 L BYT51K D1 amax R2 680 kW R8 470 kW 96 11644 Load 7 Limiting detector 6 Mains voltage compensation Voltage detector Automatic retriggering Phase control unit ö = f (V3) Current detector TIC 226 R3 5 C1 Supply voltage limiting 8 180W 1 Full wave load current detector + 2 4 GND Reference voltage – 3 R10 Soft start 4.7mF/ 25 V 100 mF/ 25 V Voltage monitoring Soft start C5 –VS C3 C4 10 nF 100 nF 68 kW Set point P1 50 kW R7 220 kW N Figure 2. Block diagram with typical circuit: Soft start 2 (10) TELEFUNKEN Semiconductors Rev. A1, 28-May-96 U2008B Pin Description Isense 1 8 Output Cϕ 2 7 Vsync. Control 3 6 Rϕ GND 4 5 *V S Pin 1 2 3 Symbol Isense Cϕ Control 4 5 6 7 8 GND –VS Rϕ Vsync. Output Function Load current sensing Ramp voltage Control input / compensation output Ground Supply voltage Ramp current adjustment Voltage synchronization Trigger output 95 11405 Mains Supply, Pin 5, Figure 2 The integrated circuit U2008B, which also contains voltage limiting, can be connected via D1 and R1 via the mains supply. Supply voltage between Pin 4 (pos., ) and Pin 5 is smoothed by C1. ă * * Series resistance R1 can be calculated as follows: R 1max whereas VM VSmax Itot + 0.85 x V 2–xVI M Smax tot + Mains voltage + Maximum supply voltage + I )I = Total current compensation Smax x The appendix provides further information regarding the design (see figures 10, 11 and 12). An operation with external stabilized DC voltage is not recommended. Voltage Monitoring As the voltage is built up, uncontrolled output pulses are avoided by internal voltage monitoring. Apart from that all the latches in the circuit (phase control, load limit regulation) are reset and the soft-start capacitor is short circuited. This guarantees a specified start-up behavior each time the supply voltage is switched on or after short interruptions of the mains supply. Soft-start is initiated after the supply voltage has been built up. This behavior guarantees a gentle start-up for the motor and automatically ensures the optimum run-up time. Phase Control, Pin 6 trigger pulse is derived by comparing the ramp voltage V2 at Pin 2 with the set value on the control input, Pin 3. The slope of the ramp is determined by C and its charging current I . The charging current can be regulated, changed, altered using R at Pin 6. The maximum phase angle, αmax, (minimum current flow angle min) can also be adjusted by using R (see figure 4). When the potential on Pin 2 reaches the set point level of Pin 3, a trigger pulse is generated whose pulse width, tp, is determined from the value of C (tp = 9 s/nF, see figure 6). At the same time, a latch is set with the output pulse, as long as the automatic retriggering has not been activated, then no more pulses can be generated in that half cycle. Control input at Pin 3 (with respect to Pin 4) has an active range from –9 V to –1 V. When V3 = –9 V, then the phase angle is at its maximum αmax i.e., the current flow angle is minimum. The minimum phase angle αmin is set with V3 –1 V. w Automatic Retriggering The current-detector circuit monitors the state of the triac after triggering by measuring the voltage drop at the triac gate. A current flow through the triac is recognized, when the voltage drop exceeds a threshold level of typ. 40 mV. If the triac is quenched within the relevant half-wave after triggering; for example owing to low load currents before or after the zero crossing of current wave or; for commutator motors, owing to brush lifters. Then the automatic retriggering circuit ensures immediate retriggering, if necessary with a high repetition rate, tpp/tp, until the triac remains reliably triggered. The function of the phase control is largely identical to the well known IC family TEA1007. The phase angle of the TELEFUNKEN Semiconductors Rev. A1, 28-May-96 3 (10) U2008B Current Synchronization, Pin 8 Mains 96 11645 Current synchronization fulfils two functions: * Monitoring the current flow after triggering. In case the triac extinguishes again or it does not switch on, automatic triggering is activated as long as triggering is successful. * Avoiding triggering due to inductive load. In the case of inductive load operation the current synchronization ensures that in the new half wave no pulse is enabled as long as there is a current available from the previous half-wave, which flows from the opposite polarity to the actual supply voltage. A special feature of the IC is the realization of current synchronization. The device evaluates the voltage at the pulse output between the gate and reference electrode of the triac. This results in saving separate current synchronization input with specified series resistance. Voltage Synchronization with Mains Voltage Compensation, Pin 7 The voltage detector synchronizes the reference ramp with the mains supply voltage. At the same time, the mains dependent input current at Pin 7 is shaped and rectified internally. This current activates the automatic retriggering and at the same time is available at Pin 3 (see figure 8). By suitable dimensioning, it is possible to attain the specified compensation effect. Automatic retriggering and mains voltage compensation are not activated until |V7 – 4| increases to 8 V. Resistance, Rsync., defines the width of the zero voltage cross-over pulse, synchronization current, and hence the mains supply voltage compensation current. If the mains voltage compensation and the automatic retriggering are not required, both functions can be suppressed by limiting |V7 – 4| 7 V (see figure 3). v 4 (10) R2 7 2x BZX55 C6V2 U2008B 4 Figure 3. Suppression of automatic retriggering and mains voltage compensation A further feature of the IC is the selection between softstart or load-current compensation. Soft-start is possible by connecting a capacitor between Pin 1 and Pin 4, see figure 7. In the case of load current compensation, Pin 1 is directly connected with resistance R6, which is used for sensing load current. Load Current Detection, Pin 1 The circuit continuously measures the load current as a voltage drop at resistance R6. The evaluation and use of both half waves results in a quick reaction to load current change. Due to voltage at resistance R6, there is an increase of input current at Pin 1. This current increase controls the internal current source, whose positive current values is available at Pin 3 (see figure 9). The output current generated at Pin 3 contains the difference from the load-current detection and from the mains-voltage compensation (see figure 1). The effective control voltage is the final current at Pin 3 together with the desired value network. An increase of mains voltage causes the increase of control angle α. An increase of load current results in a decrease in the control angle. This avoids a decrease in revolution by increasing the load as well as the increase of revolution by the increment of mains supply voltage. TELEFUNKEN Semiconductors Rev. A1, 28-May-96 U2008B Absolute Maximum Ratings VS = 14 V, reference point Pin 4, unless otherwise specified Parameters Current limitation Pin 5 t 10 ms Sync. currents Pin 7 t 10 ms Phase control Pin 3 Control voltage Input current Charge current Pin 6 Load current monitoring / Soft-start Input current Input voltage Pulse output Input voltage Pin 8 v Symbol –IS –iS IsyncV isyncV Value 30 100 5 20 Unit mA –VI – I ϕmax VS to 0 500 0.5 V A mA II VI 1 –40 to + 125 mA V " " v " II mA m Pin 1 +VI –VI Tstg Tj Storage temperature range Junction temperature range 2 VS 40 to 125 10 to 125 * * V ) ) C C Thermal Resistance Parameters Junction ambient DIP8 SO8 on p.c. SO8 on ceramic Symbol RthJA Value 110 220 140 Unit K/W Electrical Characteristics VS + –13 V, T amb = 25°C, reference point Pin 4, unless otherwise specified Parameters Supply Supply voltage limitation Current requirement Voltage monitoring Turn-on threshold Phase control Input current Voltage limitation Test Conditions / Pins Pin 5 –IS = 3.5 mA –IS = 30 mA Pins 1, 4 and 7 open Pin 5 Symbol Min. –VS 14.5 14.6 " TELEFUNKEN Semiconductors Rev. A1, 28-May-96 Pin 7 Pin 8 Pin 7 Max. Unit 16.5 16.8 3.0 V mA 11.3 12.3 V 0.15 2 30 9.0 mA mA V –IS –VTON Voltage sync. Current sync. IL = 2 mA Typ. "IsyncV "IsyncI "VsyncV 3 8.0 8.5 5 (10) U2008B Parameters Reference ramp, figure 4 Charge current Start voltage Temperature coefficient of start voltage Rϕ − reference voltage Temperature coefficient Pulse output, figure 5 Output pulse current Output pulse width Automatic retriggering Turn-on threshold voltage Repetition rate Test Conditions / Pins I ϕ = Α I ϕ = Α I ϕ = Α Symbol Min. Typ. Max. Unit Pin 7 Pin 2 Iϕ –Vmax 1 1.85 1.95 100 2.05 A V Pin 2 Pins 6 – 5 Pin 6 –TCR VRϕ TCVRϕ 0.96 1.10 %/K V %/K Pin 8 V8 = – 1.2 V RGT = 0 C3 = 3.3 nF, VS = Vlimit Pin 8 I7 w 150 A Soft start, figure 7 Pin 1 Starting current V1-4 = 8 V Final current V1-4 = –2 V Discharge current Output current Pin 3 Supply voltage compensation, figure 8 Current transfer gain I7/I3 Pins 7, Pin 3 Pins 1 and 2 open Reverse current V(R6) = V3 = V7 = 0 Pin 3 Load current detection, V7 = 0, figure 9 Transfer gain I3/V1 Offset current V1 = 0,V3 = –8 V Pin 3 Input voltage Pin 1 Input offset voltage Pin 1 6 (10) I0 tp "VION 100 –0.003 1.02 0.03 0.06 125 30 150 mA s 5 60 7.5 mV tp 15 40 A A mA mA tpp 20 3 I0 I0 –I0 –I0 5 15 0.5 0.2 10 25 Gi 14 17 2 "IR 20 2 A G 0.280 0.320 0.370 A/mV I0 –VI V0 0 300 3 6 400 6 A mV mV " TELEFUNKEN Semiconductors Rev. A1, 28-May-96 U2008B 1 250 Option Softstart 200 33 nF 6.8 nF 4.7 nF 3.3 nF 2.2 nF –1 V1–4 ( V ) Phase angle a (° ) 10 nF 0 150 100 C5=1mF 10mF –2 Cö/ t = 1.5 nF –3 Supply R1=22kW/2W C1=100mF/25V 4.7mF –4 50 –5 0 0 200 400 600 800 Rö ( kW ) 96 11797 0 1000 1 2 3 5 4 t(s) 95 10337 Figure 7. Figure 4. 0 120 Pulse Output VGT=–1.2V 100 40 I 5 (mA ) IGT ( mA ) 80 60 80 120 40 Mains Supply 160 Compensation Pins 1 and 2 open Vs=–13V 200 –2 –1 20 0 0 200 400 600 800 1000 RGT ( W ) 95 10338 2 1 I15 ( mA ) Figure 8. 100 400 Max. Series Resistance VM=230V Output Pulse Width Dtp/DCö=9ms/nF 80 R 1max (k W ) 300 t p ( ms ) 0 95 10342 Figure 5. 200 100 60 40 20 0 0 0 95 10339 Reference Point Pin 10 10 20 Cö = ( nF ) Figure 6. TELEFUNKEN Semiconductors Rev. A1, 28-May-96 30 0 95 10349 2 4 6 8 10 IS ( mA ) Figure 9. 7 (10) U2008B 200 10 Power Dissipation at Series Resistance 8 PV ( W ) 160 I5 ( m A ) Reference Point Pin 8 Load Current Detection V6=VRef=V8 VS=–13V V15=V10=0V 120 6 80 4 40 2 0 0 –400 –200 0 400 200 0 V(R6) ( mV ) 95 10343 95 10350 Figure 10. 3 6 9 12 15 IS ( mA ) Figure 12. revolution 10 Power Dissipation at Series Resistance R1 PV ( W ) 8 6 4 2 0 0 95 10348 10 20 30 R1 ( kW ) 40 50 Figure 11. 8 (10) TELEFUNKEN Semiconductors Rev. A1, 28-May-96 U2008B Dimensions in mm Package: DIP8 94 8873 Package: SO8 94 8862 TELEFUNKEN Semiconductors Rev. A1, 28-May-96 9 (10) U2008B Ozone Depleting Substances Policy Statement It is the policy of TEMIC TELEFUNKEN microelectronic GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances ( ODSs). The Montreal Protocol ( 1987) and its London Amendments ( 1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. TEMIC TELEFUNKEN microelectronic GmbH semiconductor division has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2 . Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency ( EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C ( transitional substances ) respectively. TEMIC can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances. We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. TEMIC TELEFUNKEN microelectronic GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 ( 0 ) 7131 67 2831, Fax number: 49 ( 0 ) 7131 67 2423 10 (10) TELEFUNKEN Semiconductors Rev. A1, 28-May-96