Freescale Semiconductor Technical Data Document Number: MRF1535N Rev. 10, 9/2006 RF Power Field Effect Transistors MRF1535NT1 MRF1535FNT1 N - Channel Enhancement - Mode Lateral MOSFETs Designed for broadband commercial and industrial applications with frequencies to 520 MHz. The high gain and broadband performance of these devices make them ideal for large - signal, common source amplifier applications in 12.5 volt mobile FM equipment. • Specified Performance @ 520 MHz, 12.5 Volts Output Power — 35 Watts Power Gain — 10.0 dB Efficiency — 50% • Capable of Handling 20:1 VSWR, @ 15.6 Vdc, 520 MHz, 2 dB Overdrive Features • Excellent Thermal Stability • Characterized with Series Equivalent Large - Signal Impedance Parameters • Broadband - Full Power Across the Band: 135 - 175 MHz 400 - 470 MHz 450 - 520 MHz • Broadband UHF/VHF Demonstration Amplifier Information Available Upon Request • 200_C Capable Plastic Package • N Suffix Indicates Lead - Free Terminations. RoHS Compliant. • In Tape and Reel. T1 Suffix = 500 Units per 44 mm, 13 inch Reel. 520 MHz, 35 W, 12.5 V LATERAL N - CHANNEL BROADBAND RF POWER MOSFETs CASE 1264 - 09, STYLE 1 TO - 272 - 6 WRAP PLASTIC MRF1535NT1 CASE 1264A - 02, STYLE 1 TO - 272 - 6 PLASTIC MRF1535FNT1 Table 1. Maximum Ratings Rating Symbol Value Unit Drain - Source Voltage VDSS - 0.5, +40 Vdc Gate - Source Voltage VGS ± 20 Vdc ID 6 Adc PD 135 0.50 W W/°C Storage Temperature Range Tstg - 65 to +150 °C Operating Junction Temperature TJ 200 °C Symbol Value(2) Unit RθJC 0.90 °C/W Drain Current — Continuous Total Device Dissipation @ TC = 25°C Derate above 25°C (1) Table 2. Thermal Characteristics Characteristic Thermal Resistance, Junction to Case Table 3. Moisture Sensitivity Level Test Methodology Per JESD 22 - A113, IPC/JEDEC J - STD - 020 1. Calculated based on the formula PD = Rating Package Peak Temperature Unit 1 260 °C TJ – TC RθJC 2. MTTF calculator available at http://www.freescale.com/rf. Select Tools/Software/Application Software/Calculators to access the MTTF calculators by product. NOTE - CAUTION - MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed. © Freescale Semiconductor, Inc., 2006. All rights reserved. RF Device Data Freescale Semiconductor MRF1535NT1 MRF1535FNT1 1 Table 4. Electrical Characteristics (TC = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Drain - Source Breakdown Voltage (VGS = 0 Vdc, ID = 100 μAdc) V(BR)DSS 60 — — Vdc Zero Gate Voltage Drain Current (VDS = 60 Vdc, VGS = 0 Vdc) IDSS — — 1 μAdc Gate - Source Leakage Current (VGS = 10 Vdc, VDS = 0 Vdc) IGSS — — 0.3 μAdc Gate Threshold Voltage (VDS = 12.5 Vdc, ID = 400 μA) VGS(th) 1 — 2.6 Vdc Drain - Source On - Voltage (VGS = 5 Vdc, ID = 0.6 A) RDS(on) — — 0.7 Ω Drain - Source On - Voltage (VGS = 10 Vdc, ID = 2.0 Adc) VDS(on) — — 1 Vdc Input Capacitance (Includes Input Matching Capacitance) (VDS = 12.5 Vdc, VGS = 0 V, f = 1 MHz) Ciss — — 250 pF Output Capacitance (VDS = 12.5 Vdc, VGS = 0 V, f = 1 MHz) Coss — — 150 pF Reverse Transfer Capacitance (VDS = 12.5 Vdc, VGS = 0 V, f = 1 MHz) Crss — — 20 pF Gps — 13.5 — dB η — 55 — % Off Characteristics On Characteristics Dynamic Characteristics RF Characteristics (In Freescale Test Fixture) Common - Source Amplifier Power Gain (VDD = 12.5 Vdc, Pout = 35 Watts, IDQ = 500 mA) f = 520 MHz Drain Efficiency (VDD = 12.5 Vdc, Pout = 35 Watts, IDQ = 500 mA) f = 520 MHz MRF1535NT1 MRF1535FNT1 2 RF Device Data Freescale Semiconductor VGG + C11 C10 R4 B1 C23 R3 + C21 C22 VDD L5 C9 R2 RF INPUT N1 C1 R1 Z1 C2 L1 C3 Z2 C4 B1 C1, C9, C20, C23 C2, C5 C3, C15 C4, C6, C19 C7 C8 C10, C21 C11, C22 C12, C13 C14 C16 C17 C18 L1 L2 L3 Z3 C5 L2 C6 Z4 Z5 C7 DUT Z6 Z7 C12 C8 Ferroxcube #VK200 330 pF, 100 mil Chip Capacitors 0 to 20 pF Trimmer Capacitors 33 pF, 100 mil Chip Capacitors 18 pF, 100 mil Chip Capacitors 160 pF, 100 mil Chip Capacitor 240 pF, 100 mil Chip Capacitor 10 μF, 50 V Electrolytic Capacitors 470 pF, 100 mil Chip Capacitors 150 pF, 100 mil Chip Capacitors 110 pF, 100 mil Chip Capacitor 68 pF, 100 mil Chip Capacitor 120 pF, 100 mil Chip Capacitor 51 pF, 100 mil Chip Capacitor 17.5 nH, Coilcraft #A05T 5 nH, Coilcraft #A02T 1 Turn, #26 AWG, 0.250″ ID C13 Z8 C14 L4 L5 N1, N2 R1 R2 R3 R4 Z1 Z2 Z3 Z4 Z5, Z6 Z7 Z8 Z9 Z10 Board C15 Z9 L3 L4 C16 C17 C18 Z10 RF OUTPUT N2 C20 C19 1 Turn, #26 AWG, 0.240″ ID 4 Turn, #24 AWG, 0.180″ ID Type N Flange Mounts 6.5 Ω, 1/4 W Chip Resistor 39 Ω Chip Resistor (0805) 1.2 kΩ, 1/8 W Chip Resistor 33 kΩ, 1/4 W Chip Resistor 0.970″ x 0.080″ Microstrip 0.380″ x 0.080″ Microstrip 0.190″ x 0.080″ Microstrip 0.160″ x 0.080″ Microstrip 0.110″ x 0.200″ Microstrip 0.490″ x 0.080″ Microstrip 0.250″ x 0.080″ Microstrip 0.320″ x 0.080″ Microstrip 0.240″ x 0.080″ Microstrip Glass Teflon®, 31 mils Figure 1. 135 - 175 MHz Broadband Test Circuit TYPICAL CHARACTERISTICS, 135 - 175 MHz 0 155 MHz 135 MHz 175 MHz 50 40 IRL, INPUT RETURN LOSS (dB) Pout , OUTPUT POWER (WATTS) 60 30 20 10 −5 155 MHz 135 MHz 175 MHz −10 −15 VDD = 12.5 Vdc VDD = 12.5 Vdc 0 −20 0 1 2 3 Pin, INPUT POWER (WATTS) Figure 2. Output Power versus Input Power 4 10 20 30 40 50 60 Pout, OUTPUT POWER (WATTS) Figure 3. Input Return Loss versus Output Power MRF1535NT1 MRF1535FNT1 RF Device Data Freescale Semiconductor 3 TYPICAL CHARACTERISTICS, 135 - 175 MHz 19 80 VDD = 12.5 Vdc 155 MHz h, DRAIN EFFICIENCY (%) 18 GAIN (dB) 17 16 15 14 13 155 MHz 12 10 20 30 60 175 MHz 50 40 135 MHz 40 30 50 60 10 20 30 Pout, OUTPUT POWER (WATTS) 40 50 60 80 Figure 5. Drain Efficiency versus Output Power 80 45 h, DRAIN EFFICIENCY (%) 50 155 MHz 175 MHz 40 135 MHz 35 155 MHz 70 175 MHz 60 135 MHz 50 VDD = 12.5 Vdc Pin = 30 dBm VDD = 12.5 Vdc Pin = 30 dBm 30 40 200 400 600 800 1000 1200 200 400 IDQ, BIASING CURRENT (mA) 600 800 1000 1200 IDQ, BIASING CURRENT (mA) Figure 6. Output Power versus Biasing Current Figure 7. Drain Efficiency versus Biasing Current 70 80 60 50 h, DRAIN EFFICIENCY (%) Pout , OUTPUT POWER (WATTS) 70 Pout, OUTPUT POWER (WATTS) Figure 4. Gain versus Output Power Pout , OUTPUT POWER (WATTS) 135 MHz VDD = 12.5 Vdc 175 MHz 11 70 155 MHz 175 MHz 135 MHz 40 30 135 MHz 70 175 MHz 60 155 MHz 50 20 IDQ = 250 mA Pin = 30 dBm IDQ = 250 mA Pin = 30 dBm 10 10 11 12 13 14 VDD, SUPPLY VOLTAGE (VOLTS) Figure 8. Output Power versus Supply Voltage 40 15 10 11 12 13 14 15 VDD, SUPPLY VOLTAGE (VOLTS) Figure 9. Drain Efficiency versus Supply Voltage MRF1535NT1 MRF1535FNT1 4 RF Device Data Freescale Semiconductor B1 VGG VDD C14 C13 + C12 C11 R3 R2 C25 C24 L1 C23 + C22 C10 R1 DUT RF INPUT N1 C1 Z1 C2 Z2 C3 B1 C1 C2 C3 C4 C5 C6, C7 C8, C15, C16 C9 C10, C14, C25 C11, C22 C12, C24 C13, C23 C17, C18 C19 C20 Z3 C4 Z4 Z5 C5 C6 C7 Z6 C8 Z7 C9 C15 Ferroxcube VK200 160 pF, 100 mil Chip Capacitor 3 pF, 100 mil Chip Capacitor 3.6 pF, 100 mil Chip Capacitor 2.2 pF, 100 mil Chip Capacitor 10 pF, 100 mil Chip Capacitor 16 pF, 100 mil Chip Capacitors 27 pF, 100 mil Chip Capacitors 43 pF, 100 mil Chip Capacitor 160 pF, 100 mil Chip Capacitors 10 μF, 50 V Electrolytic Capacitors 1,200 pF, 100 mil Chip Capacitors 0.1 μF, 100 mil Chip Capacitors 24 pF, 100 mil Chip Capacitors 160 pF, 100 mil Chip Capacitor 8.2 pF, 100 mil Chip Capacitor C21 L1 N1, N2 R1 R2 R3 Z1 Z2 Z3 Z4 Z5, Z8 Z6, Z7 Z9 Z10 Board Z9 Z8 C16 C17 C18 C19 N2 Z10 C20 RF OUTPUT C21 1.8 pF, 100 mil Chip Capacitor 47.5 nH, 5 Turn, Coilcraft Type N Flange Mounts 500 Ω Chip Resistor (0805) 1 kΩ Chip Resistor (0805) 33 kΩ, 1/8 W Chip Resistor 0.480″ x 0.080″ Microstrip 1.070″ x 0.080″ Microstrip 0.290″ x 0.080″ Microstrip 0.160″ x 0.080″ Microstrip 0.120″ x 0.080″ Microstrip 0.120″ x 0.223″ Microstrip 1.380″ x 0.080″ Microstrip 0.625″ x 0.080″ Microstrip Glass Teflon®, 31 mils Figure 10. 450 - 520 MHz Broadband Test Circuit TYPICAL CHARACTERISTICS, 450 - 520 MHz 60 0 IRL, INPUT RETURN LOSS (dB) Pout , OUTPUT POWER (WATTS) 450 MHz 50 500 MHz 40 470 MHz 520 MHz 30 20 10 VDD = 12.5 Vdc −5 450 MHz −10 470 MHz 520 MHz 500 MHz VDD = 12.5 Vdc 0 −15 0 1 2 3 4 5 6 0 10 20 30 40 50 60 Pin, INPUT POWER (WATTS) Pout, OUTPUT POWER (WATTS) Figure 11. Output Power versus Input Power Figure 12. Input Return Loss versus Output Power MRF1535NT1 MRF1535FNT1 RF Device Data Freescale Semiconductor 5 TYPICAL CHARACTERISTICS, 450 - 520 MHz 15 70 520 MHz VDD = 12.5 Vdc 470 MHz GAIN (dB) 13 h, DRAIN EFFICIENCY (%) 14 450 MHz 12 11 60 520 MHz 50 40 VDD = 12.5 Vdc 500 MHz 9 20 0 10 20 30 40 50 60 0 10 20 Pout, OUTPUT POWER (WATTS) 30 40 50 60 Pout, OUTPUT POWER (WATTS) Figure 13. Gain versus Output Power Figure 14. Drain Efficiency versus Output Power 50 80 450 MHz 45 h, DRAIN EFFICIENCY (%) Pout , OUTPUT POWER (WATTS) 450 MHz 470 MHz 30 10 470 MHz 500 MHz 40 520 MHz 35 70 500 MHz 520 MHz 60 450 MHz 470 MHz 50 VDD = 12.5 Vdc Pin = 34 dBm VDD = 12.5 Vdc Pin = 34 dBm 30 40 200 400 600 800 1000 1200 200 400 IDQ, BIASING CURRENT (mA) 600 800 1000 1200 IDQ, BIASING CURRENT (mA) Figure 15. Output Power versus Biasing Current Figure 16. Drain Efficiency versus Biasing Current 70 80 60 h, DRAIN EFFICIENCY (%) Pout , OUTPUT POWER (WATTS) 500 MHz 50 450 MHz 40 470 MHz 30 520 MHz 500 MHz 70 520 MHz 60 450 MHz 470 MHz 500 MHz 50 IDQ = 250 mA Pin = 34 dBm 20 IDQ = 250 mA Pin = 34 dBm 10 40 10 11 12 13 14 15 VDD, SUPPLY VOLTAGE (VOLTS) Figure 17. Output Power versus Supply Voltage 10 11 12 13 14 15 VDD, SUPPLY VOLTAGE (VOLTS) Figure 18. Drain Efficiency versus Supply Voltage MRF1535NT1 MRF1535FNT1 6 RF Device Data Freescale Semiconductor TYPICAL CHARACTERISTICS MTTF FACTOR (HOURS X AMPS2) 1010 109 108 107 90 100 110 120 130 140 150 160 170 180 190 200 210 TJ, JUNCTION TEMPERATURE (°C) This above graph displays calculated MTTF in hours x ampere2 drain current. Life tests at elevated temperatures have correlated to better than ±10% of the theoretical prediction for metal failure. Divide MTTF factor by ID2 for MTTF in a particular application. Figure 19. MTTF Factor versus Junction Temperature MRF1535NT1 MRF1535FNT1 RF Device Data Freescale Semiconductor 7 Zo = 10 Ω Zin ZOL* f = 175 MHz f = 135 MHz f = 175 MHz f = 135 MHz f = 520 MHz ZOL* f = 450 MHz f = 450 MHz f = 520 MHz Zin Zin VDD = 12.5 V, IDQ = 250 mA, Pout = 35 W VDD = 12.5 V, IDQ = 500 mA, Pout = 35 W f MHz Zin Ω ZOL* Ω f MHz Zin Ω ZOL* Ω 135 5.0 + j0.9 1.7 + j0.2 450 0.8 - j1.4 1.0 - j0.8 155 5.0 + j0.9 1.7 + j0.2 470 0.9 - j1.4 1.1 - j0.6 175 3.0 + j1.0 1.3 + j0.1 500 1.0 - j1.4 1.1 - j0.6 520 0.9 - j1.4 1.1 - j0.5 = Complex conjugate of source impedance. Zin ZOL* = Complex conjugate of the load impedance at given output power, voltage, frequency, and ηD > 50 %. = Complex conjugate of source impedance. ZOL* = Complex conjugate of the load impedance at given output power, voltage, frequency, and ηD > 50 %. Note: ZOL* was chosen based on tradeoffs between gain, drain efficiency, and device stability. Input Matching Network Output Matching Network Device Under Test Z in Z * OL Figure 20. Series Equivalent Input and Output Impedance MRF1535NT1 MRF1535FNT1 8 RF Device Data Freescale Semiconductor Table 5. Common Source Scattering Parameters (VDD = 12.5 Vdc) IDQ = 250 mA S11 S21 S12 S22 f MHz |S11| ∠φ |S21| ∠φ |S12| ∠φ |S22| ∠φ 50 0.89 - 173 8.496 83 0.014 - 26 0.76 - 170 100 0.90 - 175 3.936 72 0.014 - 14 0.79 - 170 150 0.91 - 175 2.429 63 0.011 - 23 0.82 - 170 200 0.92 - 175 1.627 57 0.010 - 44 0.86 - 170 250 0.94 - 176 1.186 53 0.007 - 16 0.88 - 170 300 0.95 - 176 0.888 49 0.005 - 44 0.91 - 171 350 0.96 - 176 0.686 48 0.005 36 0.92 - 170 400 0.96 - 176 0.568 44 0.005 -1 0.94 - 171 450 0.97 - 176 0.457 44 0.004 49 0.94 - 172 500 0.97 - 176 0.394 44 0.003 - 51 0.95 - 171 550 0.98 - 176 0.332 42 0.001 31 0.95 - 173 600 0.98 - 177 0.286 41 0.013 99 0.94 - 173 IDQ = 1.0 A S11 S21 S12 S22 f MHz |S11| ∠φ |S21| ∠φ |S12| ∠φ |S22| ∠φ 50 0.90 - 173 8.49 83 0.006 - 39 0.86 - 176 100 0.90 - 175 3.92 72 0.009 -5 0.86 - 176 150 0.91 - 175 2.44 63 0.006 7 0.87 - 176 200 0.92 - 175 1.62 57 0.008 21 0.88 - 175 250 0.94 - 176 1.19 53 0.006 8 0.89 - 174 300 0.95 - 176 0.89 48 0.008 3 0.89 - 174 350 0.96 - 176 0.69 48 0.007 48 0.91 - 174 400 0.96 - 176 0.57 44 0.004 41 0.93 - 173 450 0.97 - 176 0.46 44 0.004 43 0.93 - 173 500 0.97 - 176 0.39 44 0.003 57 0.94 - 173 550 0.98 - 176 0.33 41 0.006 62 0.94 - 174 600 0.98 - 177 0.28 41 0.009 96 0.93 - 173 IDQ = 2.0 A S11 S21 S12 S22 f MHz |S11| ∠φ |S21| ∠φ |S12| ∠φ |S22| ∠φ 50 0.94 - 176 9.42 88 0.005 - 72 0.89 - 177 100 0.94 - 178 4.56 82 0.005 4 0.89 - 177 150 0.94 - 178 2.99 78 0.003 7 0.89 - 177 200 0.94 - 178 2.14 74 0.005 17 0.90 - 176 250 0.95 - 178 1.67 71 0.004 40 0.90 - 175 300 0.95 - 178 1.32 67 0.007 35 0.91 - 175 350 0.95 - 178 1.08 67 0.005 57 0.92 - 174 400 0.96 - 178 0.93 63 0.003 50 0.93 - 173 450 0.96 - 178 0.78 62 0.007 68 0.93 - 173 500 0.96 - 177 0.68 61 0.004 99 0.94 - 173 550 0.97 - 177 0.59 58 0.008 78 0.93 - 175 600 0.97 - 178 0.51 57 0.009 92 0.92 - 174 MRF1535NT1 MRF1535FNT1 RF Device Data Freescale Semiconductor 9 APPLICATIONS INFORMATION DESIGN CONSIDERATIONS This device is a common - source, RF power, N - Channel enhancement mode, Lateral Metal - Oxide Semiconductor Field - Effect Transistor (MOSFET). Freescale Application Note AN211A, “FETs in Theory and Practice”, is suggested reading for those not familiar with the construction and characteristics of FETs. This surface mount packaged device was designed primarily for VHF and UHF mobile power amplifier applications. Manufacturability is improved by utilizing the tape and reel capability for fully automated pick and placement of parts. However, care should be taken in the design process to insure proper heat sinking of the device. The major advantages of Lateral RF power MOSFETs include high gain, simple bias systems, relative immunity from thermal runaway, and the ability to withstand severely mismatched loads without suffering damage. MOSFET CAPACITANCES The physical structure of a MOSFET results in capacitors between all three terminals. The metal oxide gate structure determines the capacitors from gate - to - drain (Cgd), and gate - to - source (Cgs). The PN junction formed during fabrication of the RF MOSFET results in a junction capacitance from drain - to - source (Cds). These capacitances are characterized as input (Ciss), output (Coss) and reverse transfer (Crss) capacitances on data sheets. The relationships between the inter - terminal capacitances and those given on data sheets are shown below. The Ciss can be specified in two ways: 1. Drain shorted to source and positive voltage at the gate. 2. Positive voltage of the drain in respect to source and zero volts at the gate. In the latter case, the numbers are lower. However, neither method represents the actual operating conditions in RF applications. Drain Cgd Gate Cds Ciss = Cgd + Cgs Coss = Cgd + Cds Crss = Cgd Cgs Source DRAIN CHARACTERISTICS One critical figure of merit for a FET is its static resistance in the full - on condition. This on - resistance, RDS(on), occurs in the linear region of the output characteristic and is specified at a specific gate - source voltage and drain current. The drain - source voltage under these conditions is termed VDS(on). For MOSFETs, VDS(on) has a positive temperature coefficient at high temperatures because it contributes to the power dissipation within the device. BVDSS values for this device are higher than normally required for typical applications. Measurement of BVDSS is not recommended and may result in possible damage to the device. GATE CHARACTERISTICS The gate of the RF MOSFET is a polysilicon material, and is electrically isolated from the source by a layer of oxide. The DC input resistance is very high - on the order of 109 Ω — resulting in a leakage current of a few nanoamperes. Gate control is achieved by applying a positive voltage to the gate greater than the gate - to - source threshold voltage, VGS(th). Gate Voltage Rating — Never exceed the gate voltage rating. Exceeding the rated VGS can result in permanent damage to the oxide layer in the gate region. Gate Termination — The gates of these devices are essentially capacitors. Circuits that leave the gate open - circuited or floating should be avoided. These conditions can result in turn - on of the devices due to voltage build - up on the input capacitor due to leakage currents or pickup. Gate Protection — These devices do not have an internal monolithic zener diode from gate - to - source. If gate protection is required, an external zener diode is recommended. Using a resistor to keep the gate - to - source impedance low also helps dampen transients and serves another important function. Voltage transients on the drain can be coupled to the gate through the parasitic gate - drain capacitance. If the gate - to - source impedance and the rate of voltage change on the drain are both high, then the signal coupled to the gate may be large enough to exceed the gate - threshold voltage and turn the device on. DC BIAS Since this device is an enhancement mode FET, drain current flows only when the gate is at a higher potential than the source. RF power FETs operate optimally with a quiescent drain current (IDQ), whose value is application dependent. This device was characterized at IDQ = 150 mA, which is the suggested value of bias current for typical applications. For special applications such as linear amplification, IDQ may have to be selected to optimize the critical parameters. The gate is a dc open circuit and draws no current. Therefore, the gate bias circuit may generally be just a simple resistive divider network. Some special applications may require a more elaborate bias system. GAIN CONTROL Power output of this device may be controlled to some degree with a low power dc control signal applied to the gate, thus facilitating applications such as manual gain control, ALC/AGC and modulation systems. This characteristic is very dependent on frequency and load line. MRF1535NT1 MRF1535FNT1 10 RF Device Data Freescale Semiconductor AMPLIFIER DESIGN Impedance matching networks similar to those used with bipolar transistors are suitable for this device. For examples see Freescale Application Note AN721, “Impedance Matching Networks Applied to RF Power Transistors.” Large - signal impedances are provided, and will yield a good first pass approximation. Since RF power MOSFETs are triode devices, they are not unilateral. This coupled with the very high gain of this device yields a device capable of self oscillation. Stability may be achieved by techniques such as drain loading, input shunt resistive loading, or output to input feedback. The RF test fixture implements a parallel resistor and capacitor in series with the gate, and has a load line selected for a higher efficiency, lower gain, and more stable operating region. Two - port stability analysis with this device’s S - parameters provides a useful tool for selection of loading or feedback circuitry to assure stable operation. See Freescale Application Note AN215A, “RF Small - Signal Design Using Two - Port Parameters” for a discussion of two port network theory and stability. MRF1535NT1 MRF1535FNT1 RF Device Data Freescale Semiconductor 11 PACKAGE DIMENSIONS A E1 B r1 6 4 b2 4X aaa M 1 D A D1 aaa M DRAIN ID D A 5 2X b1 aaa 5 M 2 D D A 4X e 4 3 6 4X b3 ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ DRAIN ID NOTE 6 3 2 1 E2 VIEW Y - Y E C SEATING PLANE D SEATING PLANE A DATUM PLANE H E2 Y Y A1 L q A2 c1 STYLE 1: PIN 1. 2. 3. 4. 5. 6. SOURCE (COMMON) DRAIN SOURCE (COMMON) SOURCE (COMMON) GATE SOURCE (COMMON) NOTES: 1. CONTROLLING DIMENSION: INCH . 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DATUM PLANE −H− IS LOCATED AT TOP OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE TOP OF THE PARTING LINE. 4. DIMENSION D AND E1 DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.006 PER SIDE. DIMENSION D AND E1 DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE −H−. 5. DIMENSIONS b1 AND b3 DO NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.005 TOTAL IN EXCESS OF THE b1 AND b2 DIMENSIONS AT MAXIMUM MATERIAL CONDITION. 6. CROSSHATCHING REPRESENTS THE EXPOSED AREA OF THE HEAT SLUG. DIM A A1 A2 D D1 E E1 E2 L b1 b2 b3 c1 e r1 q aaa INCHES MIN MAX 0.098 0.108 0.000 0.004 0.100 0.104 0.928 0.932 0.806 0.814 0.296 0.304 0.248 0.252 0.241 0.245 0.060 0.070 0.193 0.199 0.078 0.084 0.088 0.094 0.007 0.011 0.193 BSC 0.063 0.068 0_ 6_ 0.004 MILLIMETERS MIN MAX 2.49 2.74 0.00 0.10 2.54 2.64 23.57 23.67 20.47 20.68 7.52 7.72 6.30 6.40 6.12 6.22 1.52 1.78 4.90 5.05 1.98 2.13 2.24 2.39 0.18 0.28 4.90 BSC 1.60 1.73 0_ 6_ 0.10 CASE 1264 - 09 ISSUE K TO - 272- 6 WRAP PLASTIC MRF1535NT1 MRF1535NT1 MRF1535FNT1 12 RF Device Data Freescale Semiconductor 2X aaa 4X M P D A B b2 aaa M D A A E1 B 4 E2 1 ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ 6 DRAIN ID 2X b1 aaa M D A 5 2 D D2 5 4X e 6 3 4 4X b3 D1 aaa M D A E A SEATING PLANE F Y NOTE 5 3 2 1 bbb C A B VIEW Y - Y c1 D DRAIN ID ZONE "J" Y A1 STYLE 1: PIN 1. 2. 3. 4. 5. 6. 6 A2 SOURCE (COMMON) DRAIN SOURCE (COMMON) SOURCE (COMMON) GATE SOURCE (COMMON) CASE 1264A - 02 ISSUE C TO - 272- 6 PLASTIC MRF1535FNT1 NOTES: 1. CONTROLLING DIMENSION: INCH. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.006 PER SIDE. DIMENSIONS D AND E1 DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE −H−. 4. DIMENSIONS b1 AND b3 DO NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.005 TOTAL IN EXCESS OF THE b1 AND b2 DIMENSIONS AT MAXIMUM MATERIAL CONDITION. 5. CROSSHATCHING REPRESENTS THE EXPOSED AREA OF THE HEAT SLUG. 6. DIMENSION A2 APPLIES WITHIN ZONE J ONLY. DIM A A1 A2 D D1 D2 E E1 E2 F P b1 b2 b3 c1 e aaa bbb INCHES MIN MAX 0.098 0.106 0.038 0.044 0.040 0.042 0.926 0.934 0.810 BSC 0.608 BSC 0.492 0.500 0.246 0.254 0.170 BSC 0.025 BSC 0.126 0.134 0.193 0.199 0.078 0.084 0.088 0.094 0.007 0.011 0.193 BSC 0.004 0.008 MILLIMETERS MIN MAX 2.49 2.69 0.96 1.12 1.02 1.07 23.52 23.72 20.57 BSC 15.44 BSC 12.50 12.70 6.25 6.45 4.32 BSC 0.64 BSC 3.20 3.40 4.90 5.05 1.98 2.13 2.24 2.39 0.178 0.279 4.90 BSC 0.10 0.20 MRF1535NT1 MRF1535FNT1 RF Device Data Freescale Semiconductor 13 How to Reach Us: Home Page: www.freescale.com E - mail: [email protected] USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. 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