ONSEMI SPZT651T1G

PZT651
NPN Silicon Planar
Epitaxial Transistor
This NPN Silicon Epitaxial transistor is designed for use in
industrial and consumer applications. The device is housed in the
SOT−223 package which is designed for medium power surface
mount applications.
SOT−223 package ensures level mounting, resulting in improved
thermal conduction, and allows visual inspection of soldered joints.
The formed leads absorb thermal stress during soldering, eliminating
the possibility of damage to the die.
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SOT−223 PACKAGE HIGH CURRENT
NPN SILICON TRANSISTOR
SURFACE MOUNT
Features
4
• High Current
• The SOT−223 Package can be Soldered Using Wave or Reflow
• Available in 12 mm Tape and Reel
•
•
•
1
2
3
SOT−223
CASE 318E−04
STYLE 1
Use PZT651T1 to Order the 7 inch/1000 Unit Reel
Use PZT651T3 to Order the 13 inch/4000 Unit Reel
PNP Complement is PZT751T1
S Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant*
♦
♦
COLLECTOR 2, 4
BASE
1
EMITTER 3
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Symbol
Value
Unit
Collector−Emitter Voltage
VCEO
60
Vdc
Collector−Base Voltage
VCBO
80
Vdc
Emitter−Base Voltage
Rating
VEBO
5.0
Vdc
Collector Current
IC
2.0
Adc
Total Power Dissipation
@ TA = 25°C (Note 1)
Derate above 25°C
PD
Storage Temperature Range
Junction Temperature
W
0.8
6.4
mW/°C
Tstg
−65 to 150
°C
TJ
150
°C
Symbol
Max
Unit
RqJA
156
°C/W
TL
260
°C
10
Sec
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance from
Junction−to−Ambient in Free Air
Maximum Temperature for Soldering
Purposes
Time in Solder Bath
MARKING DIAGRAM
AYW
651 G
G
1
A
Y
WW
G
= Assembly Location
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Device mounted on a FR−4 glass epoxy printed circuit board using minimum
recommended footprint.
Package
Shipping†
PZT651T1G
SOT−223
(Pb−Free)
1,000 / Tape & Reel
SPZT651T1G
SOT−223
(Pb−Free)
1,000 / Tape & Reel
Device
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2013
August, 2013 − Rev. 8
1
Publication Order Number:
PZT651T1/D
PZT651
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol
Characteristics
Min
Max
60
−
80
−
5.0
−
−
0.1
−
100
75
75
75
40
−
−
−
−
−
−
0.5
0.3
−
1.0
−
1.2
75
−
Unit
OFF CHARACTERISTICS
Collector−Emitter Breakdown Voltage
(IC = 10 mAdc, IB = 0)
V(BR)CEO
Collector−Emitter Breakdown Voltage
(IC = 100 mAdc, IE = 0)
V(BR)CBO
Emitter−Base Breakdown Voltage
(IE = 10 mAdc, IC = 0)
V(BR)EBO
Base−Emitter Cutoff Current
(VEB = 4.0 Vdc)
IEBO
Collector−Base Cutoff Current
(VCB = 80 Vdc, IE = 0)
ICBO
Vdc
Vdc
Vdc
mAdc
nAdc
ON CHARACTERISTICS (Note 2)
DC Current Gain
(IC = 50 mAdc, VCE = 2.0 Vdc)
(IC = 500 mAdc, VCE = 2.0 Vdc)
(IC = 1.0 Adc, VCE = 2.0 Vdc)
(IC = 2.0 Adc, VCE = 2.0 Vdc)
hFE
Collector−Emitter Saturation Voltages
(IC = 2.0 Adc, IB = 200 mAdc)
(IC = 1.0 Adc, IB = 100 mAdc)
VCE(sat)
Base−Emitter Voltages
(IC = 1.0 Adc, VCE = 2.0 Vdc)
VBE(on)
Base−Emitter Saturation Voltage
(IC = 1.0 Adc, IB = 100 mAdc)
VBE(sat)
Current−Gain — Bandwidth
(IC = 50 mAdc, VCE = 5.0 Vdc, f = 100 MHz)
fT
2. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle = 2.0%
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2
−
Vdc
Vdc
Vdc
MHz
PZT651
NPN
PNP
300
250
270
TJ = 125°C
210
180
25°C
150
120
-55°C
90
175
125
100
30
25
50
-55°C
75
50
20
25°C
150
60
0
10
VCE = -2.0 V
200
hFE, DC CURRENT GAIN
hFE, DC CURRENT GAIN
240
TJ = 125°C
225
VCE = 2.0 V
0
-10 -20
100 200
500 1.0 A 2.0 A 4.0 A
IC, COLLECTOR CURRENT (mA)
Figure 1. Typical DC Current Gain
-50 -100 -200 -500 -1.0 A -2.0 A -4.0 A
IC, COLLECTOR CURRENT (mA)
Figure 2. Typical DC Current Gain
PNP
-2.0
1.8
-1.8
1.6
-1.6
V, VOLTAGE (VOLTS)
V, VOLTAGE (VOLTS)
NPN
2.0
1.4
1.2
1.0
VBE(sat) @ IC/IB = 10
0.8
VBE(on) @ VCE = 2.0 V
0.6
0.4
-1.4
-1.2
VBE(sat) @ IC/IB = 10
-1.0
-0.8
VBE(on) @ VCE = 2.0 V
-0.6
-0.4
VCE(sat) @ IC/IB = 10
0.2
VCE(sat) @ IC/IB = 10
-0.2
0
0
50
100
200
500
1.0 A
IC, COLLECTOR CURRENT (mA)
2.0 A
4.0 A
-50
-100
-200
-500 -1.0 A
IC, COLLECTOR CURRENT (mA)
NPN
1.0
0.9
0.8
TJ = 25°C
0.7
0.6
0.5
0.4
0.3
IC = 10 mA IC = 100 mA
IC = 500 mA
IC = 2.0 A
0.2
0.1
0
0.05 0.1 0.2
0.5 1.0 2.0 5.0 10 20
IB, BASE CURRENT (mA)
-4.0 A
Figure 4. On Voltages
VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS)
VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 3. On Voltages
-2.0 A
50 100 200 500
PNP
-1.0
-0.9
TJ = 25°C
-0.8
-0.7
-0.6
-0.5
-0.4
IC = -500 mA
-0.3
IC = -2.0 A
-0.2
-0.1
IC = -10 mA
IC = -100 mA
0
-0.05 -0.1 -0.2 -0.5 -1.0 -2.0 -5.0 -10 -20
IB, BASE CURRENT (mA)
Figure 5. Collector Saturation Region
-50 -100-200 -500
Figure 6. Collector Saturation Region
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3
PZT651
PACKAGE DIMENSIONS
SOT−223 (TO−261)
CASE 318E−04
ISSUE N
D
b1
4
HE
E
1
2
3
b
e1
e
0.08 (0003)
A1
C
q
A
L
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M,
1994.
2. CONTROLLING DIMENSION: INCH.
MILLIMETERS
INCHES
DIM
MIN
NOM
MAX
MIN
NOM
0.064
A
1.50
1.63
1.75
0.060
0.002
A1
0.02
0.06
0.10
0.001
0.030
b
0.60
0.75
0.89
0.024
0.121
b1
2.90
3.06
3.20
0.115
0.012
c
0.24
0.29
0.35
0.009
0.256
D
6.30
6.50
6.70
0.249
0.138
E
3.30
3.50
3.70
0.130
0.091
e
2.20
2.30
2.40
0.087
e1
0.037
0.85
0.94
1.05
0.033
L
0.20
−−−
−−−
0.008
−−−
L1
1.50
1.75
2.00
0.060
0.069
HE
6.70
7.00
7.30
0.264
0.276
0°
10°
0°
−
−
q
STYLE 1:
PIN 1.
2.
3.
4.
L1
MAX
0.068
0.004
0.035
0.126
0.014
0.263
0.145
0.094
0.041
−−−
0.078
0.287
10°
BASE
COLLECTOR
EMITTER
COLLECTOR
SOLDERING FOOTPRINT*
3.8
0.15
2.0
0.079
2.3
0.091
2.3
0.091
6.3
0.248
2.0
0.079
1.5
0.059
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
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particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
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For additional information, please contact your local
Sales Representative
PZT651T1/D