HITACHI 2SJ518

2SJ518
Silicon P Channel MOS FET
High Speed Power Switching
ADE-208-580B (Z)
3rd. Edition
Jun 1998
Features
• Low on-resistance
R DS(on) = 0.35 Ω typ. at (V GS = –10V, ID = –1A)
• Low drive current
• 4 V gete drive devices
• High speed switching
Outline
UPAK
3
2
1
D
4
G
S
1. Gate
2. Drain
3. Source
4. Drain
2SJ518
Absolute Maximum Ratings (Ta = 25°C)
Item
Symbol
Ratings
Unit
Drain to source voltage
VDSS
–60
V
Gate to source voltage
VGSS
±20
V
Drain current
ID
–2
A
–4
A
–2
A
–2
A
0.34
mJ
1
W
Drain peak current
I D(pulse)
Body-drain diode reverse drain current
I DR
Note1
Note2
Avalenche current
I AP
Avalenche energy
EAR
Note3
Channel dissipation
Pch
Channel temperature
Tch
150
°C
Storage temperature
Tstg
–55 to +150
°C
Note:
1. PW ≤ 10µs, duty cycle ≤ 1 %
2. value at Tch = 25°C, Rg ≥ 50 Ω
3. Value at when using the aluminaceramic board (12.5x20x0.7mm)
Electrical Characteristics (Ta = 25°C)
Item
Min
Typ
Max
Unit
Test Conditions
Drain to source breakdown voltage V(BR)DSS
–60
—
—
V
I D = –10mA, VGS = 0
Gate to source breakdown voltage V(BR)GSS
±20
—
—
V
I G = ±100µA, VDS = 0
Zero gate voltege drain current
I DSS
—
—
–10
µA
VDS = –60 V, VGS = 0
Gate to source leak current
I GSS
—
—
±10
µA
VGS = ±16V, VDS = 0
Gate to source cutoff voltage
VGS(off)
–1.0
—
–2.0
V
I D = –1mA, VDS = –10V
Static drain to source on state
RDS(on)
—
0.35
0.46
Ω
I D = –1A, VGS = –10V Note4
resistance
RDS(on)
—
0.45
0.63
Ω
I D = –1A, VGS = –4V Note4
Forward transfer admittance
|yfs|
1.2
2.0
—
S
I D = –1A, VDS = –10V
Input capacitance
Ciss
—
220
—
pF
VDS = –10V
Output capacitance
Coss
—
110
—
pF
VGS = 0
Reverse transfer capacitance
Crss
—
35
—
pF
f = 1MHz
Turn-on delay time
t d(on)
—
10
—
ns
VGS = –10V, ID = –1A
Rise time
tr
—
11
—
ns
RL = 30Ω
Turn-off delay time
t d(off)
—
45
—
ns
Fall time
tf
—
30
—
ns
Body–drain diode forward voltage VDF
—
–1.05
—
V
I D = –2A, VGS = 0
Body–drain diode reverse
recovery time
—
50
—
ns
I F = –2A, VGS = 0
diF/ dt = 50A/µs
Note:
2
Symbol
4. Pulse test
5. Marking is “AZ”
t rr
Note4
2SJ518
Main Characteristics
Power vs. Temperature Derating
–100
1.5
–10
100 µs
–3
1.0
0.5
–1
–0.3
–0.1
–0.03
–0.01
0
50
100
Ambient Temperature
150
200
Ta = 25 °C
Typical Transfer Characteristics
–5
–4 V
–3.5 V
–3
–2
–3 V
–1
I D (A)
Pulse Test
–6 V
–5 V
Drain Current
I D (A)
–4
–10 V
1
m
s
=
1
DC
(1 0 m
Op
sh s
ot)
er
at
Operation in
ion
this area is
limited by R DS(on)
PW
–0.1 –0.3 –1
–3
–10 –30 –100
Drain to Source Voltage V DS (V)
Ta (°C)
Typical Output Characteristics
–5
Drain Current
Maximum Safe Operation Area
–30
I D (A)
Test Condition :
When using the aliminium Ceramic
board (12.5 x 20 x 70 mm)
Drain Current
Channel Dissipation
Pch (W)
2.0
–4
V DS = –10 V
Pulse Test
–3
–2
Tc = 75 °C
–1
–25 °C
VGS = –2.5 V
0
–2
–4
–6
Drain to Source Voltage
–8
–10
V DS (V)
25 °C
0
–1
–2
–3
Gate to Source Voltage
–4
–5
V GS (V)
3
2SJ518
–4
–3
–2
–1
Static Drain to Source on State Resistance
R DS(on) ( Ω)
–0.5 A
I D = –2 A
–1 A
0
4
Pulse Test
–4
–8
–12
Gate to Source Voltage
–16
–20
V GS (V)
Static Drain to Source on State Resistance
vs. Temperature
1.0
Pulse Test
I D = –2 A –0.5, –1 A
0.8
0.6
V GS = –4 V
0.4
–2 A
–0.5, –1 A
0.2
0
–40
–10 V
0
40
80
120
160
Case Temperature Tc (°C)
Static Drain to Source on State Resistance
vs. Drain Current
10
5
2
1
VGS = –4 V
0.5
–10 V
0.2
0.1
–0.1 –0.2
Pulse Test
–0.5 –1
–2
–5
Drain Current I D (A)
–10
Forward Transfer Admittance vs.
Drain Current
Forward Transfer Admittance |y fs | (S)
Drain to Source Saturation Voltage
V DS(on) (V)
–5
Drain to Source On State Resistance
R DS(on) ( Ω )
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
10
5
Ta = –25 °C
2
1
25 °C
75 °C
0.5
0.2
0.1
–0.1 –0.2
V DS = –10 V
Pulse Test
–0.5 –1 –2
–5
Drain Current I D (A)
–10
2SJ518
Body–Drain Diode Reverse
Recovery Time
Typical Capacitance vs.
Drain to Source Voltage
1000
Capacitance C (pF)
Reverse Recovery Time trr (ns)
100
50
20
300
Ciss
100
Coss
30
Crss
10
3
di / dt = 50 A / µs
VGS = 0, Ta = 25 °C
10
–0.1 –0.2 –0.5 –1 –2
–5 –10
Reverse Drain Current I DR (A)
1
0
–60
V DD = –10 V
–25 V
–50 V
V DS
–8
–12
V GS
–80
I = –2 A
–100 D
0
16
4
8
12
Gate Charge Qg (nc)
–30
–40
–50
–16
–20
20
V GS (V)
100
50
Switching Time t (ns)
–40
–4
Gate to Source Voltage
V DS (V)
Drain to Source Voltage
–20
–20
Switching Characteristics
0
V DD = –10 V
–25 V
–50 V
–10
Drain to Source Voltage V DS (V)
Dynamic Input Characteristics
0
VGS = 0
f = 1 MHz
20
t d(off)
tf
t d(on)
10
5
2
1
–0.1 –0.2
tr
V GS = –10 V, V DD = –30 V
Ta = 25°C, duty < 1 %
–0.5 –1 –2
–5
Drain Current I D (A)
–10
5
2SJ518
Maximum Avalanche Energy vs.
Channel Temperature Derating
Reverse Drain Current vs.
Source to Drain Voltage
Repetitive Avalanche Energy EAR (mJ)
–5
Reverse Drain Current I DR (A)
Pulse Test
–4
–3
–10 V
–2
–5 V
V GS = 0, 5 V
–1
0
–0.4
–0.8
–1.2
Source to Drain Voltage
–1.6
–2.0
0.5
I AP = –2 A
V DD = –25 V
duty < 0.1 %
Rg > 50 Ω
0.4
0.3
0.2
0.1
0
25
V SD (V)
50
75
100
125
150
Channel Temperature Tch (°C)
Avalanche Test Circuit
V DS
Monitor
Avalanche Waveform
EAR =
L
1
2
• L • I AP •
2
I AP
Monitor
VDSS
VDSS – V DD
V (BR)DSS
I AP
Rg
D. U. T
V DS
VDD
ID
Vin
–15 V
50Ω
0
6
VDD
2SJ518
Switching Time Test Circuit
Vout
Monitor
Vin Monitor
Waveform
Vin
10%
D.U.T.
RL
90%
Vin
–10 V 50Ω
V DD
= –30 V
90%
90%
Vout
td(on)
10%
10%
tr
td(off)
tf
7
2SJ518
Package Dimensions
Unit: mm
4.5 ± 0.1
0.4
1.8 max
f 1
0.53 max
0.48 max
1
2
1.5 1.5
3.0
3
0.8 min
2.5 ± 0.1
4.25 max
4
1.5 ± 0.1
0.44 max
0.44 max
Hitachi Code
EIAJ
JEDEC
8
UPAK
SC–62
UPAK
Cautions
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copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
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written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
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Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.