HITACHI 2SK2925

2SK2925(L),2SK2925(S)
Silicon N Channel MOS FET
High Speed Power Switching
ADE-208-549C (Z)
4th. Edition
Jun 1998
Features
• Low on-resistance
R DS =0.060 Ω typ.
• High speed switching
• 4V gate drive device can be driven from 5V source
Outline
DPAK–2
4
4
D
1 2
3
G
S
1 2
3
1. Gate
2. Drain
3. Source
4. Drain
2SK2925(L),2SK2925(S)
Absolute Maximum Ratings (Ta = 25°C)
Item
Symbol
Ratings
Unit
Drain to source voltage
VDSS
60
V
Gate to source voltage
VGSS
±20
V
Drain current
ID
10
A
40
A
10
A
10
A
8.5
mJ
20
W
Drain peak current
I D(pulse)
Body-drain diode reverse drain current
I DR
Avalanche current
Avalanche energy
I AP
Note1
Note3
EAR
Note3
Note2
Channel dissipation
Pch
Channel temperature
Tch
150
°C
Storage temperature
Tstg
–55 to +150
°C
Note:
2
1. PW ≤ 10µs, duty cycle ≤ 1 %
2. Value at Tc = 25°C
3. Value at Tch = 25°C, Rg ≥ 50Ω
2SK2925(L),2SK2925(S)
Electrical Characteristics (Ta = 25°C)
Item
Symbol Min
Typ
Max
Unit
Test Conditions
Drain to source breakdown voltage V(BR)DSS
60
—
—
V
I D = 10mA, VGS = 0
Gate to source breakdown voltage V(BR)GSS
±20
—
—
V
I G = ±100µA, VDS = 0
Gate to source leak current
I GSS
—
—
±10
µA
VGS = ±16V, VDS = 0
Zero gate voltege drain current
I DSS
—
—
10
µA
VDS = 60 V, VGS = 0
Gate to source cutoff voltage
VGS(off)
1.5
—
2.5
V
I D = 1mA, VDS = 10V
Static drain to source on state
RDS(on)
—
0.060
0.080
Ω
I D = 5A, VGS = 10VNote4
resistance
RDS(on)
—
0.095
0.160
Ω
I D = 5A, VGS = 4V Note4
Forward transfer admittance
|yfs|
5
8
—
S
I D = 5A, VDS = 10V Note4
Input capacitance
Ciss
—
350
—
pF
VDS = 10V
Output capacitance
Coss
—
190
—
pF
VGS = 0
Reverse transfer capacitance
Crss
—
70
—
pF
f = 1MHz
Turn-on delay time
t d(on)
—
10
—
ns
I D = 5A, VGS = 10V
Rise time
tr
—
55
—
ns
RL = 6Ω
Turn-off delay time
t d(off)
—
60
—
ns
Fall time
tf
—
70
—
ns
Body–drain diode forward voltage
VDF
—
0.9
—
V
I F = 10A, VGS = 0
Body–drain diode reverse
recovery time
t rr
—
50
—
ns
I F = 10A, VGS = 0
diF/ dt =50A/µs
Note:
4. Pulse test
3
2SK2925(L),2SK2925(S)
Main Characteristics
Power vs. Temperature Derating
Maximum Safe Operation Area
40
1000
I D (A)
30
Drain Current
Channel Dissipation
Pch (W)
300
20
10
100
10
3
1
0.3
0
50
100
150
10
30
0
1 m µs
s
0
Op
era ms
(1s
tio
h
n(
Operation in
Tc ot)
this area is
=2
5°
limited by R DS(on)
C)
DC
PW
=1
Ta = 25°C
0.1
3
0.1 0.3
1
10
Drain to Source Voltage V
200
Case Temperature Tc (°C)
Typical Output Characteristics
10 V 6 V
µs
10
30
100
(V)
DS
Typical Transfer Characteristics
20
20
Pulse Test
I D (A)
4V
12
Drain Current
Drain Current
I D (A)
16
5V
8
4
3V
Tc = –25°C
12
4
2
4
6
Drain to Source Voltage V
8
DS(V)
75°C
8
4
V DS = 10 V
Pulse Test
VGS = 2.5 V
0
25°C
16
10
0
2
4
6
Gate to Source Voltage V
8
(V)
GS
10
2SK2925(L),2SK2925(S)
Drain to Source Saturation Voltage
V DS(on) (V)
2.0
Pulse Test
1.6
1.2
0.8
I D = 10 A
0.4
5A
2A
Drain to Source On State Resistance
R DS(on) ( W)
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
Static Drain to Source on State Resistance
vs. Drain Current
1.0
Pulse Test
0.5
0.2
0.1
VGS = 4 V
0.05
10 V
0.02
0.01
12
4
8
Gate to Source Voltage
16
20
V GS (V)
Static Drain to Source on State Resistance
vs. Temperature
0.5
Pulse Test
0.4
0.3
I D = 10 A
5A 2A
0.2
V GS = 4 V
0.1
0
–40
10 V
10 A 2, 5 A
0
40
80
120
160
Case Temperature Tc (°C)
1
2
5
10 20
50
Drain Current I D (A)
100
Forward Transfer Admittance vs.
Drain Current
Forward Transfer Admittance |y fs | (S)
Static Drain to Source on State Resistance
R DS(on) ( W)
0
20
10
Tc = –25 °C
5
2
25 °C
75 °C
1
0.5
0.1 0.2
V DS = 10 V
Pulse Test
0.5 1
2
5 10 20
Drain Current I D (A)
5
2SK2925(L),2SK2925(S)
Body–Drain Diode Reverse
Recovery Time
1000
di / dt = 50 A / µs
V GS = 0, Ta = 25 °C
200
Capacitance C (pF)
Reverse Recovery Time trr (ns)
500
Typical Capacitance vs.
Drain to Source Voltage
100
50
20
Coss
100
50
Crss
0
V DS
12
V GS
40
20
0
8
V DD = 50 V
25 V
10 V
4
8
12
16
Gate Charge Qg (nc)
4
0
20
1000
V GS (V)
16
V DD = 50 V
25 V
10 V
10
20
30
40
50
Drain to Source Voltage V DS (V)
Switching Characteristics
300
Switching Time t (ns)
60
20
I D = 10A
80
VGS = 0
f = 1 MHz
10
10 20
I DR (A)
Gate to Source Voltage
V DS (V)
200
5
Dynamic Input Characteristics
100
Drain to Source Voltage
Ciss
20
10
5
0.1 0.2
0.5 1
2
Reverse Drain Current
6
500
100
t d(off)
30
tf
10
t d(on)
3
1
0.1
tr
V GS = 10 V, V DD = 30 V
PW = 5 µs, duty < 1 %
0.2
0.5 1
5 10 20
2
Drain Current I D (A)
2SK2925(L),2SK2925(S)
(mJ)
Reverse Drain Current vs.
Source to Drain Voltage
Repetitive Avalanche Energy EAR
Reverse Drain Current I DR (A)
20
16
10 V
12
5V
V GS = 0, –5 V
8
4
Pulse Test
0
0.4
0.8
1.2
Source to Drain Voltage
1.6
2.0
Maximun Avalanche Energy vs.
Channel Temperature Derating
10
I AP = 10 A
V DD = 25 V
duty < 0.1 %
Rg > 50 W
8
6
4
2
0
25
50
V SD (V)
100
125
150
Channel Temperature Tch (°C)
Avalanche Test Circuit
V DS
Monitor
75
Avalanche Waveform
EAR =
L
1
2
• L • I AP •
2
I AP
Monitor
VDSS
VDSS – V DD
V (BR)DSS
I AP
Rg
D. U. T
V DS
VDD
ID
Vin
15 V
50W
0
VDD
7
2SK2925(L),2SK2925(S)
Normalized Transient Thermal Impedance vs. Pulse Width
Normalized Transient Thermal Impedance
g s (t)
3
Tc = 25°C
1
D=1
0.5
0.3
0.1
0.2
0.1
0.05
q ch – c(t) = g s (t) • q ch – c
q ch – c = 6.25 °C/W, Tc = 25 °C
0.02
e
uls
1
0.03
0.0
PDM
P
ot
D=
h
1s
PW
T
PW
T
0.01
10 µ
100 µ
1m
10 m
Pulse Width
100 m
1
PW (S)
Switching Time Test Circuit
Waveform
Vout
Monitor
Vin Monitor
10
90%
D.U.T.
RL
Vin
Vin
10 V
50W
V DD
= 30 V
Vout
10%
10%
90%
td(on)
8
tr
10%
90%
td(off)
tf
2SK2925(L),2SK2925(S)
Package Dimensions
9.5 ± 0.5
1.7 ± 0.5
2.3 ± 0.5
0.55 ± 0.1
1.15 ± 0.1
0.8 ± 0.1
2.29 ± 0.5
0.55 ± 0.1
L type
1.2 typ
S type
0 ~ 0.25
0.55 ± 0.1
2.29 ± 0.5
2.5 ± 0.5
2.29 ± 0.5
2.29 ± 0.5
6.5 ± 0.5
5.4 ± 0.5
5.5 ± 0.5
16.2 ± 0.5
3.1 ± 0.5
4.7 ± 0.5
1.15 ± 0.1
0.8 ± 0.1
1.2 Max
2.3 ± 0.2
0.55 ± 0.1
5.5 ± 0.5
6.5 ± 0.5
5.4 ± 0.5
1.7 ± 0.5
Unit: mm
Hitachi
EIAJ ( L type)
EIAJ ( S type)
JEDEC
DPAK–2
SC–63
SC–64
—
9
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