ADVANCE TECHNICAL INFORMATION HiPerFETTM MOSFET IXFC 80N10 VDSS ID25 RDS(on) trr ISOPLUS220TM Electrically Isolated Back Surface N-Channel Enhancement Mode High dv/dt, Low trr, HDMOSTM Family Symbol Test Conditions Maximum Ratings VDSS VDGR TJ = 25°C to 150°C TJ = 25°C to 150°C; RGS = 1 MΩ 100 100 V V VGS VGSM Continuous Transient ±20 ±30 V V ID25 IL(RMS) IDM TC = 25°C Lead current limit TC = 25°C, pulse width limited by TJM 80 55 320 A A A IAR TC = 25°C 80 A EAR EAS TC = 25°C 50 2.5 mJ J dv/dt IS ≤ IDM, di/dt ≤ 100 A/µs, VDD ≤ VDSS, TJ ≤ 150°C, RG = 2 Ω 5 V/ns PD TC = 25°C 230 W -55 ... +150 °C TJ 150 °C Tstg -55 ... +150 °C 300 °C TL 1.6 mm (0.062 in.) from case for 10 s FC Mounting force VISOL 50/60 Hz, RMS, leads-to-tab ISOPLUS 220TM G D S G = Gate, S = Source 11..65/2.4..11 Nm/lb Weight 2500 V~ 2 g Test Conditions Characteristic Values (TJ = 25°C, unless otherwise specified) min. typ. max. l l l l l V GS = 0 V, ID = 250 µA VGS(th) V DS = VGS, ID = 4 mA IGSS VGS = ±20 VDC, VDS = 0 IDSS V DS = VDSS VGS = 0 V RDS(on) V GS = 10 V, ID = IT Notes 1, 2 100 2.0 V 4.0 l l l DC-DC converters Batterychargers Switched-mode and resonant-mode power supplies DC choppers AC motor control V Advantages ±100 TJ = 25°C TJ = 125°C nA 50 µA 1 mA l l l © 2001 IXYS All rights reserved Silicon chip on Direct-Copper-Bond substrate - High power dissipation - Isolated mounting surface - 2500V electrical isolation Low drain to tab capacitance(<35pF) Low RDS (on) Rugged polysilicon gate cell structure Unclamped Inductive Switching (UIS) rated Fast intrinsicRectifier Applications l VDSS D = Drain, Features l Symbol Isolated back surface* * Patent pending l TJM = 100 V = 80 A Ω = 12.5 mΩ ≤ 200 ns 12.5 mΩ l Easy assembly: no screws or isolation foils required Space savings High power density Low collector capacitance to ground (low EMI) 98852 (8/01) IXFC 80N10 Symbol Test Conditions gfs V DS = 10 V; ID = IT Notes 1, 2 Characteristic Values (TJ = 25°C, unless otherwise specified) min. typ. max. 35 Ciss Coss V GS = 0 V, VDS = 25 V, f = 1 MHz 55 S 4800 pF 1675 pF 590 pF Crss 50 ns tr V GS = 10 V, VDS = 0.5 VDSS, 75 ns td(off) ID = 0.5 ID25, RG = 2.5 Ω (External) 95 ns 31 ns td(on) tf 180 nC Qgs V GS = 10 V, VDS = 0.5 VDSS, ID = IT 42 nC Qgd Notes 2 75 nC Qg(on) 0.54 RthJC Source-Drain Diode Test Conditions IS V GS = 0 V ISM Repetitive; pulse width limited by TJM VSD IF = IS, VGS = 0 V, Note 1 t rr IRM K/W Characteristic Values (TJ = 25°C, unless otherwise specified) min. typ. max. Symbol QRM K/W 0.3 RthCK IF = 25A -di/dt = 100 A/µs, VR = 50 V ISOPLUS220 OUTLINE 80 A 320 A 1.5 V 200 ns 0.5 µC 6 A Note: All terminals are solder plated. 1 - Gate 2 - Drain 3 - Source Note: 1. Pulse test, t ≤ 300 µs, duty cycle d ≤ 2 % 2. IT = 40A IXYS reserves the right to change limits, test conditions, and dimensions. IXYS MOSFETS and IGBTs are covered by one or more of the following U.S. patents: 4,835,592 4,850,072 4,881,106 4,931,844 5,017,508 5,034,796 5,049,961 5,063,307 5,187,117 5,237,481 5,486,715 5,381,025