DATA SHEET MOS FIELD EFFECT TRANSISTOR µ PA2730TP SWITCHING P-CHANNEL POWER MOS FET PACKAGE DRAWING (Unit: mm) DESCRIPTION The µPA2730TP which has a heat spreader is P-Channel MOS Field Effect Transistor designed for power management applications of notebook computers and Li-ion battery protection circuit. 5 1 0.8 ±0.2 0.05 ±0.05 +0.10 –0.05 Power HSOP8 0.12 M 1.1 ±0.2 4 2.9 MAX. ORDERING INFORMATION µPA2730TP 0.10 S 1.27 TYP. 0.40 2.0 ±0.2 PACKAGE 4.4 ±0.15 0.15 S 1 PART NUMBER 6.0 ±0.3 4 5.2 +0.17 –0.2 +0.10 –0.05 1.44 TYP. 1, 2, 3 ; Source 4 ; Gate 5, 6, 7, 8, 9 ; Drain 1.49 ±0.21 FEATURES • Low on-state resistance RDS(on)1 = 7.0 mΩ MAX. (VGS = –10 V, ID = –7.5 A) RDS(on)2 = 10.5 mΩ MAX. (VGS = –4.5 V, ID = –7.5 A) RDS(on)3 = 12.0 mΩ MAX. (VGS = –4.0 V, ID = –7.5 A) • Low Ciss: Ciss = 4670 pF TYP. • Small and surface mount package (Power HSOP8) 8 9 4.1 MAX. 8 5 ABSOLUTE MAXIMUM RATINGS (TA = 25°C, Unless otherwise noted, All terminals are connected.) Drain to Source Voltage (VGS = 0 V) Gate to Source Voltage (VDS = 0 V) Drain Current (DC) (TC = 25°C) Note1 Drain Current (DC) Note2 Drain Current (pulse) Total Power Dissipation (TC = 25°C) Note1 Total Power Dissipation (TA = 25°C) Channel Temperature Storage Temperature Note3 Single Avalanche Current Note3 Single Avalanche Energy VDSS VGSS ID(DC)1 ID(DC)2 ID(pulse) PT1 PT2 Tch Tstg IAS EAS −30 m20 m42 m20 m120 40 3 150 −55 to + 150 −15 22.5 V V A A A W W °C °C A mJ EQUIVALENT CIRCUIT Drain Body Diode Gate Source Notes 1. Mounted on a glass epoxy board (1 inch x 1 inch x 0.8 mm), PW = 10 sec 2. PW ≤ 10 µs, Duty Cycle ≤ 1% 3. Starting Tch = 25°C, VDD = –15 V, RG = 25 Ω, L = 100 µH, VGS = –20 → 0 V Remark Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with NEC Electronics sales representative for availability and additional information. Document No. G15983EJ1V0DS00 (1st edition) Date Published November 2002 NS CP(K) Printed in Japan 2002 µPA2730TP ELECTRICAL CHARACTERISTICS (TA = 25°C, Unless otherwise noted, All terminals are connected.) CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Zero Gate Voltage Drain Current IDSS VDS = –30 V, VGS = 0 V –1 µA Gate Leakage Current IGSS VGS = m20 V, VDS = 0 V m100 nA –2.5 V Gate Cut-off Voltage Forward Transfer Admittance Drain to Source On-state Resistance VGS(off) VDS = –10 V, ID = –1 mA –1.0 | yfs | VDS = –10 V, ID = –7.5 A 14 RDS(on)1 VGS = –10 V, ID = –7.5 A 5.7 7.0 mΩ RDS(on)2 VGS = –4.5 V, ID = –7.5 A 7.7 10.5 mΩ RDS(on)3 VGS = –4.0 V, ID = –7.5 A 8.8 12.0 mΩ 30 S Input Capacitance Ciss VDS = –10 V 4670 pF Output Capacitance Coss VGS = 0 V 1220 pF Reverse Transfer Capacitance Crss f = 1 MHz 760 pF Turn-on Delay Time td(on) VDD = –15 V, ID = –7.5 A 20 ns VGS = –10 V 28 ns RG = 10 Ω 190 ns 110 ns Rise Time tr Turn-off Delay Time td(off) Fall Time tf Total Gate Charge QG VDD = –24 V 97 nC Gate to Source Charge QGS VGS = –10 V 10 nC Gate to Drain Charge QGD ID = 15 A 32 nC Body Diode Forward Voltage VF(S-D) IF = 15 A, VGS = 0 V 0.81 V Reverse Recovery Time trr IF = 15 A, VGS = 0 V 65 ns Reverse Recovery Charge Qrr di/dt = 100 A/ µs 62 nC TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω PG. VGS = −20 → 0 V TEST CIRCUIT 2 SWITCHING TIME D.U.T. L 50 Ω VDD VGS(−) RL Wave Form RG PG. VGS 0 VGS 10% 90% VDD VDS(−) 90% BVDSS IAS VDS VDS ID Starting Tch τ τ = 1 µs Duty Cycle ≤ 1% TEST CIRCUIT 3 GATE CHARGE 2 10% 0 10% Wave Form VDD PG. 90% VDS VGS(−) 0 D.U.T. IG = −2 mA RL 50 Ω VDD Data Sheet G15983EJ1V0DS td(on) tr ton td(off) tf toff µPA2730TP TYPICAL CHARACTERISTICS (TA = 25°C) TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE 120 4 PT - Total Power Dissipation - W dT - Percentage of Rated Power - % DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 100 80 60 40 20 Mounted on a glass epoxy board (1 inch × 1 inch × 0.8 mm) T A = 25°C , PW = 10 s , Single pulse 3.5 3 2.5 2 1.5 1 0.5 0 0 0 25 50 75 100 125 150 175 0 25 TA - Ambient Temperature - °C 50 75 100 125 150 175 TA - Ambient Temperature - °C FORWARD BIAS SAFE OPERATING AREA - 1000 ID(pulse) - 100 PW = 100 µs I D(DC) 1 ms - 10 10 ms -1 - 0.1 Power Dissipation Limited 100 ms Mounted on a glass epoxy board (1 inch ×1 inch × 0.8 m m) T A = 25°C , Single pulse 10 s - 0.01 - 0.1 -1 - 10 - 100 VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 rth(t) - Transient Thermal Resistance - °C/W ID - Drain Current - A R DS(on) Limited (at V GS = −10 V) Single pulse Rth(ch-A) = 89.3°C/W 100 10 Rth(ch-C) = 3.13°C/W 1 0.1 0.01 100 µ Remark rth(ch-A) : Mounted on a glass epoxy board (1 inch × 1 inch × 0.8 mm) , TA = 25°C rth(ch-C) : TC = 25°C 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s Data Sheet G15983EJ1V0DS 3 µPA2730TP DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS - 120 - 1000 VGS = −10 V −4.5 V ID - Drain Current - A ID - Drain Current - A - 100 −4.0 V - 80 - 60 - 40 - 100 T ch = 150°C 75°C 25°C −55°C - 10 -1 - 0.1 - 20 Pulsed V D S = −10 V Pulsed 0 - 0.01 0 -1 -2 | yfs | - Forward Transfer Admittance - S - 1.5 -1 - 0.5 0 -50 0 50 100 100 -5 10 1 Pulsed V DS = −10 V 0.1 - 0.1 150 DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 20 Pulsed 15 V GS = −4.0 V −4.5 V −10 V 5 -1 - 10 -1 - 10 - 100 ID - Drain Current - A - 100 RDS(on) - Drain to Source On-state Resistance - mΩ RDS(on) - Drain to Source On-state Resistance - mΩ -4 T ch = −55°C 25°C 75°C 150°C Tch - Channel Temperature - °C DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 20 ID = −7.5 A Pulsed 15 10 5 0 0 -5 - 10 - 15 VGS - Gate to Source Voltage - V ID - Drain Current - A 4 -3 FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT - 0 - 0.1 -2 GATE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE - 2.5 10 -1 VGS - Gate to Source Voltage - V V D S = −10 V ID = −1 m A -2 0 VDS - Drain to Source Voltage - V -3 VGS(off) - Gate Cut-off Voltage - V -3 Data Sheet G15983EJ1V0DS - 20 DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 15 CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 10000 ID = −7.5 A Pulsed C is s Ciss, Coss, Crss - Capacitance - pF RDS(on) - Drain to Source On-state Resistance - mΩ µPA2730TP V GS = -4.0 V −4.5 V 10 −10 V 5 C oss 1000 C rs s 100 VGS = 0 V f = 1 MHz 0 -50 0 50 100 10 - 0 .0 1 150 - 0 .1 -1 - 10 - 100 Tch - Channel Temperature - °C VDS - Drain to Source Voltage - V SWITCHING CHARACTERISTICS DYNAMIC INPUT/OUTPUT CHARACTERISTICS -3 0 t d(off) 100 tf tr t d(on) 10 V D D = −15 V V G S = −10 V R G = 10 Ω -1 5 VDS -2 0 -1 0 -5 V GS -1 - 10 0 0 - 100 20 40 60 80 10 0 QG - Gate Charge - nC ID - Drain Current - A SOURCE TO DRAIN DIODE FORWARD VOLTAGE REVERSE RECOVERY TIME vs. DIODE FORWARD CURRENT 1000 1000 trr - Reverse Recovery Time - ns Pulsed IF - Diode Forward Current - A -1 0 V D D = −24 V −15 V −6 V 0 1 - 0.1 VGS - Gate to Source Voltage - V VDS - Drain to Source Voltage - V td(on), tr, td(off), tf - Switching Time - ns 1000 V G S = −10 V 100 0V 10 1 0.1 di/dt = 100 A/µs V GS = 0 V 100 0.01 10 1 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 VF(S-D) - Source to Drain Voltage - V 0.1 1 10 100 IF - Diode Forword Current - A Data Sheet G15983EJ1V0DS 5 µPA2730TP SINGLE AVALANCHE CURRENT vs. INDUCTIVE LOAD SINGLE AVALANCHE ENERGY DERATING FACTOR 120 Energy Derating Factor - % IAS - Single Avalanche Current - A - 100 IA S = −15 A - 10 E A S = 22.5 m J -1 V D D = −15 V R G = 25 Ω V G S = −20 → 0 V Starting T ch = 25°C - 0.1 0.01 100 80 60 40 20 0 0.1 1 10 L - Inductive Load - mH 6 V DD = −15 V R G = 25 Ω V GS = −20 → 0 V IAS ≤ −15 A 25 50 75 100 125 150 Starting Tch - Starting Channel Temperature - °C Data Sheet G15983EJ1V0DS µPA2730TP [MEMO] Data Sheet G15983EJ1V0DS 7 µPA2730TP • The information in this document is current as of November, 2002. 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