DATA SHEET MOS FIELD EFFECT TRANSISTOR µ PA2755GR SWITCHING N-CHANNEL POWER MOS FET DESCRIPTION PACKAGE DRAWING (Unit: mm) The µ PA2755GR is Dual N-channel MOS Field Effect Transistor designed for DC/DC converters and power management applications of notebook computers. 8 5 1 : Source 1 2 : Gate 1 7, 8: Drain 1 FEATURES PART NUMBER PACKAGE µ PA2755GR Power SOP8 4.4 0.15 0.05 MIN. ORDERING INFORMATION 6.0 ±0.3 4 5.37 MAX. 0.8 +0.10 –0.05 1.44 1 1.8 MAX. • Dual chip type • Low on-state resistance RDS(on)1 = 18 mΩ MAX. (VGS = 10 V, ID = 4.0 A) RDS(on)2 = 29 mΩ MAX. (VGS = 4.5 V, ID = 4.0 A) • Low Ciss: Ciss = 650 pF TYP. • Built-in G-S protection diode • Small and surface mount package (Power SOP8) 3 : Source 2 4 : Gate 2 5, 6: Drain 2 0.5 ±0.2 0.10 1.27 0.78 MAX. 0.40 +0.10 –0.05 0.12 M ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.) Drain to Source Voltage (VGS = 0 V) VDSS 30 V Gate to Source Voltage (VDS = 0 V) VGSS ±20 V Drain Current (DC) (TC = 25°C) ID(DC) ±8.0 A ID(pulse) ±32 A PT 1.7 W PT 2.0 W Tch 150 °C Drain Current (pulse) Note1 Total Power Dissipation (1 unit) Note2 Total Power Dissipation (2 units) Channel Temperature Storage Temperature Single Avalanche Current Note3 Single Avalanche Energy Note3 Note2 Tstg −55 to +150 °C IAS 8 A EAS 6.4 mJ EQUIVALENT CIRCUIT (1/2 circuit) Drain Body Diode Gate Gate Protection Diode Source Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1% 2. Mounted on ceramic substrate of 2000 mm2 x 2.2 mm 3. Starting Tch = 25°C, VDD = 15 V, RG = 25 Ω, VGS = 20 → 0 V Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. G16639EJ1V0DS00 (1st edition) Date Published November 2003 NS CP(K) Printed in Japan 2003 µ PA2755GR ELECTRICAL CHARACTERISTICS (TA = 25°C, All terminals are connected.) CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Zero Gate Voltage Drain Current IDSS VDS = 30 V, VGS = 0 V 10 µA Gate Leakage Current IGSS VGS = ±18 V, VDS = 0 V ±10 µA VGS(off) VDS = 10 V, ID = 1 mA 1.5 2.5 V | yfs | VDS = 10 V, ID = 4.0 A 2.8 RDS(on)1 VGS = 10 V, ID = 4.0 A 14 18 mΩ RDS(on)2 VGS = 4.5 V, ID = 4.0 A 21 29 mΩ Gate Cut-off Voltage Forward Transfer Admittance Note Drain to Source On-state Resistance Note 5.7 S Input Capacitance Ciss VDS = 10 V 650 pF Output Capacitance Coss VGS = 0 V 150 pF Reverse Transfer Capacitance Crss f = 1 MHz 98 pF Turn-on Delay Time td(on) VDD = 15 V, ID = 4.0 A 12 ns tr VGS = 10 V 16 ns td(off) RG = 10 Ω 38 ns 8.0 ns Rise Time Turn-off Delay Time Fall Time tf Total Gate Charge QG VDD = 24 V 13 nC Gate to Source Charge QGS VGS = 10 V 2.2 nC QGD ID = 8.0 A 3.8 nC VF(S-D) IF = 8.0 A, VGS = 0 V 0.84 V Reverse Recovery Time trr IF = 8.0 A, VGS = 0 V 17 ns Reverse Recovery Charge Qrr di/dt = 100 A/µs 8.2 nC Gate to Drain Charge Body Diode Forward Voltage Note Note Pulsed TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω PG. VGS = 20 → 0 V TEST CIRCUIT 2 SWITCHING TIME D.U.T. L 50 Ω VGS RL Wave Form RG PG. VDD VGS 0 VGS 10% 90% VDD VDS 90% IAS VDS VDS ID Starting Tch τ τ = 1 µs Duty Cycle ≤ 1% TEST CIRCUIT 3 GATE CHARGE PG. 2 50 Ω 10% 0 10% Wave Form VDD D.U.T. IG = 2 mA 90% VDS VGS 0 BVDSS RL VDD Data Sheet G16639EJ1V0DS td(on) tr ton td(off) tf toff µ PA2755GR TYPICAL CHARACTERISTICS (TA = 25°C) TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE 120 PT - Total Power Dissipation - W/package dT - Percentage of Rated Power - % DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 100 80 60 40 20 0 0 20 40 60 80 100 120 140 160 2.8 Mounted on ceramic substrate of 2000 mm2 × 2.2 mm 2.4 2 units 2.0 1 unit 1.6 1.2 0.8 0.4 0 0 20 40 60 80 100 120 140 160 TA - Ambient Temperature - °C TA - Ambient Temperature - °C FORWARD BIAS SAFE OPERATING AREA 100 ID( pulse) 10 RDS( on ) Limit ed (at V GS = 10 V) 1 1 ms 10 ms Power Dissipation Limited 0.1 100 ms M ount ed on ceramic subst rat e of 2000 mm2 x 2.2mm, 1 unit DC TA = 25°C Single pulse 0.01 0.01 0.1 1 10 100 VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 rth(t) - Transient Thermal Resistance - °C/W ID - Drain Current - A PW = 100 µ s ID( DC) Rth(ch-A) = 73.5°C/W 100 10 1 Mounted on ceramic substrate of 2000 mm2 x 2.2 mm Single pulse, 1 unit TA = 25°C 0.1 100 µ 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s Data Sheet G16639EJ1V0DS 3 µ PA2755GR DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS 100 40 VDS = 10 V P ulsed Pulsed 10 30 ID - Drain Current - A ID - Drain Current - A 35 VGS = 10 V 25 4.5 V 20 15 10 T A = 150°C 75°C 25°C −40°C 1 0.1 0.01 0.001 5 0.0001 0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 | yfs | - Forward Transfer Admittance - S VGS(off) - Gate Cut-off Voltage - V 1 0.5 0 -25 0 25 50 75 100 125 150 VDS = 10 V P ulsed 1 T A = −40°C 25°C 75°C 150°C 0.1 0.01 0.01 175 0.1 DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 50 VGS = 10 V Pulsed 40 30 VGS = 4.5 V 20 10 V 0 10 100 1 10 100 I D RDS(on) - Drain to Source On-state Resistance - mΩ RDS(on) - Drain to Source On-state Resistance - mΩ 5 10 Tch - Channel Temperature - °C - Drain Current - A DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 60 Pulsed 40 8.0 A 20 ID = 4.0 A 0 0 5 10 15 VGS - Gate to Source Voltage - V ID - Drain Current – A 4 4 FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 1.5 1 3 GATE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE 2 10 2 VGS - Gate to Source Voltage - V VDS = 10 V ID = 1mA -50 1 VDS - Drain to Source Voltage - V 3 2.5 0 1.4 Data Sheet G16639EJ1V0DS 20 DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 10000 35 ID = 4.0 A Pulsed 30 Ciss, Coss, Crss - Capacitance - pF VGS = 4.5 V 25 20 15 10 V 10 5 0 VGS = 0 V f = 1 MHz 1000 Ciss 100 Coss Crss 10 -50 -25 0 25 50 75 100 125 150 175 0.1 1 Tch - Channel Temperature - °C DYNAMIC INPUT/OUTPUT CHARACTERISTICS 30 1000 VDD = 15 V VGS = 10 V RG = 10 Ω VDS - Drain to Source Voltage - V td(on), tr, td(off), tf - Switching Time - ns 100 VDS - Drain to Source Voltage - V SWITCHING CHARACTERISTICS 100 td(off) tr td(on) 10 tf 1 15 ID = 8.0 A 25 VDD = 24 V 15 V 6V 20 15 10 10 5 VGS 5 VDS 0 0.1 1 10 100 0 0 ID - Drain Current - A 2 4 6 8 10 12 14 QG - Gate Charge - nC SOURCE TO DRAIN DIODE FORWARD VOLTAGE REVERSE RECOVERY TIME vs. DIODE FORWARD CURRENT 100 1000 4.5 V 10 trr - Reverse Recovery Time - ns VGS = 10 V IF - Diode Forward Current - A 10 VGS - Gate to Source Voltage - V RDS(on) - Drain to Source On-state Resistance - mΩ µ PA2755GR 0V 1 0.1 Pulsed 0.5 1 100 10 1 0.01 0 VGS = 0 V di/dt = 100 A/µs 1.5 0.1 1 10 100 IF - Diode Forward Current - A VF(S-D) - Source to Drain Voltage - V Data Sheet G16639EJ1V0DS 5 µ PA2755GR SINGLE AVALANCHE CURRENT vs. INDUCTIVE LOAD 10 120 RG = 25 Ω VDD = 15 V VGS = 20 0V Starting Tch = 25˚C Energy Derating Factor - % IAS - Single Avalanche Current - A 100 IAS = 8 A EAS = 6.4 mJ 1 10 µ 100 µ 1m SINGLE AVALANCHE ENERGY DERATING FACTOR 100 m 100 80 60 40 20 0 L - Inductive Load - H 6 RG = 25 Ω VDD = 15 V VGS = 20 0V IAS 8 A 25 50 75 100 125 150 Starting Tch - Starting Channel Temperature - °C Data Sheet G16639EJ1V0DS µ PA2755GR • The information in this document is current as of November, 2003. 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