NEC UPA2790GR

DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA2790GR
SWITCHING
N- AND P-CHANNEL POWER MOS FET
DESCRIPTION
PACKAGE DRAWING (Unit: mm)
The µ PA2790GR is N- and P-channel MOS Field Effect
Transistors designed for Motor Drive application.
8
N-channel 1 : Source 1
2 : Gate 1
7, 8 : Drain 1
5
FEATURES
P-channel 3 : Source 2
4 : Gate 2
5, 6 : Drain 2
• Low on-state resistance
N-channel RDS(on)1 = 28 mΩ MAX. (VGS = 10 V, ID = 3 A)
• Low input capacitance
N-channel Ciss = 500 pF TYP.
P-channel
4.0
Ciss = 460 pF TYP.
1.0
+0.05
–0.10
5.37 Max.
0.10 Min.
RDS(on)2 = 80 mΩ MAX. (VGS = −4.5 V, ID = −3 A)
4
0.20
P-channel RDS(on)1 = 60 mΩ MAX. (VGS = −10 V, ID = −3 A)
6.0 ±0.3
1
1.8 Max.
RDS(on)2 = 40 mΩ MAX. (VGS = 4.5 V, ID = 3 A)
0.6
1.27
0.12 M
0.40 +0.11
–0.05
0.5 ±0.2
0.10
EQUIVALENT CIRCUITS
• Built-in gate protection diode
• Small and surface mount package (Power SOP8)
N-channel
P-channel
Drain
ORDERING INFORMATION
PART NUMBER
PACKAGE
µ PA2790GR
Power SOP8
Body
Diode
Gate
Gate
Protection
Diode
Drain
Source
Body
Diode
Gate
Gate
Protection
Diode
Source
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage exceeding
the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G16954EJ2V0DS00 (2nd edition)
Date Published August 2004 NS CP(K)
Printed in Japan
The mark
shows major revised points.
2004
µ PA2790GR
ABSOLUTE MAXIMUM RATINGS (TA = 25°C. All terminals are connected.)
PARAMETER
SYMBOL
N-CHANNEL
P-CHANNEL
UNIT
Drain to Source Voltage (VGS = 0 V)
VDSS
30
−30
V
Gate to Source Voltage (VDS = 0 V)
VGSS
±20
m20
V
Drain Current (DC)
ID(DC)
±6
m6
A
ID(pulse)
±24
m24
A
Drain Current (pulse)
Note1
Total Power Dissipation (1 unit)
Note2
Total Power Dissipation (2 units)
Note2
Channel Temperature
Storage Temperature
Single Avalanche Current
Single Avalanche Energy
Note3
Note3
PT
1.7
W
PT
2.0
W
Tch
150
°C
Tstg
−55 to +150
°C
IAS
6
−6
A
EAS
3.6
3.6
mJ
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1%
2
2. Mounted on ceramic substrate of 2000 mm x 1.6 mm
3. Starting Tch = 25°C, VDD =
1
2
2
x VDSS, RG = 25 Ω, L = 100 µH, VGS = VGSS → 0 V
Data Sheet G16954EJ2V0DS
µ PA2790GR
ELECTRICAL CHARACTERISTICS (TA = 25°C. All terminals are connected.)
N-channel
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
Zero Gate Voltage Drain Current
IDSS
VDS = 30 V, VGS = 0 V
Gate Leakage Current
IGSS
VGS = ±16 V, VDS = 0 V
Gate Cut-off Voltage
VGS(off)
Forward Transfer Admittance
Note
Drain to Source On-state Resistance
Note
MIN.
VDS = 10 V, ID = 1 mA
TYP.
MAX.
UNIT
10
µA
±10
µA
2.5
V
1.5
| yfs |
VDS = 10 V, ID = 3 A
RDS(on)1
VGS = 10 V, ID = 3 A
21
28
mΩ
RDS(on)2
VGS = 4.5 V, ID = 3 A
28
40
mΩ
RDS(on)3
VGS = 4.0 V, ID = 3 A
34
53
mΩ
2
S
Input Capacitance
Ciss
VDS = 10 V
500
pF
Output Capacitance
Coss
VGS = 0 V
135
pF
Reverse Transfer Capacitance
Crss
f = 1 MHz
77
pF
Turn-on Delay Time
td(on)
VDD = 15 V, ID = 3 A
9.2
ns
tr
VGS = 10 V
8.8
ns
td(off)
RG = 10 Ω
28
ns
7.4
ns
Rise Time
Turn-off Delay Time
Fall Time
tf
Total Gate Charge
QG
ID = 6 A
12.6
nC
Gate to Source Charge
QGS
VDD = 24 V
1.7
nC
QGD
VGS = 10 V
3.8
nC
VF(S-D)
IF = 6 A, VGS = 0 V
0.85
V
Reverse Recovery Time
trr
IF = 6 A, VGS = 0 V
18
ns
Reverse Recovery Charge
Qrr
di/dt = 100 A/µs
11
nC
Gate to Drain Charge
Body Diode Forward Voltage
Note
Note Pulsed
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
RG = 25 Ω
D.U.T.
L
50 Ω
PG.
VGS = 20 → 0 V
TEST CIRCUIT 2 SWITCHING TIME
RL
RG
PG.
VDD
VGS
VGS
Wave Form
0
VGS
10%
90%
VDD
VDS
90%
BVDSS
IAS
VDS
ID
VDS
0
10%
10%
tr
td(off)
Wave Form
τ
VDD
Starting Tch
90%
VDS
VGS
0
τ = 1 µs
Duty Cycle ≤ 1%
td(on)
ton
tf
toff
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
IG = 2 mA
PG.
50 Ω
RL
VDD
Data Sheet G16954EJ2V0DS
3
µ PA2790GR
P-channel
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Zero Gate Voltage Drain Current
IDSS
VDS = −30 V, VGS = 0 V
−10
µA
Gate Leakage Current
IGSS
VGS = m16 V, VDS = 0 V
m10
µA
VGS(off)
VDS = −10 V, ID = −1 mA
−2.5
V
Gate Cut-off Voltage
Forward Transfer Admittance
Note
Drain to Source On-state Resistance
Note
−1.0
| yfs |
VDS = −10 V, ID = −3 A
RDS(on)1
VGS = −10 V, ID = −3 A
43
60
mΩ
RDS(on)2
VGS = −4.5 V, ID = −3 A
58
80
mΩ
RDS(on)3
VGS = −4.0 V, ID = −3 A
65
110
mΩ
2
S
Input Capacitance
Ciss
VDS = −10 V
460
pF
Output Capacitance
Coss
VGS = 0 V
130
pF
Reverse Transfer Capacitance
Crss
f = 1 MHz
77
pF
Turn-on Delay Time
td(on)
VDD = −15 V, ID = −3 A
8.5
ns
VGS = −10 V
4.8
ns
RG = 10 Ω
42
ns
19
ns
Rise Time
tr
Turn-off Delay Time
td(off)
Fall Time
tf
Total Gate Charge
QG
ID = −6 A
11
nC
Gate to Source Charge
QGS
VDD = −24 V
1.7
nC
QGD
VGS = −10 V
3.3
nC
VF(S-D)
IF = 6 A, VGS = 0 V
0.92
V
Reverse Recovery Time
trr
IF = 6 A, VGS = 0 V
21
ns
Reverse Recovery Charge
Qrr
di/dt = 100 A/µs
12
nC
Gate to Drain Charge
Body Diode Forward Voltage
Note
Note Pulsed
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
RG = 25 Ω
D.U.T.
L
RL
50 Ω
PG.
VGS = −20 → 0 V
VDD
RG
PG.
VGS(−)
VGS
Wave Form
0
VGS
10%
90%
VDD
VDS(−)
−
IAS
BVDSS
VDS
ID
VGS(−)
0
VDS
Wave Form
τ
VDD
Starting Tch
τ = 1 µs
Duty Cycle ≤ 1%
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
PG.
4
IG = −2 mA
RL
50 Ω
VDD
Data Sheet G16954EJ2V0DS
VDS
90%
90%
10% 10%
0
td(on)
tr td(off)
ton
tf
toff
µ PA2790GR
TYPICAL CHARACTERISTICS (TA = 25°C)
(1) N-channel
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
100
80
60
40
20
0
0
20
40
60
80
100 120 140 160
PT - Total Power Dissipation - W/package
dT - Percentage of Rated Power - %
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
2.8
Mounted on ceramic
substrate of
2000 mm2 x 1.6 mm
2.4
2 units
2.0
1 unit
1.6
1.2
0.8
0.4
0
0
20
TA - Ambient Temperature - ˚C
40
60
80
100 120 140 160
TA - Ambient Temperature - ˚C
FORWARD BIAS SAFE OPERATING AREA
100
10
PW = 100 µs
ID(DC)
DC
1
10 ms
100 ms
1 ms
Power Dissipation Limited
0.1
TA = 25°C
Single pulse
Mounted on ceramic substrate of
2
0.01
0.01
2000 mm x 1.6 mm
0.1
1
10
100
VDS - Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
rth(t) - Transient Thermal Resistance - °C/W
ID - Drain Current - A
ID(pulse)
RDS(on) Limited
(at VGS = 10 V)
Rth(ch-A) = 73.5°C/W
100
10
1
0.1
100 µ
TA = 25°C, Single pulse, 1 unit
Mounted on ceramic substrate of 2000 mm2 x 1.6 mm
1m
10 m
100 m
1
PW - Pulse Width - s
Data Sheet G16954EJ2V0DS
10
100
1000
5
µ PA2790GR
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
FORWARD TRANSFER CHARACTERISTICS
100
25
4.5 V
ID - Drain Current - A
ID - Drain Current - A
10 V
20
VGS = 4.0 V
15
10
10
TA = −55°C
25°C
75°C
150°C
1
0.1
5
VDS = 10 V
Pulsed
Pulsed
0
0.01
0
0.5
1
1.5
2
0
VDS - Drain to Source Voltage - V
| yfs | - Forward Transfer Admittance - S
1
VDS = 10 V
ID = 1 mA
0
RDS(on) - Drain to Source On-state Resistance - mΩ
100
5
TA = −55°C
25°C
75°C
150°C
10
1
VDS = 10 V
Pulsed
0.1
0.1
1
10
100
Tch - Channel Temperature - °C
ID - Drain Current - A
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
150
Pulsed
125
100
75
VGS = 4.0 V
4.5 V
10 V
50
25
0
0.1
1
10
100
150
ID = 3 A
Pulsed
125
100
75
50
25
0
0
5
10
15
VGS - Gate to Source Voltage - V
ID - Drain Current - A
6
4
100
150
RDS(on) - Drain to Source On-state Resistance - mΩ
VGS(off) - Gate Cut-off Voltage - V
2
50
3
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
3
0
2
VGS - Gate to Source Voltage - V
GATE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
-50
1
Data Sheet G16954EJ2V0DS
20
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
10000
50
VGS = 4.0 V
4.5 V
10 V
40
Ciss, Coss, Crss - Capacitance - pF
30
20
10
ID = 3 A
Pulsed
VGS = 0 V
f = 1 MHz
1000
Ciss
100
Coss
Crss
0
10
-50
0
50
100
150
0.1
Tch - Channel Temperature - °C
100
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
30
td(off)
tf
td(on)
10
tr
VDS = 15 V
VGS = 10 V
RG = 10 Ω
VDS - Drain to Source Voltage - V
100
td(on), tr, td(off), tf - Switching Time - ns
10
VDS - Drain to Source Voltage - V
SWITCHING CHARACTERISTICS
15
VDD = 24 V
15 V
6V
20
10
10
5
VGS
VDS
ID = 6 A
0
1
0.1
1
10
0
0
100
5
10
ID - Drain Current - A
QG - Gate Charge - nC
SOURCE TO DRAIN DIODE FORWARD VOLTAGE
REVERSE RECOVERY TIME vs.
DIODE FORWARD CURRENT
100
15
100
trr - Reverse Recovery Time - ns
IF - Diode Forward Current - A
1
VGS - Gate to Source Voltage - V
RDS(on) - Drain to Source On-state Resistance - mΩ
µ PA2790GR
10
VGS = 10 V
1
0V
0.1
10
di/dt = 100 A/µs
VGS = 0 V
Pulsed
0.01
1
0
0.5
1
0.1
VF(S-D) - Source to Drain Voltage - V
1
10
100
IF - Diode Forward Current - A
Data Sheet G16954EJ2V0DS
7
µ PA2790GR
(2) P-channel
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
100
80
60
40
20
0
0
20
40
60
80
100 120 140 160
PT - Total Power Dissipation - W/package
dT - Percentage of Rated Power - %
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
2.8
Mounted on ceramic
substrate of
2000 mm2 x 1.6 mm
2.4
2 units
2.0
1 unit
1.6
1.2
0.8
0.4
0
0
20
TA - Ambient Temperature - ˚C
40
60
80
100 120 140 160
TA - Ambient Temperature - ˚C
FORWARD BIAS SAFE OPERATING AREA
-100
ID(pulse)
ID - Drain Current - A
ID(DC)
-10
PW = 100 µs
RDS(on) Limited
(at VGS = −10 V)
DC
1 ms
-1
10 ms
100 ms
Power Dissipation Limited
-0.1
TA = 25°C
Single pulse
Mounted on ceramic substrate of
2000 mm2 x 1.6 mm
-0.01
-0.01
-0.1
-1
-10
-100
VDS - Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
rth(t) - Transient Thermal Resistance - °C/W
1000
10
1
TA = 25°C, Single pulse, 1 unit
Mounted on ceramic substrate of 2000 mm2 x 1.6 mm
0.1
100 µ
8
Rth(ch-A) = 73.5°C/W
100
1m
10 m
100 m
1
PW - Pulse Width - s
Data Sheet G16954EJ2V0DS
10
100
1000
µ PA2790GR
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
FORWARD TRANSFER CHARACTERISTICS
-100
-25
−4.5 V
ID - Drain Current - A
ID - Drain Current - A
VGS = −10 V
-20
-15
−4.0 V
-10
-5
-10
-1
TA = −55°C
25°C
75°C
150°C
-0.1
VDS = −10 V
Pulsed
Pulsed
0
-0.01
0
-0.5
-1
-1.5
-2
-2
-3
-4
-5
VGS - Gate to Source Voltage - V
GATE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
| yfs | - Forward Transfer Admittance - S
-2
-1
VDS = −10 V
ID = 1 mA
0
-50
0
50
100
150
100
TA = −55°C
25°C
75°C
150°C
10
1
VDS = −10 V
Pulsed
0.1
-0.1
-1
-10
-100
Tch - Channel Temperature - °C
ID - Drain Current - A
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
300
Pulsed
250
200
150
100
VGS = −4.0 V
−4.5 V
−10 V
50
0
-0.1
-1
-10
-100
RDS(on) - Drain to Source On-state Resistance - mΩ
VGS(off) - Gate Cut-off Voltage - V
-1
VDS - Drain to Source Voltage - V
-3
RDS(on) - Drain to Source On-state Resistance - mΩ
0
300
ID = −3 A
Pulsed
250
200
150
100
50
ID - Drain Current - A
0
0
-5
-10
-15
-20
VGS - Gate to Source Voltage - V
Data Sheet G16954EJ2V0DS
9
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
10000
100
VGS = −4.0 V
−4.5 V
−10 V
60
40
20
ID = 3 A
Pulsed
VGS = 0 V
f = 1 MHz
1000
Ciss
100
Crss
0
-50
0
50
100
10
-0.1
150
Tch - Channel Temperature - °C
-100
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
td(off)
tf
10
td(on
)
tr
1
-0.1
-1
VDS = −15 V
VGS = −10 V
RG = 10 Ω
-10
VDS - Drain to Source Voltage - V
td(on), tr, td(off), tf - Switching Time - ns
-10
-30
100
-15
VDD = −24 V
−15 V
−6 V
-20
-10
-10
-5
VGS
VDS
ID = −6 A
0
0
0
-100
5
10
ID - Drain Current - A
QG - Gate Charge - nC
SOURCE TO DRAIN DIODE FORWARD VOLTAGE
REVERSE RECOVERY TIME vs.
DIODE FORWARD CURRENT
15
100
trr - Reverse Recovery Time - ns
100
IF - Diode Forward Current - A
-1
VDS - Drain to Source Voltage - V
SWITCHING CHARACTERISTICS
VGS = −10 V
10
1
0V
0.1
10
di/dt = 100 A/µs
VGS = 0 V
Pulsed
0.01
1
0
0.5
1
0.1
VF(S-D) - Source to Drain Voltage - V
10
Coss
1
10
IF - Diode Forward Current - A
Data Sheet G16954EJ2V0DS
100
VGS - Gate to Source Voltage - V
80
Ciss, Coss, Crss - Capacitance - pF
RDS(on) - Drain to Source On-state Resistance - mΩ
µ PA2790GR
µ PA2790GR
• The information in this document is current as of August, 2004. The information is subject to
change without notice. For actual design-in, refer to the latest publications of NEC Electronics data
sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not
all products and/or types are available in every country. Please check with an NEC Electronics sales
representative for availability and additional information.
• No part of this document may be copied or reproduced in any form or by any means without the prior
written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may
appear in this document.
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M8E 02. 11-1