DATA SHEET MOS FIELD EFFECT TRANSISTOR µ PA2753GR SWITCHING N-CHANNEL POWER MOS FET DESCRIPTION PACKAGE DRAWING (Unit: mm) The µPA2753GR is Dual N-Channel MOS Field Effect Transistor designed for DC/DC converters and power management applications of notebook computers. 8 5 1 ; Source 1 2 ; Gate 1 7, 8 ; Drain 1 3 ; Source 2 4 ; Gate 2 5, 6 ; Drain 2 FEATURES • Dual chip type • Low on-state resistance RDS(on)1 = 21.4 mΩ MAX. (VGS = 10 V, ID = 4.0 A) RDS(on)2 = 31.6 mΩ MAX. (VGS = 4.5 V, ID = 4.0 A) RDS(on)3 = 36.4 mΩ MAX. (VGS = 4.0 V, ID = 4.0 A) • Low Ciss: Ciss = 620 pF TYP. • Built-in G - S protection diode • Small and surface mount package (Power SOP8) 6.0 ±0.3 4 4.4 5.37 Max. 0.8 0.15 +0.10 –0.05 1.44 0.05 Min. 1.8 Max. 1 1.27 0.40 0.5 ±0.2 0.10 0.78 Max. +0.10 –0.05 0.12 M ORDERING INFORMATION PART NUMBER PACKAGE µPA2753GR Power SOP8 ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.) Drain to Source Voltage (VGS = 0 V) VDSS 30 V Gate to Source Voltage (VDS = 0 V) VGSS ±20 V Drain Current (DC) ID(DC) ±8.0 A ID(pulse) ±32 A PT 1.7 W Drain Current (pulse) Note1 Total Power Dissipation (1 unit) Note2 Total Power Dissipation (2 unit) Note2 Channel Temperature Storage Temperature Single Avalanche Current Note3 Single Avalanche Energy Note3 PT 2.0 W Tch 150 °C Tstg –55 to + 150 °C IAS 8 A EAS 6.4 mJ EQUIVALENT CIRCUIT (1/2 Circuit) Drain Body Diode Gate Gate Protection Diode Source Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1% 2 2. TA = 25°C, Mounted on ceramic substrate of 2000 mm x 2.2 mm 3. Starting Tch = 25°C, VDD = 15 V, RG = 25 Ω, VGS = 20 → 0 V Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. G15782EJ1V0DS00 (1st edition) Date Published February 2002 NS CP(K) Printed in Japan © 2001 µPA2753GR ELECTRICAL CHARACTERISTICS (TA = 25°C, All terminals are connected.) CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Zero Gate Voltage Drain Current IDSS VDS = 30 V, VGS = 0 V 10 µA Gate Leakage Current IGSS VGS = ±18 V, VDS = 0 V ±10 µA 2.5 V Gate Cut-off Voltage Forward Transfer Admittance Drain to Source On-state Resistance VGS(off) VDS = 10 V, ID = 1 mA 1.5 2.0 | yfs | VDS = 10 V, ID = 4.0 A 3.0 5.5 RDS(on)1 VGS = 10 V, ID = 4.0 A 17.1 21.4 mΩ RDS(on)2 VGS = 4.5 V, ID = 4.0 A 23.3 31.6 mΩ RDS(on)3 36.4 mΩ S VGS = 4.0 V, ID = 4.0 A 26.7 Input Capacitance Ciss VDS = 10 V 620 pF Output Capacitance Coss VGS = 0 V 160 pF Reverse Transfer Capacitance Crss f = 1 MHz 100 pF Turn-on Delay Time td(on) VDD = 15 V, ID = 4.0 A 11.2 ns tr VGS = 10 V 7.0 ns td(off) RG = 10 Ω 33.0 ns 6.7 ns Rise Time Turn-off Delay Time Fall Time tf Total Gate Charge QG VDD = 24 V 14.9 nC Gate to Source Charge QGS VGS = 10 V 2.2 nC Gate to Drain Charge QGD ID = 8.0 A 4.3 nC VF(S-D) IF = 8.0 A, VGS = 0 V 0.86 V Reverse Recovery Time trr IF = 8.0 A, VGS = 0 V 25 ns Reverse Recovery Charge Qrr di/dt = 100 A/ µs 18 nC Body Diode Forward Voltage TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω PG. VGS = 20 → 0 V TEST CIRCUIT 2 SWITCHING TIME D.U.T. L 50 Ω VGS RL Wave Form RG PG. VDD VGS 0 VGS 10% 90% VDD VDS 90% BVDSS IAS VDS VDS ID Starting Tch τ τ = 1 µs Duty Cycle ≤ 1% TEST CIRCUIT 3 GATE CHARGE 2 10% 0 10% Wave Form VDD PG. 90% VDS VGS 0 D.U.T. IG = 2 mA RL 50 Ω VDD Data Sheet G15782EJ1V0DS td(on) tr ton td(off) tf toff µPA2753GR TYPICAL CHARACTERISTICS (TA = 25°C) DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS 100 40 Pulsed Pulsed 35 ID - Drain Current - A ID - Drain Current - A VGS = 4.5 V 10 TA = 150˚C TA = 75˚C 1 TA = 25˚C TA = −25˚C 0.1 30 VGS = 10 V 25 VGS = 4.0 V 20 15 10 5 VDS = 10 V 0.01 0 1 2 3 4 0 5 0 0.2 VGS - Gate to Source Voltage - V 1 TA = 75˚C TA = 150˚C 0.1 0.01 0.1 1 10 100 RDS(on) - Drain to Source On-state Resistance - mΩ ID - rain Current - A RDS(on) - Drain to Source On-state Resistance - mΩ TA = −25˚C TA = 25˚C 100 VGS = 4.0 V 60 40 VGS = 4.5 V 20 VGS = 10 V 0 0.1 1 10 1.2 1 1.4 70 ID = 8.0 A 60 50 40 30 20 10 0 5 0 10 15 20 VGS - Gate to Source Voltage - V GATE TO SOURCE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE Pulsed 80 0.8 DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 100 Pulsed 90 ID = 4.0 A 80 DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 100 VGS(off) - Gate to Source Cut-off Voltage - V | yfs | - Forward Transfer Admittance - S VDS = 10 V Pulsed 10 0.6 VDS - Drain to Source Voltage - V FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 100 0.4 3 VDS = 10 V ID = 1 mA 2.5 2 1.5 1 0.5 0 − 50 0 50 100 150 Tch - Channel Temperature - ˚C ID - Drain Current - A Data Sheet G15782EJ1V0DS 3 SOURCE TO DRAIN DIODE FORWARD VOLTAGE DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 50 Pulsed 40 VGS = 4 V VGS = 4.5 V VGS = 10 V 20 10 0 − 50 Pulsed VGS = 10 V 50 100 VGS = 0 V 1 0.1 ID = 4.0 A 0 VGS = 4 V 10 0.01 150 0 CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE SWITCHING CHARACTERISTICS VGS = 0 V f = 1 MHz 1000 Ciss 100 Coss Crss 10 0.1 1 10 100 td(off) tf td(on) 10 tr 1 0.1 0.1 100 1 trr - Reverse Recovery Time - ns di/dt = 100 A/ µ s VGS = 0 V 100 10 1 10 VDS - Drain to Source Voltage - V REVERSE RECOVERY TIME vs. DRAIN CURRENT 1 0.1 10 DYNAMIC INPUT/OUTPUT CHARACTERISTICS 14 35 ID = 8.0 A 12 30 10 25 VDD = 24 V VDD = 15 V VDD = 6 V 20 8 VGS 15 6 4 10 100 2 5 VDS 0 0 0 2 4 6 8 10 12 QG - Gate Charge - nC ID - Drain Current - A 4 VDS = 15 V VGS = 10 V RG = 10 Ω 100 ID - Drain Current - A VDS - Drain to Source Voltage - V 1000 1.5 1000 td(on), tr, td(off), tf - Switching Time - ns Ciss, Coss, Crss - Capacitance - pF 10000 1 0.5 VSD - Source to Drain Voltage - V Tch - Channel Temperature - ˚C Data Sheet G15782EJ1V0DS 14 16 VGS - Gate to Source Voltage - V 30 100 IF - Diode Forward Current - A RDS(on) - Drain to Source On-state Resistance - mΩ µPA2753GR µPA2753GR TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE PT - Total Power Dissipation - W/package dT - Percentage of Rated Power - % DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 100 80 60 40 20 0 20 40 60 80 100 120 140 160 2.8 Mounted on ceramic substrate of 2000 mm2 × 2.2 mm 2.4 2.0 2 unit 1 unit 1.6 1.2 0.8 0.4 0 20 TA - Ambient Temperature - ˚C 40 60 80 100 120 140 160 TA - Ambient Temperature - ˚C FORWARD BIAS SAFE OPERATING AREA 100 n) 10 PW ID(DC) s 10 Po we r 1 10 0m s =1 00 1m µs ms Dis sip ati on Lim ite d 0.1 Mounted on ceramic substrate of 0.01 2000 mm × 2.2 mm, 1 unit 1 0.1 2 10 100 VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH rth(t) - Transient Thermal Resistance - ˚C/W ID - Drain Current - A S(o RD VGS (at TA = 25˚C Single Pulse ID(pulse) d ite ) Lim 0 V =1 1000 Rth(ch-A) = 73.5˚C/W 100 10 1 0.1 0.01 100 µ Mounted on ceramic substrate of 2000 mm2 × 2.2 mm Single Pulse, 1 unit, TA = 25˚C 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s Data Sheet G15782EJ1V0DS 5 µPA2753GR SINGLE AVALANCHE CURRENT vs. INDUCTIVE LOAD 10 RG = 25 VDD = 15 V 0V VGS = 20 Starting Tch = 25˚C IAS = 8 A EAS = 6.4 mJ 1 10 100 1m 120 Energy Derating Factor - % IAS - Single Avalanche Current - A 100 SINGLE AVALANCHE ENERGY DERATING FACTOR 100 80 60 40 20 10 m L - Inductive Load - H 6 RG = 25 VDD = 15 V 0V VGS = 20 IAS 8 A 0 25 50 75 100 125 150 Starting Tch - Starting Channel Temperature - ˚C Data Sheet G15782EJ1V0DS µPA2753GR [MEMO] Data Sheet G15782EJ1V0DS 7 µPA2753GR • The information in this document is current as of February, 2002. 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