NEC UPC8100GR-E2

DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
µPC8100GR
SILICON UP/DOWN CONVERTERS IC
FOR 800 MHz to 900 MHz MOBILE COMMUNICATIONS
DESCRIPTION
µPC8100GR is a silicon monolithic integrated circuit designed as up/down converters for 800 MHz to 900 MHz mobile
communications, mainly CT2. This IC consists of upconverter and downconverter, which are packaged in 20 pin SSOP.
Quadrature modulator IC (µPC8101GR) is also available as for kit-use with this IC. So, these pair devices contribute to
make RF block small, high-performance and low power-consumption.
This product is manufactured using NEC’s 20 GHz f T NESATIII silicon bipolar process. This process uses silicon nitride
passivation film and gold electrodes. These materials can protect chip surface from external pollution and prevent corrosion
and migration. Thus, this product has excellent performance, uniformity and reliability.
FEATURES
• Operating frequency – fRF = 800 MHz to 900 MHz, fIF = 50 MHz to 150 MHz, fLo = 650 MHz to 1 050 MHz
• Upconverter and downconverter are integrated in 1 chip.
• 20 pin SSOP suitable for high-density surface mounting.
• Wide operating voltage VCC = 2.7 to 4.5 V
• Equipped with Power Save Function.
• Excellent linearity
APPLICATIONS
• Typical application – Digital cordless phone CT2.
• Further application – Digital cellular, etc.
ORDERING INFORMATION
PART NUMBER
µPC8100GR-E2
PACKAGE
20 pin plastic SSOP
(225 mil)
SUPPLYING FORM
Embossed tape 12 mm wide. QTY 2.5 kp/Reel.
Pin 1 indicates roll-in direction of tape.
Remark To order evaluation samples, please contact your local NEC sales office. (Order number: µPC8100GR)
Caution electro-static sensitive devices
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability
and additional information.
Document No. P10817EJ3V0DS00 (3rd edition)
Date Published October 1999 N CP(K)
Printed in Japan
The mark
shows major revised points.
©
1995,1999
µPC8100GR
INTERNAL BLOCK DIAGRAM AND PIN CONNECTIONS
(Top View)
20
19
18
17
16
15
14
13
12
11
REG. REG.
1
2
2
3
4
5
6
7
8
9
10
1. GND
1
2. RF BYPASS
3. RF INPUT
2
4. PEAKING OUT
3
5. P/S (for DOWN CONV.)
4
6. P/S (for UP CONV.)
5
7. VCC (for UP CONV.)
8. RF OUTPUT
6
9. GND
7
10. MIX OUTPUT1
8
11. MIX OUTPUT2
12. GND
9
13. IF BYPASS
10
14. IF INPUT
15. OSC INPUT (for UP CONV.)
16. OSC BYPASS (for UP CONV.)
17. OSC BYPASS (for DOWN CONV.)
18. OSC INPUT (for DOWN CONV.)
19. VCC (for DOWN CONV.)
20. IF OUTPUT
Data Sheet P10817EJ3V0DS00
20
19
18
17
16
15
14
13
12
11
µPC8100GR
PIN EXPLANATION
PIN
NO.
ASSIGNMENT
APPLIED
VOLTAGE (V)
PIN VOLTAGE
(V)
1
GND
0.0
–
FUNCTION AND APPLICATION
EQUIVALENT CIRCUIT
Ground for downconverter.
Must be connected to the system ground
with minimum inductance. Ground pattern on the board should be formed as
wide as possible.
(Track length should be kept as short as
possible.)
2
RF bypass
–
1.1
Bypass of RF input for downconverter.
3
RF input
–
0.9
This pin is RF input for downconverter
VCC
designed as double balanced mixer.
This high-impedance input should be
REG.
matched with external chip inductor. (eg
4.7 nH).
4
Peaking out
–
0.12
2
3
4
REG.
Open emitter pin of low noise amplifier.
Grounded with capacitor (eg 3 pF) and
register (eg 22 Ω) serially.
5
Power-save pin
0 to 4.5
–
for
This pin can control downconverter’s
ON/OFF operation with bias as follows;
downconverter
VPS
Bias: V
Operation
≥1.8
ON
0 to 1.0
OFF
5
6
Power-save pin
0 to 4.5
–
for
This pin can control upconverter’s ON/
OFF operation with bias as follows;
upconverter
Bias: V
VPS
7
VCC for
2.7 to 4.5
–
upconverter
or
6
Operation
≥1.8
ON
0 to 1.0
OFF
Supply voltage for upconverter.
Must be connected bypass capacitor
(e.g 1 000 pF) to minimize ground im-
REG.
8
pedance.
8
RF output
same as
–
VCC through
Connect the VCC through inductor (eg 15
intactor
9
GND
0.0
F output from upconverter.
nH).
–
Ground for RF amplifier of upconverter.
Data Sheet P10817EJ3V0DS00
3
µPC8100GR
PIN EXPLANATION
PIN
NO.
ASSIGNMENT
PIN VOLTAGE
(V)
10
MIX OUT 1
2.3
Mixer output from upconverter.
11
MIX OUT 2
2.3
Mixer output from upconverter.
FUNCTION AND APPLICATION
EQUIVALENT CIRCUIT
10 and 11 pins should be externally
equipped with tank circuit of inductor (eg
4.7 nH) and capacitor (eg 3.5 pF).
10
12
GND
0*
11
Ground for oscillator buffer amplifier and
VCC
mixer of upconverter.
Must be connected to the system ground
with minimum inductance. Ground
pattern on the board should be formed
13
14
as wide as possible.
(Track length should be kept as short as
REG.
possible.)
13
IF bypass
1.03
Bypass of IF input for upconverter.
14
IF input
1.03
This pin is IF input for upconverter
designed as double balanced mixer.
This high-impedance input should be
externally equipped with matching circuit
of inductor (eg 220 nH) and capacitor
(eg 1.5 pF).
15
OSC input
1.8
16
OSC bypass
1.8
(for upconverter)
17
OSC bypass
Local oscillator input for upconverter. Required for matching with register 51 Ω.
(for upconverter)
VCC
Bypass of local oscillator input for
upconverter.
1.85
(for down-
Bypass of local oscillator input for
downconverter.
15 , 18
16 , 17
converter)
18
19
OSC input
1.85
Local oscillator input for down-
(for down-
converter. Required for matching with
converter)
register 51 Ω.
VCC supply for
2.7 to 4.5*
Supply voltage for downconverter.
for down-
It must be connected bypass capacitor
converter
(e.g 1 000 pF) to minimize ground
impedance.
20
IF output
1.45
IF output from downconverter.
* Externally supply voltage
4
Data Sheet P10817EJ3V0DS00
VCC
20
µPC8100GR
ABSOLUTE MAXIMUM RATINGS
Supply Voltage
VCC
TA = +25 °C
5.0
V
Power Dissipation
PD
Mounted on 50 × 50 × 1.6 mm double copper
530
mW
clad epoxy glass board at TA = +70 °C
of package allowance
Operating Temperature
Topt
–20 to +70
°C
Storage Temperature
Tstg
–65 to +150
°C
RECOMMENDED OPERATING CONDITIONS
PARAMETERS
SYMBOL
MIN.
TYP.
MAX.
UNIT
Supply Voltage
VCC
2.7
3.0
4.5
V
Operating Temperature
Topt
–20
+25
+70
°C
ELECTRICAL CHARACTERISTICS (TA = +25 °C, VCC = 2.7 V, ZL = ZS = 50 Ω, unless otherwise specified;
VP/S ≥ 1.8 V)
PARAMETERS
SYMBOL
MIN.
TYP.
MAX.
UNIT
TEST CONDITIONS
Circuit current
ICC
13.0
25.0
35.0
mA
No input signal
Conversion gain
CG
17.5
20.5
25.5
dB
PIFin = –40 dBm
RF output level
PRFout
0
3
Noise figure
NF
13
18
dB
Local leakage at RFout
Lorf
–25.0
–10.0
dBm
PIFin = –10 dBm
IF leakage at RFout
IFrf
–12.0
–5.0
dBm
PIFin = –10 dBm
Circuit current in power-save mode*3
ICC(P/S)
220
350
µA
Power-save control voltage
VP/S(ON)
4.5
V
1.0
V
2.5
5.0
µs
UPCONVERTER BLOCK*1
1.8
VP/S(OFF)
Rise up time
Tup
dBm
PIFin = –10 dBm, 50 Ω load
DSB mode
6PIN(P/S) ≤ 1.0 V
DOWNCONVERTER BLOCK*2
Circuit current
ICC
8.0
15.0
22.0
mA
No input signal
Conversion gain
CG
15.0
18.0
23.0
dB
PRFin = –40 dBm
IF output level
PIFout
–4.5
–2.0
dBm
PRFin = –10 dBm, 50 Ω load
3rd order intermodulation distortion
IM3
–45.0
–49.0
dBc
fRFin1 = 866.4 MHz, PRFin1 = –40 dBm
fRFin2 = 866.8 MHz, PRFin2 = –40 dBm
Noise figure
NF
7.5
10
dB
DSB mode
Circuit current in power-save mode*3
ICC(P/S)
220
350
µA
5PIN(P/S) ≤ 1.0 V
Power-save control voltage
VP/S(ON)
4.5
V
1.0
V
5.0
µs
1.8
VP/S(OFF)
Rise up time
Tup
2.5
*1 : fIFin = 150.05 MHz, fRFout = 864.05 to 868.05 MHz
fLoin = 1014.10 to 1018.1 MHz (–9 dBm)
*2 : fRFin = 864.05 to 868.05 MHz, fIFout = 150.05 MHz
fLoin = 1014.10 to 1018.1 MHz (–9 dBm)
*3 : Circuit current in power-save mode is total value of upconverter+downconverter
Data Sheet P10817EJ3V0DS00
5
µPC8100GR
STANDARD CHARACTERISTIC FOR REFERENCE (TA = 25 °C, VCC = 2.7 V, ZL = ZS = 50 Ω, unless otherwise
specified; VP/S ≥ 1.8 V)
PARAMETERS
SYMBOL
REFERENCE
UNIT
TEST CONDITIONS
IM3
–39.0
dBc
IF output 1 dB compression
P1dB
–7.0
dBm
Local leakage at IFout Pin
Loif
–29.0
dBm
Pin = –40 dBm
RF leakage at IFout Pin
RFif
–44.0
dBm
Pin = –40 dBm
UPCONVERTER BLOCK
3rd order intermodulation distortion
fIFin1 = 150.4 MHz, PIF1 = –30 dBm
fIFin2 = 150.8 MHz, PIF2 = –30 dBm
DOWNCONVERTER BLOCK
6
Data Sheet P10817EJ3V0DS00
µPC8100GR
TEST CIRCUIT
Signal
Generator
(LO)
(IF)
Spectrum Analyzer
(IF)
Signal Generator
50 Ω
51 Ω
50 Ω
1.5 pF
51 W
220 nH
120 pF
30
pF 120 pF 120 pF
30 pF 30 pF 30 pF
13
12
11
MIXout2
LOby (D)
14
GND
LOin (D)
15
IFby
VCC (D)
16
IFin
17
LOin (U)
18
LOby (U)
19
IFout
1 500 pF
20
µPC8100GR
GND
RFby
RFin
PEAKINGout
P/S (D)
P/S (U)
VCC (U)
RFout
GND
MIXout1
4.7 nH
1
2
3
4
5
6
7
8
9
10
120 pF 120 pF 3 pF
22 Ω
Signal Generator
50 Ω
15 nH
4.7 nH
180 pF
120 pF
Spectrum Analyzer
4.7 nH
1 500 pF
50 Ω
Data Sheet P10817EJ3V0DS00
7
µPC8100GR
TEST CIRCUIT ASSEMBLED ON EVALUATION BOARD
IC MOUNTED SIDE
30 pF 30 pF
OSC IN
OSC IN
NEC
µPC8100
120 pF
Trimer condenser
RF IN
4.7 nH
IF IN
120 pF
22 Ω
3 pF
RF OUT
IF OUT
COMPONENT MOUNTED SIDE
51 Ω
OSC IN
120
pF
OSC IN
30 pF
51 Ω
F
.5 p
30 pF
1
150 nH
120 pF
0Ω
IF IN
120 pF
RF IN
4.7 nF
120 pF
22 nH
4.7 nF
IF OUT
8
RF OUT
Data Sheet P10817EJ3V0DS00
µPC8100GR
TYPICAL PERFORMANCE (Unless otherwise specified VCC = 2.7 V Vps ≥ 1.8 V)
– Downconverter block –
RF input frequency vs. Noise figure
RF input frequency vs. Conversion Gain
15.0
20.0
Conversion Gain CG (dB)
Noise Figure NF (dB)
Vcc = 2.7 V
LO sweep (–9 dBm)
TA = +25 ˚C
TA = +80 ˚C
TA = –30 ˚C
10.0
5.0
100
500
15.0
Vcc = 2.7 V
LO sweep (–9 dBm)
RF sweep (–40 dBm)
IF = 150 MHZ
10.0
100
1000
RF input frequency fRFin (MHZ)
Conversion Gain CG (dB)
Noise Figure NF (dB)
TA = +25 ˚C
TA = +80 ˚C
TA = –30 ˚C
10.0
500
1000
20.0
15.0 Vcc = 4.5 V
LO sweep (–9 dBm)
RF sweep (–40 dBm)
IF = 150 MHZ
10.0
100
500
1000
LO input level vs. Conversion Gain
RF input level vs. IF output level and IM3
10
25
Vcc = 2.7 V
RF = 866 MHZ (– 40 dBm)
LO = 1016 MHZ (– 9 dBm)
0
–10
Conversion Gain CG (dB)
IF output level PRFout, 3rd order distortion IM3 (dBm)
TA = +25 ˚C
TA = +80 ˚C
TA = –30 ˚C
RF input frequency fRFin (MHZ)
RF input frequency fRFin (MHZ)
–20
–30
Vcc = 2.7 V
RF1 = 866.4 MHZ
RF2 = 866.8 MHZ
LO = 1016 MHZ (–9 dBm)
–40
–50
20
15
10
–60
TA = +25 ˚C
TA = +80 ˚C
TA = –30 ˚C
–70
–80
–40
1000
RF input frequency vs. Conversion Gain
25.0
Vcc = 4.5 V
LO sweep (–9 dBm)
5.0
100
500
RF input frequency fRFin (MHZ)
RF input frequency vs. Noise figure
15.0
TA = +25 ˚C
TA = +80 ˚C
TA = –30 ˚C
–30
–20
–10
0
10
5
–27 –24 –21 –18 –15 –12 –9
TA = +25 ˚C
TA = +80 ˚C
TA = –30 ˚C
–6
–3
0
LO input level PLOin (dBm)
RF input level PRFin (dBm)
Data Sheet P10817EJ3V0DS00
9
µPC8100GR
– Downconverter block –
RF input level vs. IF output level and IM3
LO input level vs. Conversion Gain
25
0
–10
–20
–30
Vcc = 4.5 V
RF1 = 866.4 MHZ
RF2 = 866.8 MHZ
LO = 1016 MHZ (– 9 dBm)
–40
–50
Conversion Gain CG (dB)
IF output level 3rd order distortion IM3 (dBm)
10
–60
20
15
Vcc = 4.5 V
RF = 866 MHZ (–40 dBm)
LO = 1016 MHZ (–9 dBm)
10
TA = +25 ˚C
TA = +80 ˚C
TA = –30 ˚C
–70
–80
–40
–30
–20
–10
0
TA = +25 ˚C
TA = +80 ˚C
TA = –30 ˚C
5
–27 –24 –21 –18 –15 –12 –9
10
P/S control voltage vs. Circuit Current
30.0
Vcc = 2.7 V
Circuit Current Icc (mA)
Circuit Current Icc (mA)
15.0
10.0
5.0
0
1.0
2.0
3.0
4.0
5.0
Supply voltage vs. Circuit Current
50
Vcc = VP/S
40
Circuit Current Icc (mA)
Vcc = 4.5 V
TA = +25 ˚C
TA = +80 ˚C
TA = –30 ˚C
30
20
10
0
1.0
20.0
15.0
10.0
5.0
TA = +25 ˚C
TA = +80 ˚C
TA = –30 ˚C
Power-save-control voltage VP/S
10
0
25.0
20.0
0
–3
P/S control voltage vs. Circuit Current
30.0
25.0
0
–6
LO input level PLOin (dBm)
RF input level PRFin (dBm)
2.0
4.0 4.5 5.0
2.73.0
Supply Voltage Vcc (V)
Data Sheet P10817EJ3V0DS00
0
TA = +25 ˚C
TA = +80 ˚C
TA = –30 ˚C
0
1.0
2.0
3.0
4.0
Power-save-control voltage VP/S
5.0
µPC8100GR
– Upconverter block –
F input level vs. RF outpint level and IM3
LC input level vs. Conversion Gain
25
0
–10
–20
–30
Vcc = 2.7 V
IF1 = 150.4 MHZ
IF2 = 150.8 MHZ
LO = 1016 MHZ (– 9 dBm)
–40
–50
–60
Conversion Gain CG (dB)
RF output level 3rd order distortion IM3 (dBm)
10
TA = +25 ˚C
TA = +80 ˚C
TA = –30 ˚C
–70
–80
–40
–30
–20
–10
0
20
15
Vcc = 2.7 V
IF = 150 MHZ (–40 dBm)
LO = 1016 MHZ
10
TA = +25 ˚C
TA = +80 ˚C
TA = –30 ˚C
5
10
–27 –24 –21 –18 –15 –12 –9
Pin - Pout, IM3
–3
0
LO input level - CG
25
10
0
–10
Conversion Gain CG (dB)
RF output level 3rd order distortion IM3 (dBm)
–6
LO input level PLOin (dBm)
IF input level PRFin (dBm)
–20
–30
Vcc = 4.5 V
IF1 = 150.4 MHZ
IF2 = 150.8 MHZ
LO = 1016 MHZ (–9 dBm)
–40
–50
–60
TA = +25 ˚C
TA = +80 ˚C
TA = –30 ˚C
–70
–80
–40
–30
–20
–10
0
20
15
Vcc = 2.7 V
IF = 150 MHZ (–40 dBm)
LO = 1016 MHZ
10
TA = +25 ˚C
TA = +80 ˚C
TA = –30 ˚C
5
10
–27 –24 –21 –18 –15 –12 –9
–6
–3
0
LO input level PLOin (dBm)
IF input level PRFin (dBm)
Data Sheet P10817EJ3V0DS00
11
µPC8100GR
– Downconverter block –
P/S control voltage vs. Circuit Current
P/S control voltage vs. Circuit Current
50
50
Vcc = 2.7 V
No input signal
Vcc = 4.5 V
No input signal
40
Circuit Current Icc (mA)
Circuit Current Icc (mA)
40
30
20
10
0
1.0
2.0
3.0
4.0
5.0
Power-save-control voltage VP/S
Supply voltage vs. Circuit Current
50
Vcc = VP/S
No input signal
Circuit Current Icc (mA)
40
TA = +25 ˚C
TA = +80 ˚C
TA = –30 ˚C
30
20
10
0
Recommended
operating range
0
1.0
2.0
2.73.0
4.0 4.5 5.0
Supply Voltage Vcc (V)
12
20
TA = +25 ˚C
TA = +80 ˚C
TA = –30 ˚C
10
TA = +25 ˚C
TA = +80 ˚C
TA = –30 ˚C
0
30
Data Sheet P10817EJ3V0DS00
0
0
1.0
2.0
3.0
4.0
Power-save control voltage VP/S
5.0
µPC8100GR
TYPICAL APPLICATION
CT2 BLOCK DIAGRAM
RX
DEMO
I
Q
PLL
SW
PLL
µPG131GR
I
0°
TX
F/F
90°
Q
µPC8100GR
µPC8101GR
The application circuits and their parameters are for references only and are not intended for use in actual design-in's.
Data Sheet P10817EJ3V0DS00
13
µPC8100GR
PACKAGE DIMENSIONS
20 PIN PLASTIC SSOP (225 mil) (UNIT: mm)
20
11
detail of lead end
+7˚
3˚–3˚
1
10
6.7 ± 0.3
6.4 ± 0.2
1.8 MAX.
4.4 ± 0.1
1.5 ± 0.1
1.0 ± 0.2
0.5 ± 0.2
0.15
0.65
+0.10
0.22 –0.05
0.10 M
0.15
+0.10
–0.05
0.575 MAX.
0.1 ± 0.1
NOTE Each lead centerline is located within 0.10 mm of its true position (T.P.) at maximum material condition.
14
Data Sheet P10817EJ3V0DS00
µPC8100GR
NOTE ON CORRECT USE
(1) Observe precautions for handling because of electrostatic sensitive devices.
(2) Form a ground pattern as wide as possible to minimize ground impedance (to prevent undesired oscillation).
(3) Keep the track length of the ground pins as short as possible.
(4) Connect a bypass capacitor (e.g. 1 000 pF) to the VCC pin.
RECOMMENDED SOLDERING CONDITIONS
This product should be soldered in the following recommended conditions. Other soldering method and conditions than
the recommended conditions are to be consulted with our sales representatives.
µPC8100GR
Soldering
process
Infrared ray reflow
VPS
Wave soldering
Partial heating method
*:
Soldering conditions
Symbol
Peak package’s surface temperature: 235 °C or below,
Reflow time: 30 seconds or below (210 °C or higher),
Number of reflow process: 2, Exposure limit*: None
IR35–00-2
Peak package’s surface temperature: 215 °C or below,
Reflow time: 40 seconds or below (200 °C or higher),
Number of reflow process: 2, Exposure limit*: None
VP15–00-2
Solder temperature: 260 °C or below,
Flow time: 10 seconds or below
Number of flow process: 1, Exposure limit*: None
WS60–00-1
Terminal temperature: 300 °C or below,
Flow time: 10 seconds or below,
Exposure limit*: None
Exposure limit before soldering after dry-pack package is opened.
Storage conditions: 25 °C and relative humidity at 65 % or less.
Note:
Apply only a single process at once, except for “Partial heating method”.
For details of recommended soldering conditions for surface mounting, refer to information document SEMICONDUCTOR
DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E).
Data Sheet P10817EJ3V0DS00
15
µPC8100GR
ATTENTION
OBSERVE PRECAUTIONS
FOR HANDLING
ELECTROSTATIC
SENSITIVE
DEVICES
NESAT (NEC Silicon Advanced Technology) is a trademark of NEC Corporation.
• The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
• No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
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property rights of third parties by or arising from use of a device described herein or any other liability arising
from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights
or other intellectual property rights of NEC Corporation or others.
• Descriptions of circuits, software, and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these circuits,
software, and information in the design of the customer's equipment shall be done under the full responsibility
of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third
parties arising from the use of these circuits, software, and information.
• While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
• NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated “quality assurance program“ for a specific application. The recommended applications of
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device
before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
M7 98.8