DATA SHEET
SHEET
DATA
BIPOLAR ANALOG INTEGRATED CIRCUIT
µPC8110GR
1 GHz DIRECT QUADRATURE MODULATOR
FOR DIGITAL MOBILE COMMUNICATION
DESCRIPTION
The µPC8110GR is a sillicon monolithic integrated circuit designed as 1 GHz direct quadrature modulator for
digital mobile communication systems. This modulator housed in a 20 pin plastic SSOP that easy to install and
contributes to miniaturizing the system.
The device has power save function and can operates 2.7 to 3.6 V supply voltage to realize low power
consumption.
FEATURES
• Direct modulation range : 800 MHz to 1 GHz
• Supply voltage range
: VCC = 2.7 to 3.6 V
• Low operation current
: ICC = 24 mA typical @ VCC = 3 V
• Low phase difference due to digital phase shifter is adopted.
• 20 pin SSOP suitable for high density surface mounting.
• Low current sleep mode
APPLICATION
• Digital cellular phone (PDC, IS-54/IS-136, GSM etc..)
ORDERING INFORMATION
PART NUMBER
µPC8110GR-E1
Remark
PACKAGE
20 pin plastic SSOP
PACKING FORM
Carrier tape width 12 mm. Q’ty 2.5 kp/Reel Pin 1 indicated pull-out
direction of tape.
For evaluation sample order, please contact your local NEC sales office. (Order number: µPC8110GR)
Caution electro-static sensitive device
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. P11074EJ3V0DS00 (3rd edition)
Date Published October 1999 N CP(K)
Printed in Japan
The mark
shows major revised points.
©
1996, 1999
µPC8110GR
INTERNAL BLOCK DIAGRAM AND PIN CONNECTIONS
(Top View)
1
20
90˚
Phase
Sitter
2
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.
19
REG.
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
LOin
GND
LOin
GND
Q-INPUT
Q-INPUT
I-INPUT
I-INPUT
GND
GND
RFout
GND
GND
VCC
GND
GND
Power Save (VPS)
GND
VCC
GND
SERIES PRODUCTS
PART
NUMBER
f LO1in
(MHz)
f MODout
(MHz)
150 MHz Quadrature
MOD
µPC8101GR
100 to 300
50 to 150
Up-Con+Quadrature MOD
µPC8104GR
400 MHz Quadrature
MOD
1 GHz direct Quad MOD
SERIES TYPE
Remark
2
f I/Q
(MHz)
Up-Converter
f RFout (MHz)
APPLICATION
DC to
0.5
External
CT2, Digital Comm.
100 to 400
DC to 10
900 to 1900
PHS, PDC etc..
µPC8105GR
100 to 400
DC to 10
External
PDC, IS-136, GSM,
PHS
µPC8110GR
800 to 1000
DC to 10
Direct
PDC, IS-136, GSM etc.
As for detail information of series products, please refer to each data sheet.
Data Sheet P11074EJ3V0DS00
µPC8110GR
APPLICATION EXAMPLE
PDC 900 MHz (Direct Modulation Type)
I
Q
RSSI OUT
DEMO
ANT
RSSI
RX
SW
PLL
TX
I
0˚
PA
BPF
F/F
90˚
Q
900 MHz Direct Quadrature Modulator
µ PC8110GR
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATING
UNIT
Supply Voltage
VCC
4.0
V
TA = +25 °C
Power Save Voltage
VPS
4.0
V
TA = +25 °C
Power Dissipation
PD
430
mW
TA = +85 °C
Operating Temperature
Topt
−40 to +85
°C
Storage Temperature
Tstg
−55 to +150
°C
Note 1.
TEST CONDITIONS
Note 1
Mounted on 50 × 50 × 1.6 mm double copper clad epoxy glass board
RECOMMENDED OPERATING CONDITIONS
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
UNIT
Supply Voltage
VCC
2.7
3.0
3.6
V
Operating Temperature
Topt
−40
+25
+85
°C
LO Input Frequency
fLOin
800
900
1000
MHz
LO Input Power Level
PLOin
−15
−10
−7
dBm
I/Q Input Frequency
fI/Qin
DC
10
MHz
I/Q Input Voltage
VI/Qin
500
mVp-p
250
Data Sheet P11074EJ3V0DS00
TEST CONDITIONS
Single ended input
Differential input
3
µPC8110GR
ELECTRICAL CHARACTERISTICS (TA = 25 °C, VCC = 3.0 V, Unless Otherwise Specified V PS ≥ 2.2 V (High))
PARAMETER
Circuit Current
SYMBOL
MIN.
TYP.
MAX.
UNIT
ICC
20
24
33
mA
No input signal
10
uA
VPS ≤ 0.5 V (Low)
dBM
fLOin = 948 MHz
PLOin = −10 dBm
fI/Q = 2.625 kHz
I/Q (DC) = VCC/2
VI/Qin = 500 mVp-p
(Single ended)
Circuit Current at Power Save Mode
ICC(PS)
Maximum Output Power
Po(sat)
−13
−10
TEST CONDITIONS
LO Carrier Leak
LoL
−35
−30
dBc
Image Rejection (Side Band Leak)
ImR
−40
−30
dBc
I/Q 3rd Order Intermodulation
Distortion
IM3I/Q
−45
−30
dBc
Power Save Rise Time
TPS(RISE)
3
5
µs
VPS: Low → High
Power Save Fall Time
TPS(FALL)
2
5
µs
VPS: High → Low
STANDARD CHARACTERISTICS FOR REFERENCE
(TA = +25 °C, VCC = 3.0 V, Unless Otherwise Specified V PS ≥ 2.2 V (Hgih))
PARAMETER
I/Q Input Impeadance
LO Input VSWR
RF Output VSWR
4
SYMBOL
MIN.
TYP.
MAX.
UNIT
TEST CONDITIONS
ZI/Qin
150
kΩ
VSWR (Lo)
1.5 : 1
−
fLO = 948 MHz
VSWR
(RF)
1.5 : 1
−
fLO = 948 MHz
Data Sheet P11074EJ3V0DS00
fI/Q = DC to 10 MHz
µPC8110GR
PIN EXPLANATION
Pin
No.
ASSIGNMENT
SUPPLY
VOL. (V)
PIN
VOL. (V)
1
LOin
2.6
LO input for phase shifter.
Connect around 50 Ω between 1
and 3 pin to match to 50 Ω.
2
GND
(for Local
Amp. Block)
0
Connect to the ground with
minimum inductance.
Track length should be kept as
short as possible.
3
LOin
2.6
Bypass of LO input.
This pin is grounded through
around 33 pF capacitor.
5
Q
VCC/2
Input for Q signal.
This input impedance is 150 kΩ.
In case of that I/Q input signals
are single ended, amplitude of
the signal is 500 mVp-p max.
Note 2
6
Q
VCC/2
Input for Q signal.
This input impedance is 150 kΩ.
In case of that I/Q input signals
are single ended, VCC/2 biased
DC signal should be input.
In case of that I/Q input signals
are differential, amplitude of the
signal is 250 mVp-p max. Note 2
7
I
VCC/2
Input for I signal.
This input impedance is 150 kΩ.
In case of that I/Q input signals
are single ended, VCC/2 biased
DC signal should be input.
In case of that I/Q input signals
are differential, amplitude of the
signal is 250 mVp-p max. Note 2
18
FUNCTION AND APPLICATION
I
VCC/2
Input for I signal.
This input impedance is 150 kΩ.
In case of that I/Q input signals
are single ended, amplitude of
the signal is 500 mVp-p max.
Note 2
9
GND
0
13
(for Quadrature
Modulator Block)
Connect to the ground with
minimum inductance.
Track length should be kept as
short as possible.
8
16
Data Sheet P11074EJ3V0DS00
EQUIVALENT CIRCUIT
1
3
5
6
8
7
5
µPC8110GR
Pin
No.
ASSIGNMENT
SUPPLY
VOL. (V)
PIN
VOL. (V)
11
RFout
1.6
Output from modulator.
This is single-end push-pull
amplifier. So this output
impedance is Low.
0
Connect to the ground with
minimum inductance.
Track length should be kept as
short as possible.
12
GND
(for Output
Push-pull
Amplifier)
VCC
14
FUNCTION AND APPLICATION
2.7 to 3.6
Supply voltage pin for Output
Amplifier of modulator. Internal
regulator can be kept stable
condition of supply bias against
the variable temperature or VCC.
VP/S
Power save control pin can be
controlled ON/SLEEP state with
bias as follows;
(for Output
Amplifier of
Modulator)
17
Power Save
VP/S
STATE
2.2 to 3.6
ON
0 to 0.5
SLEEP
EQUIVALENT CIRCUIT
From Modulator
11
17
19
VCC
2.7 to 3.6
Supply voltage pin for modulator
except output Amplifier. Internal
regulator can be kept stable
condition of supply bias against
the variable temperature or VCC.
4
GND
0
Connect to the ground with
minimum inductance.
Track length should be kept as
short as possible.
10
15
20
Note 2.
Relations between amplitude and VCC/2 bias of input signal are following.
PI/Qin - I/Q Input Signal - mVp-p
Supply Voltage
VCC (V)
2.7 to 3.6
6
I/Q DC Voltage (V)
VCC/2 = I = I = Q = Q
1.35 to 1.8
Single ended input
I=Q
Differential input
I=I=Q=Q
≤ 500
≤ 250
Data Sheet P11074EJ3V0DS00
µPC8110GR
EXPLANATION OF INTERNAL FUNCTION
BLOCK
FUNCTION/OPERATION
90 ° PHASE
SHIFTER
Input signal from LO is send to digital circuit of
T-type flip-flop through frequency doubler.
Output signal from T-type F/F is changed to
same frequency as LO input and that have
quadrature phase shift, 0 °, 90 °, 180 °, 270 °.
These circuits have function of self phase
correction to make correctly quadrature signals.
BUFFER
AMP.
Buffer amplifiers for each phase signals to send
to each mixers.
MIXER
Each signals from buffer amp. are quadrature
modulated with two double-balanced mixers.
High accurate phase and amplitude inputs are
realized to good performance for image
rejection.
ADDER
BLOCK DIAGRAM
from LOin
×2
÷ 2 F/F
I
I
Q
Q
Output signals from each mixers are added with
adder and send to final amplifier.
to MODout
Data Sheet P11074EJ3V0DS00
7
µPC8110GR
TYPICAL CHARACTERISTICS
Unless otherwise specified TA = +25 °C, VCC = VPS = 3 V, I/Q DC/offset = I/Q DC offset = 1.5 V, I/Q Input signal =
500 mVp-p (Single ended), fI/Q = 2.625 kHz, fLOin = 948 MHz, PLOin = −10 dBm, <PDC> Transmission speed: 42 kbps,
RNYQ: a = 0.5.
CIRCUIT CURRENT vs SUPPLY VOLTAGE
30
TA = +25 ˚C
TA = –40 ˚C
TA = +85 ˚C
VCC = VPS
I/Q (DC) = VCC/2
RF None
ICC - Circuit Current - mA
25
20
15
10
5
0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
3.5
4.0
VCC - Supply Voltage - V
CIRCUIT CURRENT vs POWER SAVE VOLTAGE
30
TA = +25 ˚C
TA = –40 ˚C
TA = +85 ˚C
VCC = 3 V
I/Q (DC) = 1.5 V
RF None
ICC - Circuit Current - mA
25
20
15
10
5
0
0
0.5
1.0
1.5
2.0
2.5
VPS - Power Save Voltage - V
8
Data Sheet P11074EJ3V0DS00
3.0
µPC8110GR
RF OUTPUT POWER vs I/Q INPUT SIGNAL
(at TA = –40 ˚C)
RF OUTPUT POWER vs I/Q INPUT SIGNAL
(at TA = +25 ˚C)
0
0
VCC = 3.0 V
VCC = 2.7 V
VCC = 3.6 V
Single ended
VCC = 3.0 V
VCC = 2.7 V
VCC = 3.6 V
Single ended
–5
PRFout - RF Output Power - dBm
PRFout - RF Output Power - dBm
–5
–10
–15
–10
–15
–20
–20
–25
–25
100
200
300
400 500
100
PI/Qin - I/Q Input Signal - mVp-p
200
300
400 500
PI/Qin - I/Q Input Signal - mVp-p
RF OUTPUT POWER vs I/Q INPUT SIGNAL
(at TA = +85 ˚C)
0
VCC = 3.0 V
VCC = 2.7 V
VCC = 3.6 V
Single ended
PRFout - RF Output Power - dBm
–5
–10
–15
–20
–25
100
200
300
400 500
PI/Qin - I/Q Input Signal - mVp-p
Data Sheet P11074EJ3V0DS00
9
µPC8110GR
ImR
–30
–10
LoL
–15
–40
IM3I/Q
–45
–20
–25
–50
ImR
–30
–55
LoL
–10
–35
PRFout
–15
–40
IM3I/Q
–45
–20
–25
–50
ImR
–30
–55
700 800 900 1000 1100
700 800 900 1000 1100
700 800 900 1000 1100
fLO - Local Input Frequency - MHz
fLO - Local Input Frequency - MHz
fLO - Local Input Frequency - MHz
Lo INPUT FREQUENCY vs
PRFout, LoL, ImR, IM3I/Q
(at VCC = 2.7 V, TA = +25 ˚C)
Lo INPUT FREQUENCY vs
PRFout, LoL, ImR, IM3I/Q
(at VCC = 3.0 V, TA = +25 ˚C)
Lo INPUT FREQUENCY vs
PRFout, LoL, ImR, IM3I/Q
(at VCC = 3.6 V, TA = +25 ˚C)
–15
–40
LoL
–20
–45
IM3I/Q
–25
–50
ImR
–30
–55
PRFout
–10
–35
LoL
–40
–15
IM3I/Q
–45
–20
–50
–25
–55
ImR
–30
–5
–30
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
–10
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
PRFout
–35
–5
–30
PRFout - RF Output Power - dBm
–5
–30
PRFout
–10
–35
–40
LoL
–15
IM3I/Q
–45
–20
–50
–25
–55
ImR
–30
700 800 900 1000 1100
700 800 900 1000 1100
700 800 900 1000 1100
fLO - Local Input Frequency - MHz
fLO - Local Input Frequency - MHz
fLO - Local Input Frequency - MHz
Data Sheet P11074EJ3V0DS00
PRFout - RF Output Power - dBm
–25
–50
PRFout
–35
–5
–30
PRFout - RF Output Power - dBm
–20
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
IM3I/Q
–45
PRFout - RF Output Power - dBm
–15
–40
–55
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
–10
PRFout
–5
–30
PRFout - RF Output Power - dBm
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
LoL
–35
Lo INPUT FREQUENCY vs
PRFout, LoL, ImR, IM3I/Q
(at VCC = 3.6 V, TA = –40 ˚C)
PRFout - RF Output Power - dBm
–5
–30
10
Lo INPUT FREQUENCY vs
PRFout, LoL, ImR, IM3I/Q
(at VCC = 3.0 V, TA = –40 ˚C)
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
Lo INPUT FREQUENCY vs
PRFout, LoL, ImR, IM3I/Q
(at VCC = 2.7 V, TA = –40 ˚C)
µPC8110GR
–20
ImR
–25
–50
–30
–55
LoL
–10
PRFout
–15
–40
IM3I/Q
–45
–20
–50
–25
ImR
–30
–55
LoL
–35
–10
PRFout
–15
–40
IM3I/Q
–45
–20
ImR
–50
–25
–55
–30
700 800 900 1000 1100
700 800 900 1000 1100
700 800 900 1000 1100
fLO - Local Input Frequency - MHz
fLO - Local Input Frequency - MHz
fLO - Local Input Frequency - MHz
Lo INPUT POWER vs
PRFout, LoL, ImR, IM3I/Q
(at VCC = 2.7 V, TA = –40 ˚C)
Lo INPUT POWER vs
PRFout, LoL, ImR, IM3I/Q
(at VCC = 3.0 V, TA = –40 ˚C)
Lo INPUT POWER vs
PRFout, LoL, ImR, IM3I/Q
(at VCC = 3.6 V, TA = –40 ˚C)
–10
PRFout
–40
–15
ImR
–45
–20
–50
–25
IM3I/Q
–55
–30
–15
–10
–5
LO - Local Input Power - dBm
–5
LoL
–35
–10
PRFout
–40
–15
ImR
–45
–20
–50
–25
IM3I/Q
–55
–30
–15
–10
–5
LO - Local Input Power - dBm
Data Sheet P11074EJ3V0DS00
LoL
–30
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
–35
–30
PRFout - RF Output Power - dBm
–5
LoL
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
–30
PRFout - RF Output Power - dBm
–45
–35
–5
–30
–5
–35
–10
PRFout
–40
–15
ImR
–45
–20
–50
–25
PRFout - RF Output Power - dBm
IM3I/Q
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
–15
–40
PRFout - RF Output Power - dBm
PRFout
PRFout - RF Output Power - dBm
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
–10
–35
–5
–30
LoL
Lo INPUT FREQUENCY vs
PRFout, LoL, ImR, IM3I/Q
(at VCC = 3.6 V, TA = +85 ˚C)
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
–5
–30
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
Lo INPUT FREQUENCY vs
PRFout, LoL, ImR, IM3I/Q
(at VCC = 3.0 V, TA = +85 ˚C)
PRFout - RF Output Power - dBm
Lo INPUT FREQUENCY vs
PRFout, LoL, ImR, IM3I/Q
(at VCC = 2.7 V, TA = +85 ˚C)
IM3I/Q
–55
–30
–15
–10
–5
LO - Local Input Power - dBm
11
µPC8110GR
–15
ImR
–45
–20
–50
–25
IM3I/Q
–30
–10
–15
PRFout
–35
–10
LoL
–40
–15
ImR
–45
–20
–50
–25
IM3I/Q
–55
–5
–30
–15
–10
–5
PRFout
–35
–10
LoL
–40
–15
ImR
–45
–20
–50
–25
IM3I/Q
–55
–5
–30
–10
–15
–5
LO - Local Input Power - dBm
LO - Local Input Power - dBm
LO - Local Input Power - dBm
Lo INPUT POWER vs
PRFout, LoL, ImR, IM3I/Q
(at Vcc = 2.7 V, TA = +85 ˚C)
Lo INPUT POWER vs
PRFout, LoL, ImR, IM3I/Q
(at Vcc = 3.0 V, TA = +85 ˚C)
Lo INPUT POWER vs
PRFout, LoL, ImR, IM3I/Q
(at Vcc = 3.6 V, TA = +85 ˚C)
LoL
–35
–10
PRFout
–40
–15
ImR
–45
–20
–50
–25
IM3I/Q
–55
–30
–15
–10
–5
LO - Local Input Power - dBm
–5
–30
LoL
–35
–10
PRFout
–40
–15
ImR
–45
–20
–50
–25
IM3I/Q
–55
–30
–15
–10
–5
LO - Local Input Power - dBm
Data Sheet P11074EJ3V0DS00
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
–30
PRFout - RF Output Power - dBm
–5
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
–30
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
–30
PRFout - RF Output Power - dBm
LoL
–40
–5
–5
LoL
–35
–10
PRFout
–40
–15
ImR
–45
–20
–50
–25
IM3I/Q
–55
–30
–15
–10
–5
LO - Local Input Power - dBm
PRFout - RF Output Power - dBm
–10
PRFout - RF Output Power - dBm
–35
Lo INPUT POWER vs
PRFout, LoL, ImR, IM3I/Q
(at Vcc = 3.6 V, TA = +25 ˚C)
PRFout - RF Output Power - dBm
PRFout
–55
12
–30
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
–5
PRFout - RF Output Power - dBm
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
–30
Lo INPUT POWER vs
PRFout, LoL, ImR, IM3I/Q
(at Vcc = 3.0 V, TA = +25 ˚C)
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
Lo INPUT POWER vs
PRFout, LoL, ImR, IM3I/Q
(at Vcc = 2.7 V, TA = +25 ˚C)
µPC8110GR
ImR
–45
–20
–50
–25
IM3I/Q
1.35
–35
–10
LoL
–40
–15
ImR
–45
–50
–20
–25
IM3I/Q
–55
–30
1.25
PRFout
1.45
1.5
LoL
–35
–10
PRFout
–40
–15
ImR
–45
–50
–20
–25
IM3I/Q
–55
–30
1.4
–5
1.6
–30
1.7
1.8
1.9
I/Q (DC) - I/Q Supply Voltage - V
I/Q (DC) - I/Q Supply Voltage - V
I/Q (DC) - I/Q Supply Voltage - V
I/Q BIASE VOLTAGE vs
PRFout, LoL, ImR, IM3I/Q
(at VCC = 2.7 V, TA = +25 ˚C)
I/Q BIASE VOLTAGE vs
PRFout, LoL, ImR, IM3I/Q
(at VCC = 3.0 V, TA = +25 ˚C)
I/Q BIASE VOLTAGE vs
PRFout, LoL, ImR, IM3I/Q
(at VCC = 3.6 V, TA = +25 ˚C)
–30
–35
–10
–40
–15
LoL
ImR
–45
–50
–20
–25
IM3I/Q
–55
–30
1.25
1.35
1.45
I/Q (DC) - I/Q Supply Voltage - V
–30
–5
PRFout
–35
–10
–40
–15
LoL
ImR
–45
–20
–50
–25
IM3I/Q
–55
–30
1.4
1.5
1.6
I/Q (DC) - I/Q Supply Voltage - V
Data Sheet P11074EJ3V0DS00
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
PRFout
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
–5
PRFout - RF Output Power - dBm
–30
PRFout - RF Output Power - dBm
–15
–30
–5
–5
PRFout
–35
–10
LoL
–40
–15
ImR
–45
–20
IM3I/Q
–50
–25
–55
PRFout - RF Output Power - dBm
LoL
–40
PRFout - RF Output Power - dBm
–10
I/Q BIASE VOLTAGE vs
PRFout, LoL, ImR, IM3I/Q
(at VCC = 3.6 V, TA = –40 ˚C)
PRFout - RF Output Power - dBm
–35
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
PRFout
–55
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
–30
–5
PRFout - RF Output Power - dBm
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
–30
I/Q BIASE VOLTAGE vs
PRFout, LoL, ImR, IM3I/Q
(at VCC = 3.0 V, TA = –40 ˚C)
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
I/Q BIASE VOLTAGE vs
PRFout, LoL, ImR, IM3I/Q
(at VCC = 2.7 V, TA = –40 ˚C)
–30
1.7
1.8
1.9
I/Q (DC) - I/Q Supply Voltage - V
13
µPC8110GR
–45
LoL
–15
–20
ImR
–50
–25
IM3I/Q
–30
1.25
1.35
1.45
I/Q (DC) - I/Q Supply Voltage - V
PRFout
–35
–10
LoL
–40
–15
ImR
–45
–20
–50
–25
IM3I/Q
–55
–30
1.4
1.5
1.6
I/Q (DC) - I/Q Supply Voltage - V
Data Sheet P11074EJ3V0DS00
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
PRFout
–40
–30
–5
PRFout - RF Output Power - dBm
–10
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
–35
–55
14
–30
–5
PRFout - RF Output Power - dBm
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
–30
I/Q BIASE VOLTAGE vs
PRFout, LoL, ImR, IM3I/Q
(at VCC = 3.6 V, TA = +85 ˚C)
I/Q BIASE VOLTAGE vs
PRFout, LoL, ImR, IM3I/Q
(at VCC = 3.0 V, TA = +85 ˚C)
–5
LoL
PRFout
–35
–10
–40
–15
ImR
–45
–20
–50
–25
IM3I/Q
–55
–30
1.7
1.8
1.9
I/Q (DC) - I/Q Supply Voltage - V
PRFout - RF Output Power - dBm
I/Q BIASE VOLTAGE vs
PRFout, LoL, ImR, IM3I/Q
(at VCC = 2.7 V, TA = +85 ˚C)
µPC8110GR
TYPICAL π/4DQPSK MODULATION OUTPUT SPECTRUM
<PDC> 42 kbps, RNYQ α = 0.5, MOD Pattern [PN9]
TYPICAL SINE WAVE MODULATION OUTPUT SPECTRUM
<PDC> 42 kbps, RNYQ α = 0.5, MOD Pattern [0000]
REF 0.0 dBm
10 dB/
∆ MKR
–10.50 kHz
ATT 10 dB A_write B_blank
Pout
*
∆ MARKER
–10.50 kHz
–47.36 dB
REF Level
0 dBm
10 dB/
LOL
1
IM3I/Q ImR
2
3
ADJ BS
21 kHz
2
3
1
4
RBW 3 kHz
VBW 3 kHz
SWP 5 s
RBW
300 Hz
VBW
300 Hz
SWP
1.2 s
CENTER 948 MHz
CENTER 948.00000 MHz
SPAN 50.0 kHz
Padj (dB)
Data Sheet P11074EJ3V0DS00
Marker No.1 : 947.90 MHz
No.2 : 947.95 MHz
No.3 : 948.05 MHz
No.4 : 948.10 MHz
SPAN 500 kHz
–78.0 dB
–67.0 dB
–70.3 dB
–77.8 dB
∆f = –100 kHz
∆f = –50 kHz
∆f = +50 kHz
∆f = +100 kHz
15
µPC8110GR
POWER SAVE RESPONSE
(at VCC = VPS = 2.7 V)
REF 0.0 dBm
10 dB/
ATT 10 dB
∆ MARKER
2.714 µ s
44.41 dB
∆ MKR
2.714 µ s
RBW
3 MHz
VBW
3 MHz
SWP
50 µ s
A_view B_blank
CENTER 948.002642 MHz
SPAN 0 Hz
POWER SAVE RESPONSE
(at VCC = VPS = 3.0 V)
REF 0.0 dBm
10 dB/
∆ MKR
2.714 µ s
RBW
3 MHz
VBW
3 MHz
SWP
50 µ s
POWER SAVE RESPONSE
(at VCC = VPS = 3.6 V)
REF 0.0 dBm
10 dB/
ATT 10 dB
∆ MKR
2.714 µ s
RBW
3 MHz
VBW
3 MHz
SWP
50 µ s
16
CENTER 948.002642 MHz
ATT 10 dB
A_view B_blank
∆ MARKER
2.714 µ s
45.97 dB
SPAN 0 Hz
Data Sheet P11074EJ3V0DS00
CENTER 948.002642 MHz
A_view B_blank
∆ MARKER
2.714 µ s
48.97 dB
SPAN 0 Hz
µPC8110GR
LO INPUT (LOin) IMPEDANCE
VCC = VPS = 2.7 V
VCC = VPS = 3.0 V
1 : 30.055 Ω
1 : 30.191 Ω
7.1015 Ω 1.1922 nH
948.000 000 MHz
MARKER 1
948 MHz
7.1309 Ω 1.1872 nH
948.000 000 MHz
MARKER 1
948 MHz
1
1
START 700.000 000 MHz
STOP 1 100.000 000 MHz
START 700.000 000 MHz
STOP 1 100.000 000 MHz
VCC = VPS = 3.6 V
1 : 30.189 Ω
7.001 Ω
1.1754 nH
948.000 000 MHz
MARKER 1
948 MHz
1
START 700.000 000 MHz
STOP 1 100.000 000 MHz
Data Sheet P11074EJ3V0DS00
17
µPC8110GR
RF OUTPUT (RFout) IMPEDANCE
VCC = VPS = 2.7 V
VCC = VPS = 3.0 V
1 : 45.74 Ω
1 : 45.005 Ω
–2.8633 Ω 56.634 pF
948.000 000 MHz
MARKER 1
948 MHz
MARKER 1
948 MHz
1
START 700.000 000 MHz
1
STOP 1 100.000 000 MHz
START 700.000 000 MHz
VCC = VPS = 3.6 V
1 : 45.925 Ω
–2.6719 Ω 62.834 pF
948.000 000 MHz
MARKER 1
948 MHz
1
START 700.000 000 MHz
18
–2.6352 Ω 59.199 pF
948.000 000 MHz
STOP 1 100.000 000 MHz
Data Sheet P11074EJ3V0DS00
STOP 1 100.000 000 MHz
µPC8110GR
TEST CIRCUIT
1000 pF
100 pF
0.22 µ F
33 pF
LOin
1
20
2
19
3
18
4
17
Qin
5
16
Qin
6
15
Iin
7
14
Iin
8
13
9
12
10
11
51 Ω
33 pF
Vps
0.22 µ F
100 pF
1000 pF
33 pF
Data Sheet P11074EJ3V0DS00
VCC1
VCC2
RFout
19
µPC8110GR
MEASUREMENT BLOCK DIAGRAM 1
(RF Output Power, Local Carrier Leak, Image Rejection, I/Q 3rd Order Intermodulation Distortion and Power
Save Rise and Fall Time)
Voltage
Source
Pulse pattern
Generator
Signal Generator
Voltage
Source
1000 pF
33 pF
LOin
51 Ω
33 pF
Qin
Qin
Iin
Iin
Q
Qb
Ib
I
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
100 pF
0.22 µ F
Vps
0.22 µ F
100 pF
1000 pF
33 pF RFout
I/Q Signal
Generator
Spectrum Analyzer
20
Data Sheet P11074EJ3V0DS00
VCC1
VCC2
µPC8110GR
MEASUREMENT BLOCK DIAGRAM 2
(Local Input VSWR and RF Output VSWR)
Network Analyzer
Voltage
Source
Voltage
Source
1000 pF
33 pF
LOin
Voltage
Source
51 Ω
33 pF
Qin
Qin
Iin
Iin
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
100 pF
0.22 µ F
Vps
VCC1
VCC2
0.22 µ F
100 pF
1000 pF
33 pF RFout
Network Analyzer
Data Sheet P11074EJ3V0DS00
21
µPC8110GR
TEST BOARD
Bypass Capacitor
VPS
Short
RFout
VCC2
Bypass Capacitor
33 pF
VCC1
µ PC8110GR
LOin
33 pF
33 pF
51 Ω
Iin
Qin
Qin
Iin
Notes 1. Double-sided patterning with 35 µm thick copper on polyhimid board sizing 50 × 50 × 0.4 mm.
2. GND pattern on backside.
3. Solder coating over patterns.
4. {,
22
indicate through-holes.
Data Sheet P11074EJ3V0DS00
µPC8110GR
PACKAGE DIMENSIONS
20 PIN PLASTIC SSOP (225 mil) (UNIT: mm)
20
11
detail of lead end
+7˚
3˚–3˚
1
10
6.7 ± 0.3
6.4 ± 0.2
1.8 MAX.
4.4 ± 0.1
1.5 ± 0.1
1.0 ± 0.2
0.5 ± 0.2
0.15
0.65
+0.10
0.22 –0.05
0.15
+0.10
–0.05
0.575 MAX.
0.10 M
0.1 ± 0.1
NOTE
Each lead centerline is located within 0.10 mm of its true position (T.P.) at maximum material condition.
Data Sheet P11074EJ3V0DS00
23
µPC8110GR
NOTE ON CORRECT USE
(1) Observe precautions for handling because of electrostatic sensitive devices.
(2) Form a ground pattern as wide as possible to keep the minimum ground impedance (to prevent undesired
oscillation).
(3) Keep the track length of the ground pins as short as possible.
(4) Connect a bypass capacitor (e.x. 1 000 pF) to the VCC pin.
(5) I, Q DC offset voltage should be same as the I, Q DC offset voltage (to prevent changing the local leak level with
power save control.)
RECOMMENDED SOLDERING CONDITIONS
This product should be soldered in the following recommended conditions. Other soldering method and conditions
than the recommended conditions are to be consulted with our sales representatives.
µPC8110GR
Soldering process
Soldering conditions
Symbol
Infrared ray reflow
Peak package’s surface temperature: 235 °C or below,
Reflow time: 30 seconds or below (210 °C or higher),
Note
Number of reflow process: 3, Exposure limit : None
IR35-00-3
VPS
Peak package’s surface temperature: 215 °C or below,
Reflow time: 40 seconds or below (200 °C or higher),
Note
Number of reflow process: 3, Exposure limit : None
VP15-00-3
Wave soldering
Solder temperature: 260 °C or below,
Flow time: 10 seconds or below,
Note
Number of flow process: 1, Exposure limit : None
WS60-00-1
Partial heating method
Terminal temperature: 300 °C or below,
Flow time: 3 seconds/pin or below,
Note
Exposure limit : None
Note Exposure limit before soldering after dry-pack package is opened.
Storage conditions: 25 °C and relative humidity at 65 % or less.
Caution
Apply only a single process at once, except for “Partial heating method”.
For details of recommended soldering conditions for surface mounting, refer to information document
SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E).
24
Data Sheet P11074EJ3V0DS00
µPC8110GR
[MEMO]
Data Sheet P11074EJ3V0DS00
25
µPC8110GR
[MEMO]
26
Data Sheet P11074EJ3V0DS00
µPC8110GR
[MEMO]
Data Sheet P11074EJ3V0DS00
27
µPC8110GR
• The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
• No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
• NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from use of a device described herein or any other liability arising from use
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other
intellectual property rights of NEC Corporation or others.
• Descriptions of circuits, software, and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these circuits,
software, and information in the design of the customer's equipment shall be done under the full responsibility
of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third
parties arising from the use of these circuits, software, and information.
• While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
• NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated "quality assurance program" for a specific application. The recommended applications of
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device
before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
M7 98. 8