TI OPA2673IRGVRG4

OPA2673
OP
A2
¨
67
3
www.ti.com..................................................................................................................................................... SBOS382A – JUNE 2008 – REVISED OCTOBER 2008
Dual, Wideband, High Output Current
Operational Amplifier with Active Off-Line Control
FEATURES
DESCRIPTION
1
• WIDEBAND +12V OPERATION:
340MHz (G = +4V/V)
• UNITY-GAIN STABLE: 600MHz (G = +1)
• HIGH OUTPUT CURRENT: 700mA
• OUTPUT VOLTAGE SWING: 9.8VPP
• HIGH SLEW RATE: 3000V/µs
• LOW SUPPLY CURRENT: 16mA/ch
• OVERTEMPERATURE PROTECTION CIRCUIT
• FLEXIBLE POWER CONTROL
• OUTPUT CURRENT LIMIT (±800mA)
• ACTIVE OFF-LINE FOR TDMA
23
APPLICATIONS
•
•
•
•
•
POWER LINE MODEMS
MATCHED I/Q CHANNEL AMPLIFIERS
BROADBAND VIDEO LINE DRIVERS
ARB LINE DRIVERS
HIGH CAP LOAD DRIVERS
DUALS
Power control features are included to allow system
power consumption to be minimized. Two logic
control lines allow four quiescent power settings: full
power, 75% bias power in applications that are less
demanding, 50% bias power cutback for short loops,
and offline with active offline control to present a high
impedance even with large signals present at the
output pin.
Specified on ±6V supplies (to support +12V
operation), the OPA2673 also supports up to +13V
single or ±6.5V dual supplies. Video applications
benefit from a very high output current to drive up to
10 parallel video loads (15Ω) with < 0.1%/0.1° dG/dΦ
nonlinearity.
RELATED PRODUCTS
SINGLES
The OPA2673 provides the high output current and
low distortion required in emerging Power Line
Modem driver applications. Operating on a single
+12V supply, the OPA2673 consumes a low 16mA/ch
quiescent current to deliver a very high 700mA output
current. This output current supports even the most
demanding Power Line Modem requirements with
greater than 460mA minimum output current (+25°C
minimum value) with low harmonic distortion.
TRIPLES
NOTES
OPA691
OPA2691
OPA3691
Single +12V
Capable
—
THS6042
—
±15V Capable
—
OPA2677
—
Single +12V
Capable
—
OPA2674
—
Single +12V
Capable,
Output Current
Limit
+12V
1/2
OPA2673
511W
+6.0V
2kW
5W
1:1.4
1mF
2VPP
50W
8VPP
348W
2kW
511W
5W
1/2
OPA2673
Single-Supply Line Driver
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008, Texas Instruments Incorporated
OPA2673
SBOS382A – JUNE 2008 – REVISED OCTOBER 2008..................................................................................................................................................... www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE/ORDERING INFORMATION (1)
(1)
(2)
PRODUCT
PACKAGELEAD
PACKAGE
DESIGNATOR
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING
OPA2673
QFN-16
RGV
–40°C to +85°C
OPA2673
OPA2673 (2)
MSOP-10
PowerPAD™
DGQ
–40°C to +85°C
OPA2673
ORDERING
NUMBER
TRANSPORT MEDIA,
QUANTITY
OPA2673IRGVT
Tape and Reel, 250
OPA2673IRGVR
Tape and Reel, 2500
OPA2673IDGQ
Rails, 80
OPA2673IDGQR
Tape and Reel, 2500
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
Available 3Q 2008.
ABSOLUTE MAXIMUM RATINGS (1)
Over operating free-air temperature range (unless otherwise noted).
PARAMETER
OPA2673
UNIT
±6.5
VDC
Power supply
Internal power dissipation
See Thermal Characteristics
Differential input voltage
±2
Input common-mode voltage range
±VS
V
–40 to +125
C
Lead temperature soldering
+300
°C
Junction temperature, TJ
+150
°C
Continuous operating junction temperature
+139
°C
Human body model (HBM)
2000
V
Charge device model (CDM)
1500
V
Machine model (MM)
200
V
Storage temperature range: DGQ, RGV packges
ESD
rating:
(1)
V
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
PIN CONFIGURATIONS
(1)
OUT B
+VS
13
+VS
14
(1)
NC
DGQ PACKAGE(2)(3)
MSOP-10
(TOP VIEW)
+IN A
3
10
+ IN B
GND
4
9
NC
(1)
5
8
-IN B
A0
11
7
2
-VS
-IN A
6
NC
(1)
10
Out B
2
9
-In B
Out A
3
8
+In B
-In A
4
7
A1
+In A
5
6
A0
A1
(1)
(1)
12
NC
1
NC
1
NC
2
15
16
OUT A
RGV PACKAGE(2)
QFN-16
(TOP VIEW)
(1)
NC = Not connected.
(2)
–VS connected through PowerPAD.
(3)
Available 3Q 2008.
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Product Folder Link(s): OPA2673
OPA2673
www.ti.com..................................................................................................................................................... SBOS382A – JUNE 2008 – REVISED OCTOBER 2008
ELECTRICAL CHARACTERISTICS: VS = ±6V
At TA = +25°C, A0 = A1 = 0 (full power), G = +4V/V, RF = 402Ω, and RL = 100Ω, unless otherwise noted. See Figure 76 for ac
performance only. Single channel specifications, except where noted.
OPA2673IDGQ, IRGV
MIN/MAX OVER
TEMPERATURE
TYP
UNIT
MIN/
MAX
TEST
LEVEL (1)
600
MHz
typ
C
450
MHz
typ
C
260
MHz
min
B
260
MHz
min
B
2
dB
typ
C
G = +4V/V, VO = 500mVPP
50
MHz
typ
C
G = +4V/V, VO = 5VPP
300
MHz
typ
C
Slew rate
G = +4V/V, 5V step
3000
V/µs
min
B
Rise-and-fall time
G = +4V/V, 2V step
1.2
ns
typ
C
B
PARAMETER
+25°C (2)
0°C to
70°C (3)
CONDITIONS
+25°C
G = +1V/V, RF = 511Ω, VO = 500mVPP
G = +2V/V, RF = 475Ω, VO = 500mVPP
G = +4V/V, RF = 402Ω, VO = 500mVPP
340
270
265
G = +8V/V, RF = 250Ω, VO = 500mVPP
360
270
265
G = +1V/V, RF = 511Ω
–40°C to
+85°C (3)
AC PERFORMANCE
Small-signal bandwidth
Peaking at a gain of +1
Bandwidth for 0.1dB flatness
Large-signal bandwidth
Harmonic distortion
2600
2400
2300
G = +4V/V, VO = 2VPP, 10MHz,
RL = 50Ω
2nd harmonic
3rd harmonic
A1 = 0, A0 = 0, full bias
–67
–61
–60
–59
dBc
max
A1 = 0, A0 = 1, 75% bias
–70
–60
–59
–58
dBc
max
B
A1 = 1, A0 = 0, 50% bias
–69
dBc
typ
C
B
A1 = 0, A0 = 0, full bias
–80
–73
–72
–70
dBc
max
A1 = 0, A0 = 1, 75% bias
–75
–68
–67
–66
dBc
max
B
A1 = 1, A0 = 0, 50% bias
–68
dBc
typ
C
B
G = +4V/V, VO = 2VPP, 20MHz,
RL = 50Ω
2nd harmonic
3rd harmonic
A1 = 0, A0 = 0, full bias
-68
–62
–61
–60
dBc
max
A1 = 0, A0 = 1, 75% bias
-67
–60
–59
–58
dBc
max
B
A1 = 1, A0 = 0, 50% bias
-65
dBc
typ
C
B
A1 = 0, A0 = 0, full bias
-72
–63
–62
–61
dBc
max
A1 = 0, A0 = 1, 75% bias
-66
–60
–53
–58
dBc
max
B
A1 = 1, A0 = 0, 50% bias
-60
dBc
typ
C
Input voltage noise
f > 1MHz
2.4
2.8
3.2
3.6
nV/√Hz
max
B
Noninverting input current noise
f > 1MHz
5.2
5.8
5.3
6.0
pA/√Hz
max
B
Inverting input current noise
f > 1MHz
35
40
42
43
pA/√Hz
max
B
NTSC, RL = 150Ω
0.03
%
typ
C
NTSC, RL = 37.5Ω
0.05
%
typ
C
NTSC, RL = 150Ω
0.01
degrees
typ
C
NTSC, RL = 37.5Ω
0.04
degrees
typ
C
f = 5MHz, Input-referred
–92
dBc
typ
C
Differential gain error
Differential phase error
Channel-to-channel crosstalk (QFN-16)
DC PERFORMANCE (4)
Open-loop transimpedance gain (ZOL)
Differential, VO = 0V, RL = 100Ω
90
60
56
55
kΩ
min
A
Input offset voltage, full bias
VCM = 0V
±2
±7
±8
±9
mV
max
A
Average offset drift, full bias
VCM = 0V
±25
±30
µV/°C
max
B
Input offset voltage matching, full bias
VCM = 0V
±0.5
±2
±2.5
±2.5
mV
max
A
Input offset voltage, 75% bias
VCM = 0V
±2
±7
±8
±9
mV
max
B
Input offset voltage, 50% bias
VCM = 0V
±2
±7
±8
±9
mV
max
B
(1)
(2)
(3)
(4)
Test levels: (A) 100% tested at +25°C. Over temperature limits set by characterization and simulation. (B) Limits set by characterization
and simulation. (C) Typical value only for information.
Junction temperature = ambient for +25°C tested specifications.
Junction temperature = ambient at low temperature limit; junction temperature = ambient +18°C at high temperature limit for over
temperature specifications.
Current is considered positive-out-of node. VCM is the input common-mode voltage.
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ELECTRICAL CHARACTERISTICS: VS = ±6V (continued)
At TA = +25°C, A0 = A1 = 0 (full power), G = +4V/V, RF = 402Ω, and RL = 100Ω, unless otherwise noted. See Figure 76 for ac
performance only. Single channel specifications, except where noted.
OPA2673IDGQ, IRGV
MIN/MAX OVER
TEMPERATURE
TYP
CONDITIONS
+25°C
+25°C (2)
0°C to
70°C (3)
–40°C to
+85°C (3)
Noninverting input bias current
VCM = 0V
±5
±25
±27
Noninverting input bias current drift
VCM = 0V
±45
Noninverting input bias current matching
VCM = 0V
±0.5
±5
Inverting input bias current
VCM = 0V
±6
±48
Inverting input bias current drift
VCM = 0V
Inverting input bias current matching
VCM = 0V
PARAMETER
UNIT
MIN/
MAX
TEST
LEVEL (1)
±28
µA
max
A
±47
µA/°C
max
B
±6
±7
µA
max
A
±52
±55
µA
max
A
±90
±110
µA/°C
max
B
µA
max
A
A
DC PERFORMANCE (continued)
±6
±25
±30
±30
±3.6
±3.5
±3.3
±3.2
V
min
56
50
48
47
dB
min
A
MΩ || pF
typ
C
B
INPUT (5)
Common-mode input range (6)
Common-mode rejection ratio
VCM = 0V, Input-referred
Noninverting input impedance
1.5 ||
1.5
Inverting input resistance
Open-loop
32
16
Ω
min
Inverting input resistance
Open-loop
32
40
Ω
max
B
G = +4V/V, f = 1MHz, A1 = A0 = 1
85
dB
typ
C
Shutdown isolation
OUTPUT
Voltage output swing
No load
±4.9
±4.8
±4.75
±4.7
V
min
A
100Ω load
±4.8
±4.75
±4.7
±4.65
V
min
B
25Ω load
±4.7
±4.5
±4.45
±4.4
V
min
A
Output current at full power (peak)
RL = 4Ω, A1 = 0, A0 = 0
±700
±460
±440
±425
mA
min
A
Output current at 75% bias (peak)
RL = 4Ω, A1 = 0, A0 = 1
±500
±350
±325
±300
mA
min
A
Output current at 50% bias (peak)
RL = 4Ω, A1 = 1, A0 = 0
±180
±120
±115
±110
mA
min
A
Short-cIrcuit current
VO = 0V
±800
mA
typ
C
Closed-loop output impedance at full power
G = +4V/V, f ≤ 100kHz, A1 = 0, A0 = 0
0.01
Ω
typ
C
Closed-loop output impedance at 75% bias
G = +4V/V, f ≤ 100kHz, A1 = 0, A0 = 1
0.01
Ω
typ
C
Closed-loop output impedance at 50% bias
G = +4V/V, f ≤ 100kHz, A1 = 1, A0 = 0
0.01
Ω
typ
C
25 || 4
kΩ || pF
typ
C
±20
mV
typ
C
Output impedance at shutdown
Output switching glitch
Inputs at GND
POWER CONTROL
Maximum logic 0
A1, A0, VS = ±6V
0.8
0.8
0.8
V
max
A
Minimum logic 1
A1, A0, VS = ±6V
2
2
2
V
min
A
Logic input current
(5)
(6)
4
A0, A1 = 0, each line
6
8
9
10
µA
max
A
A0, A1 = 1, each line
–50
–110
–125
–150
µA
min
A
Current is considered positive-out-of node. VCM is the input common-mode voltage.
Tested < 3dB below minimum CMRR specifications at ±CMIR limits.
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Product Folder Link(s): OPA2673
OPA2673
www.ti.com..................................................................................................................................................... SBOS382A – JUNE 2008 – REVISED OCTOBER 2008
ELECTRICAL CHARACTERISTICS: VS = ±6V (continued)
At TA = +25°C, A0 = A1 = 0 (full power), G = +4V/V, RF = 402Ω, and RL = 100Ω, unless otherwise noted. See Figure 76 for ac
performance only. Single channel specifications, except where noted.
OPA2673IDGQ, IRGV
MIN/MAX OVER
TEMPERATURE
TYP
PARAMETER
CONDITIONS
+25°C
+25°C (2)
0°C to
70°C (3)
–40°C to
+85°C (3)
±6.5
±6.5
±6.5
MIN/
MAX
TEST
LEVEL (1)
V
typ
C
V
max
A
V
typ
C
UNIT
POWER SUPPLY
Specified operating voltage
±6
Maximum operating voltage
Minimum operating voltage
±3.5
Maximum quiescent current at full power
VS = ±6V, Total both channels,
A1 = 0, A0 = 0
32
38
40
42
mA
max
A
Minimum quiescent current at full power
VS = ±6V, Total both channels,
A1 = 0, A0 = 0
32
26
25
24
mA
min
A
Supply current at 75% bias
VS = ±6V, Total both channels,
A1 = 0, A0 = 1
24
29
31
33
mA
max
A
Supply current at 50% bias
VS = ±6V, Total both channels,
A1 = 1, A0 = 0
16
19
20
21
mA
max
A
Supply current (off-line)
VS = ±6V, Total both channels,
A1 = 1, A0 = 1
5.5
7
7.5
8
mA
max
A
Input-referred
54
49
48
47
dB
min
A
IRGV, IDGQ packages
–40 to
+85
°C
typ
C
PowerPAD soldered to PCB
45
°C/W
typ
C
PowerPAD floating (7)
75
PowerPAD soldered to PCB
40
°C/W
typ
C
Supply current step time
Power-supply rejection ratio
(–PSRR)
THERMAL CHARACTERISTICS
Specified operating temperature range
Thermal resistance, θJA
RGV
DGQ
(7)
Junction-to-ambient
QFN-16
MSOP-10
PowerPad is physically connected to the negative (-VS) supply for dual-supply configuration or ground (GND) for single-supply
configuration.
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TYPICAL CHARACTERISTICS: VS = ±6V, Full Bias
At TA = +25°C, G = +4V/V, RF = 402Ω, and RL = 100Ω, unless otherwise specified.
SMALL-SIGNAL FREQUENCY RESPONSE
OVER POWER SETTINGS
3
0
0
G = +4V/V
RF = 402W
-3
-6
G = +2V/V
RF = 475W
-9
G = +1V/V
RF = 511W
-12
-15
VO = 500mVPP
RL = 100W
-18
-3
Full Power
-6
50% Bias
-9
75% Bias
-12
G = +4V/V
RL = 100W
VO = 500mVPP
-15
G = +8V/V
RF = 250W
-18
10M
100M
0
1G
100
200 300 400 500
600 700 800 900 1000
Frequency (Hz)
Frequency (MHz)
Figure 1.
Figure 2.
LARGE-SIGNAL FREQUENCY RESPONSE
SMALL-SIGNAL AND
LARGE-SIGNAL PULSE RESPONSES
3
3
300
0
2
200
1
100
-3
VO = 2VPP
-6
VO = 8VPP
VO = 5VPP
-9
-12
VO = 1VPP
-15
0
100
-3
200 300 400 500
0
Small Signal ±100mVP
Right Scale
-1
-2
G = +4V/V
RL = 100W
-18
0
G = +4V/V
RL = 100W
-100
Large Signal ±2.5VP
Left Scale
Output Voltage (mV)
Normalized Gain (dB)
Normalized Gain (dB)
3
Output Voltage (V)
Normalized Gain (dB)
SMALL-SIGNAL FREQUENCY RESPONSE
-200
-300
Time (10ns/div)
600 700 800 900 1000
Frequency (MHz)
Figure 3.
Figure 4.
CHANNEL-TO-CHANNEL CROSSTALK
-40
OUTPUT VOLTAGE AND CURRENT LIMITATIONS
6
Input-Referred
-45
4
Output Voltage (V)
Crosstalk (dB)
-50
-55
-60
-65
-70
50W
Load Line
2
0
100W Load Line
10W Load Line
-2
2W Internal
Power Dissipation
Single Channel
-4
-75
25W Load Line
-80
1
6
2W Internal
Power Dissipation
Single Channel
10
100
-6
-800
-600
-400
-200
0
200
Frequency (MHz)
Output Current (mA)
Figure 5.
Figure 6.
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400
600
800
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OPA2673
www.ti.com..................................................................................................................................................... SBOS382A – JUNE 2008 – REVISED OCTOBER 2008
TYPICAL CHARACTERISTICS: VS = ±6V, Full Bias (continued)
At TA = +25°C, G = +4V/V, RF = 402Ω, and RL = 100Ω, unless otherwise specified.
HARMONIC DISTORTION vs FREQUENCY
-55
G = +4V/V
VO = 2VPP
RL = 100W
-65
-70
-75
2nd Harmonic
-80
-85
-90
3rd Harmonic
-95
-100
1
10
-70
-80
-85
-90
-95
-110
0
100
8
Figure 7.
Figure 8.
-75
2nd Harmonic
-80
-85
3rd Harmonic
-90
10
HARMONIC DISTORTION vs SUPPLY VOLTAGE
-76
Harmonic Distortion (dBc)
Harmonic Distortion (dBc)
6
Output Voltage (VPP)
G = +4V/V
RL = 100W
f = 10MHz
VO = 2VPP
-78
-80
2nd Harmonic
-82
-84
-86
3rd Harmonic
-88
-90
-95
10
100
1k
3.5
3.0
4.0
4.5
5.0
5.5
6.0
Resistance (W)
Supply Voltage (±VS)
Figure 9.
Figure 10.
HARMONIC DISTORTION vs NONINVERTING GAIN
TWO-TONE, THIRD-ORDER INTERMODULATION
INTERCEPT
-60
60
f = 10MHz
RL = 100W
VO = 2VPP
-65
50
Intercept Point (+dBm)
Harmonic Distortion (dBc)
4
2
Frequency (MHz)
G = +4V/V
f = 10MHz
VO = 2VPP
-70
3rd Harmonic
-100
HARMONIC DISTORTION vs LOAD RESISTANCE
-65
2nd Harmonic
-75
-105
Single Channel
-105
0.1
G = +4V/V
f = 10MHz
RL = 100W
-65
Harmonic Distortion (dBc)
-60
Harmonic Distortion (dBc)
HARMONIC DISTORTION vs OUTPUT VOLTAGE
-60
-70
2nd Harmonic
-75
-80
3rd Harmonic
-85
40
30
20
10
-90
Power at Matched 50W Load
0
-95
1
10
0
10
20
30
40
50
60
Gain (V/V)
Frequency (MHz)
Figure 11.
Figure 12.
70
80
90
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TYPICAL CHARACTERISTICS: VS = ±6V, Full Bias (continued)
At TA = +25°C, G = +4V/V, RF = 402Ω, and RL = 100Ω, unless otherwise specified.
OVERDRIVE RECOVERY
Input
24
4
16
2
8
0
0
Output
-2
-8
-4
-16
-6
-24
Output Voltage (V)
Input Voltage (V)
6
CMRR AND PSRR vs FREQUENCY
70
32
G = +4V/V
RL = 100W
Power-Supply Rejection Ratio (dB),
Common-Mode Rejection Ratio (dB)
8
CMRR
60
50
-PSRR
40
30
20
+PSRR
10
0
-32
-8
1k
Time (25ns/div)
10k
100k
1M
10M
100M
Frequency (Hz)
Figure 13.
Figure 14.
OPEN-LOOP TRANSIMPEDANCE GAIN AND PHASE
CLOSED-LOOP OUTPUT IMPEDANCE vs FREQUENCY
10
0
-45
Gain
Phase
80
-90
60
-135
40
-180
20
-225
-270
0
10k
100k
1M
10M
100M
1
Impedance (W)
100
Transimpedance Phase (°)
Transimpedance Gain (dBW)
120
0.1
0.01
0.001
10k
1G
100k
Frequency (Hz)
1M
10M
Frequency (Hz)
Figure 15.
Figure 16.
ACTIVE OFF-LINE IMPEDANCE vs FREQUENCY
COMMON-MODE INPUT VOLTAGE RANGE
AND OUTPUT SWING vs SUPPLY VOLTAGE
6
10k
Open-Loop
5
Voltage Range (±V)
Impedance (W)
Positive and Negative Output Voltage Swing
1k
100
Closed-Loop (RF = 750W, G = +4V/V)
4
3
2
Positive and Negative Common-Mode Input Voltage
1
0
10
10k
100k
1M
10M
3.5
Frequency (Hz)
4.5
5.0
5.5
6.0
Supply Voltage (±V)
Figure 17.
8
4.0
Figure 18.
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TYPICAL CHARACTERISTICS: VS = ±6V, Full Bias (continued)
At TA = +25°C, G = +4V/V, RF = 402Ω, and RL = 100Ω, unless otherwise specified.
COMPOSITE VIDEO (dG/dφ)
TYPICAL DC DRIFT OVER TEMPERATURE
4.0
8
7
dG, df (%/°)
6
dG, Negative Video
5
G = +2V/V
RF = 475W
VS = ±6V
4
3
2
dG, Positive Video
1
df, Negative Video
-18.0
3.0
-19.0
2.0
-19.5
1.5
-20.0
1.0
-20.5
0.5
3
-21.0
Noninverting Bias Current
-21.5
0
-22.0
-0.5
-50
2
-18.5
Input Offset Voltage
2.5
0
1
-17.5
Inverting Bias Current
3.5
Inverting Input Bias Current (mA)
Input Offset Voltage (mV),
Noninverting Input Bias Current (mA)
df, Positive Video
-25
0
4
25
50
75
100
125
Temperature (°C)
Number of 150W Loads
Figure 19.
Figure 20.
SUPPLY AND OUTPUT CURRENT vs TEMPERATURE
Supply Current
580
30.8
30.6
560
Sourcing Output Current
540
30.4
30.2
520
500
30.0
Sinking Output Current
480
29.8
460
29.6
440
28.4
420
29.2
29.0
400
-50
-25
0
25
50
75
100
125
Supply Current (mA)
Output Current (mA)
INPUT VOLTAGE AND CURRENT NOISE DENSITY
100
31.0
Voltage Noise Density (nV/ÖHz),
Current Noise Density (pA/ÖHz)
600
Inverting Current Noise (35pA/ÖHz)
Noninverting Current Noise (5.2pA/ÖHz)
10
Voltage Noise (2.4nV/ÖHz)
1
100
1k
10k
100k
1M
10M
Frequency (Hz)
Temperature (°C)
Figure 21.
Figure 22.
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TYPICAL CHARACTERISTICS: VS = ±6V Differential, Full Bias
At TA = +25°C, RF = 511Ω, RL = 100Ω Differential, GDIFF = +4V/V, and GCM = +1V/V, unless otherwise specified.
SMALL-SIGNAL FREQUENCY RESPONSE
OVER POWER SETTING
SMALL-SIGNAL FREQUENCY RESPONSE
3
3
GDIFF = +1V/V
0
GDIFF =
+2V/V
-3
Normalized Gain (dB)
Normalized Gain (dB)
0
GDIFF = +4V/V
-6
GDIFF = +8V/V
-9
-12
GCM = +1V/V
VO = 500mVPP
RL = 100W Differential
-15
-18
10M
Full Bias
-6
50% Bias
-9
75% Bias
GDIFF = +4V/V
GCM = +1V/V
RL = 100W Differential
VO = 500mVPP
-12
-15
-18
100M
1G
0
100
200
300
400
500
600
Frequency (Hz)
Frequency (MHz)
Figure 23.
Figure 24.
LARGE-SIGNAL FREQUENCY RESPONSE
SMALL-SIGNAL AND
LARGE-SIGNAL PULSE RESPONSES
5
3
Output Voltage (V)
-6
VO = 8VPP
-9
VO = 4VPP
-12
GDIF = +4V/V
GCM = +1V/V
RL = 100W Differential
-15
-18
0
100
200
0.6
2
0.4
1
0.2
0
0
-1
-0.2
Small-Signal ±0.5VP
Right Scale
-2
-0.4
-3
-0.6
-4
-0.8
-5
300
400
500
600
Output Voltage (V)
VO = 16VPP
0.8
Large-Signal ±4VP
Left Scale
3
-3
700
1.0
4
0
Normalized Gain (dB)
-3
-1.0
700
Time (10ns/div)
Frequency (MHz)
Figure 25.
Figure 26.
DIFFERENTIAL RS vs CAPACITIVE LOAD
FREQUENCY RESPONSE vs CAPACITIVE LOAD
20
15
CL = 100pF
12
10
CL = 10pF
CL =
22pF
RS (W)
Gain (dB)
CL = 47pF
9
RS
OPA2673
6
VIN
CL
3
1kW
(optional)
VOUT
RS
OPA2673
0
1
1
10
100
1000
10M
Capacitance (pF)
Figure 27.
10
100M
500M
Frequency (Hz)
Figure 28.
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TYPICAL CHARACTERISTICS: VS = ±6V Differential, Full Bias (continued)
At TA = +25°C, RF = 511Ω, RL = 100Ω Differential, GDIFF = +4V/V, and GCM = +1V/V, unless otherwise specified.
HARMONIC DISTORTION vs FREQUENCY
-70
HARMONIC DISTORTION vs OUTPUT VOLTAGE
-55
GDIFF = +4V/V
GCM = +1V/V
RL = 100W Differential
VO = 2VPP
GDIFF = +4V/V
GCM = +1V/V
RL = 100W Differential
f = 10MHz
-60
-65
Harmonic Distortion (dBc)
Harmonic Distortion (dBc)
-60
-80
2nd Harmonic
-90
3rd Harmonic
-100
-70
3rd Harmonic
-75
-80
-85
2nd Harmonic
-90
-95
-100
-105
-110
-110
0.1
1
10
0
100
8
Figure 29.
Figure 30.
10
HARMONIC DISTORTION vs NONINVERTING GAIN
-70
GDIFF = +4V/V
GCM = +1V/V
VO = 2VPP
f = 10MHz
Harmonic Distortion (dBc)
Harmonic Distortion (dBc)
-80
6
Output Voltage (VPP)
HARMONIC DISTORTION vs LOAD RESISTANCE
-75
4
2
Frequency (MHz)
3rd Harmonic
-85
-90
2nd Harmonic
-95
-100
GCM = +1V/V
VO = 2VPP
f = 10MHz
RL = 100W Differential
-75
-80
3rd Harmonic
-85
-90
-95
2nd Harmonic
-100
-105
10
100
1k
1
10
Resistance (W)
Gain (V/V)
Figure 31.
Figure 32.
HARMONIC DISTORTION vs SUPPLY VOLTAGE
-84
Harmonic Distortion (dBc)
3rd Harmonic
-86
-88
-90
-92
GDIFF = +4V/V
GCM = +1V/V
RL = 100W Differential
f = 10MHz
VO = 2VPP
-94
2nd Harmonic
-96
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Supply Voltage (±VS)
Figure 33.
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TYPICAL CHARACTERISTICS: VS = ±6V, 75% Bias
At TA = +25°C, G = +4V/V, RF = 402Ω, and RL = 100Ω, unless otherwise specified.
SMALL-SIGNAL FREQUENCY RESPONSE
LARGE-SIGNAL FREQUENCY RESPONSE
3
3
0
G = +1V/V
RF = 511W
-3
Normalized Gain (dB)
Normalized Gain (dB)
0
G = +2V/V
RF = 475W
-6
-9
G = +4V/V
RF = 402W
-12
-15
G = +8V/V
RF = 250W
VO = 500mVPP
RL = 100W
-18
-3
VO = 1VPP
-6
VO = 5VPP
-12
-15
G = +4V/V
RL = 100W
-18
10M
100M
1G
0
100
200
0
-100
Large Signal ±2.5VP
Left Scale
24
Input
-200
-300
8
0
0
Output
-2
-8
-4
-16
-6
-24
-8
-32
Time (25ns/div)
Figure 37.
COMPOSITE VIDEO (dG/dφ)
SUPPLY AND OUTPUT CURRENT vs TEMPERATURE
24.50
500
0
df, Positive Video
480
-0.015
dG, Positive Video
-0.020
-0.025
-0.030
G = +2V/V
RF = 475W
VS = ±6V
-0.035
-0.040
df, Negative Video
2
3
4
24.25
460
24.00
440
23.75
420
23.50
Sinking Output Current
400
23.25
380
23.00
360
22.75
340
22.50
320
22.25
22.00
300
-0.045
1
Supply Current
Sourcing Output Current
Supply Current (mA)
dG, Negative Video
Output Current (mA)
-0.005
dG, df (%/°)
16
2
Figure 36.
-0.010
900
32
G = +4V/V
RL = 100W
4
Input Voltage (V)
Output Voltage (V)
100
-1
800
Output Voltage (V)
1
6
Output Voltage (mV)
200
Small Signal ±100mVP
Right Scale
700
OVERDRIVE RECOVERY
8
Time (10ns/div)
-50
-25
0
25
50
75
100
125
Temperature (°C)
Number of 150W Loads
Figure 38.
12
600
Figure 35.
2
-3
500
Figure 34.
300
G = +4V/V
RL = 100W
400
Frequency (MHz)
3
-2
300
Frequency (Hz)
SMALL-SIGNAL AND
LARGE-SIGNAL PULSE RESPONSES
0
VO = 2VPP
VO = 8VPP
-9
Figure 39.
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TYPICAL CHARACTERISTICS: VS = ±6V, 75% Bias (continued)
At TA = +25°C, G = +4V/V, RF = 402Ω, and RL = 100Ω, unless otherwise specified.
HARMONIC DISTORTION vs FREQUENCY
-55
G = +4V/V
VO = 2VPP
RL = 100W
-65
-70
2nd Harmonic
-75
-80
-85
3rd Harmonic
-90
-95
-70
3rd Harmonic
-75
-80
-85
-90
-95
-105
-105
0.1
1
10
0
100
6
8
Output Voltage (VPP)
Figure 40.
Figure 41.
Harmonic Distortion (dBc)
-75
2nd Harmonic
-80
-85
-90
10
HARMONIC DISTORTION vs SUPPLY VOLTAGE
-74
G = +4V/V
f = 10MHz
VO = 2VPP
-70
4
2
Frequency (MHz)
HARMONIC DISTORTION vs LOAD RESISTANCE
-65
Harmonic Distortion (dBc)
2nd Harmonic
-100
-100
3rd Harmonic
G = +4V/V
RL = 100W
f = 10MHz, VO = 2VPP
-76
-78
2nd Harmonic
-80
-82
3rd Harmonic
-84
-86
-95
10
100
1k
3.5
3.0
4.0
4.5
5.0
5.5
6.0
Resistance (W)
Supply Voltage (±VS)
Figure 42.
Figure 43.
HARMONIC DISTORTION vs NONINVERTING GAIN
TWO-TONE, THIRD-ORDER INTERMODULATION
INTERCEPT
-60
60
f = 10MHz
RL = 100W
VO = 2VPP
-65
-70
50
Intercept Point (+dBm)
Harmonic Distortion (dBc)
G = +4V/V
f = 10MHz
RL = 100W
-65
Harmonic Distortion (dBc)
-60
Harmonic Distortion (dBc)
HARMONIC DISTORTION vs OUTPUT VOLTAGE
-60
2nd Harmonic
-75
-80
-85
3rd Harmonic
40
30
20
10
-90
Power at Matched 50W Load
0
-95
1
10
0
10
20
30
40
50
60
Gain (V/V)
Frequency (MHz)
Figure 44.
Figure 45.
70
80
90
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TYPICAL CHARACTERISTICS: VS = ±6V, 75% Bias (continued)
At TA = +25°C, G = +4V/V, RF = 402Ω, and RL = 100Ω, unless otherwise specified.
CLOSED-LOOP OUTPUT IMPEDANCE vs FREQUENCY
10
Impedance (W)
1
0.1
0.01
0.001
10k
100k
1M
10M
Frequency (Hz)
Figure 46.
14
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TYPICAL CHARACTERISTICS: VS = ±6V Differential, 75% Bias
At TA = +25°C, RF = 511Ω, RL = 100Ω Differential, GDIFF = +4V/V, and GCM = +1V/V, unless otherwise specified.
SMALL-SIGNAL FREQUENCY RESPONSE
LARGE-SIGNAL FREQUENCY RESPONSE
3
3
GDIFF = +1V/V
-3
Normalized Gain (dB)
Normalized Gain (dB)
0
0
GDIFF =
+2V/V
-6
GDIFF = +4V/V
GCM = +1V/V
VO = 500mVPP
RL = 100W Differential
-9
-12
-3
-6
VO = 8VPP
-9
VO = 16VPP
-12
GDIF = +4V/V
GCM = +1V/V
RL = 100W Differential
-15
GDIFF = +8V/V
-18
10M
100M
1G
0
100
300
400
500
Frequency (Hz)
Frequency (MHz)
Figure 47.
Figure 48.
SMALL-SIGNAL AND
LARGE-SIGNAL PULSE RESPONSES
5
1
0.2
0
0
Small-Signal ±0.5VP
Right Scale
-2
-0.2
-0.4
-3
-0.6
-4
-0.8
-5
Output Voltage (V)
0.4
Harmonic Distortion (dBc)
0.6
2
-1
-50
0.8
Large-Signal ±4VP
Left Scale
3
600
700
HARMONIC DISTORTION vs FREQUENCY
1.0
4
Output Voltage (V)
200
VO = 4VPP
-60
-70
GDIFF = +4V/V
GCM = +1V/V
RL = 100W Differential
VO = 2VPP
2nd Harmonic
-80
-90
3rd Harmonic
-100
-110
100k
-1.0
Time (10ns/div)
1M
10M
100M
Frequency (Hz)
Figure 49.
Figure 50.
HARMONIC DISTORTION vs OUTPUT VOLTAGE
GDIFF = +4V/V
GCM = +1V/V
RL = 100W Differential
f = 10MHz
-60
-70
HARMONIC DISTORTION vs LOAD RESISTANCE
-60
-65
Harmonic Distortion (dBc)
Harmonic Distortion (dBc)
-50
3rd Harmonic
-80
2nd Harmonic
-90
-100
-70
GDIFF = +4V/V
GCM = +1V/V
VO = 2VPP
f = 10MHz
-75
-80
-85
3rd Harmonic
-90
2nd Harmonic
-95
-100
-105
-110
0
2
4
6
8
10
10
100
1k
Resistance (W)
Output Voltage (VPP)
Figure 51.
Figure 52.
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TYPICAL CHARACTERISTICS: VS = ±6V Differential, 75% Bias (continued)
At TA = +25°C, RF = 511Ω, RL = 100Ω Differential, GDIFF = +4V/V, and GCM = +1V/V, unless otherwise specified.
HARMONIC DISTORTION vs NONINVERTING GAIN
GCM = +1V/V
VO = 2VPP
f = 10MHz
-70
-75
3rd Harmonic
-80
-85
-90
-95
2nd Harmonic
RL = 100W Differential
-100
1
16
10
HARMONIC DISTORTION vs SUPPLY VOLTAGE
-74
-76
Harmonic Distortion (dBc)
Harmonic Distortion (dBc)
-65
3rd Harmonic
-78
-80
-82
-84
-86
GDIFF = +4V/V
GCM = +1V/V
RL = 100W Differential
f = 10MHz
VO = 2VPP
-88
-90
2nd Harmonic
-92
-94
2.5
3.0
3.5
4.0
4.5
Gain (V/V)
Supply Voltage (±VS)
Figure 53.
Figure 54.
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5.5
6.0
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TYPICAL CHARACTERISTICS: VS = ±6V, 50% Bias
At TA = +25°C, G = +4V/V, RF = 402Ω, and RL = 100Ω, unless otherwise specified.
SMALL-SIGNAL FREQUENCY RESPONSE
LARGE-SIGNAL FREQUENCY RESPONSE
3
6
0
0
Normalized Gain (dB)
Normalized Gain (dB)
G = +1V/V
RF = 511W
G = +2V/V
RF = 475W
3
-3
-6
G = +4V/V
RF = 402W
-9
-12
G = +8V/V
RF = 250W
VO = 500mVPP
RL = 100W
-15
-18
-3
VO = 2VPP
-6
VO = 1VPP
-9
VO = 5VPP
-12
VO = 8VPP
-15
G = +4V/V
RL = 100W
-18
10M
100M
1G
0
100
200
Figure 56.
100
-3
6
0
-100
Large Signal ±2.5VP
Left Scale
32
G = +4V/V
RL = 100W
24
Input
Input Voltage (V)
Output Voltage (V)
1
-1
-200
-300
4
16
2
8
0
0
Output
-2
-8
-4
-16
-6
-24
-8
-32
Time (25ns/div)
Time (10ns/div)
Figure 57.
Figure 58.
COMPOSITE VIDEO (dG/dφ)
0
SUPPLY AND OUTPUT CURRENT vs TEMPERATURE
15.0
240
df, Positive Video
Supply Current
-0.005
14.8
220
-0.010
Output Current (mA)
-0.020
-0.025
dG, Negative Video
-0.030
-0.035
G = +2V/V
RF = 475W
VS = ±6V
-0.040
-0.045
df, Negative Video
Sourcing Output Current
200
14.6
180
14.4
160
14.2
Sinking Output Current
140
14.0
120
13.8
13.6
100
-0.050
1
2
3
4
Supply Current (mA)
dG, Positive Video
-0.015
dG, df (%/°)
700
Output Voltage (V)
200
8
Output Voltage (mV)
2
Small Signal ±100mVP
Right Scale
600
OVERDRIVE RECOVERY
300
G = +4V/V
RL = 100W
500
Figure 55.
3
-2
400
Frequency (MHz)
SMALL-SIGNAL AND
LARGE-SIGNAL PULSE RESPONSES
0
300
Frequency (Hz)
-50
-25
0
25
50
75
100
125
Temperature (°C)
Number of 150W Loads
Figure 59.
Figure 60.
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TYPICAL CHARACTERISTICS: VS = ±6V, 50% Bias (continued)
At TA = +25°C, G = +4V/V, RF = 402Ω, and RL = 100Ω, unless otherwise specified.
HARMONIC DISTORTION vs FREQUENCY
HARMONIC DISTORTION vs OUTPUT VOLTAGE
-55
G = +4V/V
VO = 2VPP
RL = 100W
-50
-60
Harmonic Distortion (dBc)
Harmonic Distortion (dBc)
-40
2nd Harmonic
-70
-80
-90
3rd Harmonic
-110
100k
-70
3rd Harmonic
-75
-80
-90
1M
10M
0
100M
6
8
Output Voltage (VPP)
Figure 61.
Figure 62.
Harmonic Distortion (dBc)
2nd Harmonic
-75
-80
-85
3rd Harmonic
-90
10
HARMONIC DISTORTION vs SUPPLY VOLTAGE
-70
G = +4V/V
f = 10MHz
VO = 2VPP
-70
4
2
Frequency (Hz)
HARMONIC DISTORTION vs LOAD RESISTANCE
-65
Harmonic Distortion (dBc)
2nd Harmonic
-65
-85
-100
G = +4V/V
RL = 100W
f = 10MHz
VO = 2VPP
-72
2nd Harmonic
-74
-76
-78
3rd Harmonic
-80
-95
10
100
1k
7
6
8
9
10
11
12
Resistance (W)
Supply Voltage (VS)
Figure 63.
Figure 64.
HARMONIC DISTORTION vs NONINVERTING GAIN
TWO-TONE, THIRD-ORDER INTERMODULATION
INTERCEPT
-60
60
f = 10MHz
RL = 100W
VO = 2VPP
-65
-70
50
Intercept Point (+dBm)
Harmonic Distortion (dBc)
G = +4V/V
f = 10MHz
RL = 100W
-60
2nd Harmonic
-75
3rd Harmonic
40
30
20
-80
10
-85
0
Power at Matched 50W Load
1
18
10
0
10
20
30
40
50
60
Gain (V/V)
Frequency (MHz)
Figure 65.
Figure 66.
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70
80
90
100
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TYPICAL CHARACTERISTICS: VS = ±6V, 50% Bias (continued)
At TA = +25°C, G = +4V/V, RF = 402Ω, and RL = 100Ω, unless otherwise specified.
CLOSED-LOOP OUTPUT IMPEDANCE vs FREQUENCY
10
Impedance (W)
1
0.1
0.01
0.001
10k
100k
1M
10M
Frequency (Hz)
Figure 67.
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TYPICAL CHARACTERISTICS: VS = ±6V Differential, 50% Bias
At TA = +25°C, RF = 511Ω, RL = 100Ω Differential, GDIFF = +4V/V, and GCM = +1V/V, unless otherwise specified.
SMALL-SIGNAL FREQUENCY RESPONSE
3
LARGE-SIGNAL FREQUENCY RESPONSE
3
GDIFF = +1V/V
0
Normalized Gain (dB)
Normalized Gain (dB)
0
-3
GDIFF =
+2V/V
-6
GDIFF = +4V/V
-9
-12
GCM = +1V/V
VO = 500mVPP
RL = 100W Differential
-15
-18
-3
VO = 4VPP
-6
VO = 16VPP
-9
VO = 8VPP
-12
GDIF = +4V/V
GCM = +1V/V
RL = 100W Differential
-15
GDIFF = +8V/V
-18
10M
100M
1G
0
100
300
400
Frequency (MHz)
Figure 68.
Figure 69.
SMALL-SIGNAL AND
LARGE-SIGNAL PULSE RESPONSES
5
1
0.2
0
0
Small-Signal ±0.5VP
Right Scale
-2
-0.2
-0.4
-3
-0.6
-4
-0.8
-5
Output Voltage (V)
0.4
Harmonic Distortion (dBc)
0.6
2
-1
-45
0.8
Large-Signal ±4VP
Left Scale
3
500
600
HARMONIC DISTORTION vs FREQUENCY
1.0
4
Output Voltage (V)
200
Frequency (Hz)
-55
-65
GDIFF = +4V/V
GCM = +1V/V
RL = 100W Differential
VO = 2VPP
2nd Harmonic
-75
-85
-95
3rd Harmonic
-105
100k
-1.0
Time (10ns/div)
1M
10M
100M
Frequency (Hz)
Figure 70.
Figure 71.
HARMONIC DISTORTION vs OUTPUT VOLTAGE
-60
GDIFF = +4V/V, RL = 100W Differential
GCM = +1V/V, f = 10MHz
-65
Harmonic Distortion (dBc)
-65
Harmonic Distortion (dBc)
HARMONIC DISTORTION vs LOAD RESISTANCE
-60
-70
3rd Harmonic
-75
-80
-85
-90
2nd Harmonic
-95
-70
-75
GDIFF = +4V/V
GCM = +1V/V
VO = 2VPP
f = 10MHz
-80
-85
-90
2nd Harmonic
-95
-100
-105
-110
-100
0
2
4
6
8
10
10
100
1k
Resistance (W)
Output Voltage (VPP)
Figure 72.
20
3rd Harmonic
Figure 73.
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TYPICAL CHARACTERISTICS: VS = ±6V Differential, 50% Bias (continued)
At TA = +25°C, RF = 511Ω, RL = 100Ω Differential, GDIFF = +4V/V, and GCM = +1V/V, unless otherwise specified.
HARMONIC DISTORTION vs NONINVERTING GAIN
-60
RL = 100W Differential
3rd Harmonic
-70
-75
-80
-85
-90
2nd Harmonic
-95
-100
1
GCM = +1V/V
VO = 2VPP
f = 10MHz
10
3rd Harmonic
Harmonic Distortion (dBc)
-65
Harmonic Distortion (dBc)
HARMONIC DISTORTION vs SUPPLY VOLTAGE
-65
-70
-75
-80
-85
GDIFF = +4V/V
GCM +1V/V
RL = 100W Differential
f = 10MHz
VO = 2VPP
-90
2nd Harmonic
-95
2.5
3.0
3.5
4.0
4.5
Gain (V/V)
Supply Voltage (±VS)
Figure 74.
Figure 75.
5.0
5.5
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21
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APPLICATION INFORMATION
WIDEBAND VIDEO MULTIPLEXING
WIDEBAND CURRENT-FEEDBACK
OPERATION
The OPA2673 gives the exceptional ac performance
of a wideband current-feedback op amp with a highly
linear, high-power output stage. Requiring 16mA/ch
quiescent current, the OPA2673 swings to within 1.1V
of either supply rail and delivers in excess of 460mA
at room temperature. This low output headroom
requirement, along with supply voltage independent
biasing, gives remarkable dual (±6V) supply
operation. The OPA2673 delivers greater than
450MHz bandwidth driving a 2VPP output into 100Ω
on a single +12V supply. Previous boosted output
stage amplifiers typically suffer from very poor
crossover distortion as the output current goes
through zero. The OPA2673 achieves a comparable
power gain with much better linearity. The primary
advantage of a current-feedback op amp over a
voltage-feedback op amp is that ac performance
(bandwidth and distortion) is relatively independent of
signal gain. Figure 76 shows the dc-coupled, gain of
+4V/V, dual power-supply circuit configuration used
as the basis of the ±6V Electrical Characteristics and
Typical Characteristics. For test purposes, the input
impedance is set to 50Ω with a resistor to ground and
the output impedance is set to 50Ω with a series
output resistor. Voltage swings reported in the
Electrical Characteristics are taken directly at the
input and output pins, while load powers (dBm) are
defined at a matched 50Ω load. For the circuit of
Figure 76, the total effective load is 100Ω || 402Ω =
80Ω.
+6V
+VS
0.1mF
6.8mF
+
50W Source
VI
50W
VO
1/2
OPA2673
50W
50W Load
RF
402W
RG
133W
+
6.8mF
0.1mF
-VS
-6V
Figure 76. DC-Coupled, G = +4V/V, Bipolar
Supply, Specification and Test Circuit
22
One common application for video speed amplifiers
that include a disable pin is to wire multiple amplifier
outputs together, then select one of several possible
video inputs to source onto a single line. This simple
wired-OR video multiplexer can be easily
implemented using the OPA2673, as Figure 77
illustrates.
+5V
2kW
VDIS
+5V
Power-supply
decoupling not shown.
Video 1
1/2
OPA2673
DIS
75W
82.5W
402W
-5V
475W
75W Cable
402W
RG-59
475W
+5V
82.5W
1/2
OPA2673
Video 2
DIS
75W
-5V
2kW
Figure 77. Two-Channel Video Multiplexer
Typically, channel switching is performed either on
sync or retrace time in the video signal. The two
inputs are approximately equal at this time. The
make-before-break disable characteristic of the
OPA2673 ensures that there is always one amplifier
controlling the line when using a wired-OR circuit
similar to that shown in Figure 77. Because both
inputs may be on for a short period during the
transition between channels, the outputs are
combined through the output impedance matching
resistors (82.5Ω in this case). When one channel is
disabled, its feedback network forms part of the
output impedance and slightly attenuates the signal in
getting out onto the cable. The gain and output
matching resistors have been slightly increased to get
a signal gain of +1V/V at the matched load and
provide a 75Ω output impedance to the cable. The
video multiplexer connection (as shown in Figure 77)
also ensures that the maximum differential voltage
across the inputs of the unselected channel do not
exceed the rated ±1.2V maximum for standard video
signal levels. The active-off line circuitry integrated
within the OPA2673 ensures that the off-channel will
stay off independently of the signal amplitude present
at the output.
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Where two outputs are switched (see Figure 77), the
output line is always under the control of one
amplifier or the other as a result of the
make-before-break disable timing. In this case, the
switching glitches for two 0V inputs drop to less than
20mV.
HIGH-SPEED ACTIVE FILTERS
Wideband current-feedback op amps make ideal
elements for implementing high-speed active filters
where the amplifier is used as a fixed gain block
inside a passive RC circuit network. The relatively
constant bandwidth versus gain provides low
interaction between the actual filter poles and the
required gain for the amplifier. Figure 78 shows an
example single-supply buffered filter application. In
this case, one of the OPA2673 channels is used to
set up the dc operating point and provide impedance
isolation from the signal source into the second-stage
filter. That stage is set up to implement a 20MHz,
maximally flat Butterworth frequency response and
provide an ac gain of +4V/V.
The 51Ω input matching resistor is optional in this
case. The input signal is ac-coupled to the 5V dc
reference voltage developed through the resistor
divider from the +10V power supply. This first stage
acts as a gain of +1V/V voltage buffer for the signal
where the 600Ω feedback resistor is required for
stability. This first stage easily drives the low input
resistors required at the input of this high-frequency
filter. The second stage is set for a dc gain of +1V/V,
carrying the 5V operating point through to the output
pin, and an ac gain of +4V/V. The feedback resistor
has been adjusted to optimize bandwidth for the
amplifier itself. As the single-supply frequency
response plots show, the OPA2673 in this
configuration gives greater than 400MHz small-signal
bandwidth. The capacitor values were chosen as low
as possible but adequate to override the parasitic
input capacitance of the amplifier. The resistor values
were slightly adjusted to give the desired filter
frequency response while accounting for the
approximate 1ns propagation delay through each
channel of the OPA2673.
HIGH-POWER TWISTED-PAIR DRIVER
A very demanding application for a high-speed
amplifier is to drive a low load impedance while
maintaining a high output voltage swing to high
frequencies. Using the dual current-feedback op amp
OPA2673, an 8VPP output signal swing into a
twisted-pair line with a typical impedance of 50Ω can
be realized. Configured as shown on the front page,
the two amplifiers of the OPA2673 drive the output
transformer in a push-pull configuration, thus doubling
the peak-to-peak signal swing at each op amp output
to 8VPP. The transformer has a turns ratio of 1.4. The
total load seen by the amplifier is 35Ω.
Line driver applications usually have a high demand
for transmitting the signal with low distortion.
Current-feedback amplifiers such as the OPA2673
are ideal for delivering low-distortion performance to
higher gains. The example shown is set for a
differential gain of 4V/V. This circuit can deliver the
maximum 8VPP signal with over 200MHz bandwidth.
+10V
20MHz, SECOND-ORDER BUTTERWORTH
LOW-PASS FREQUENCY RESPONSE
Power-supply
decoupling not shown.
0.1mF
12
5kW
8
100pF
51W
5kW
1/2
OPA2673
32.3W
Gain (dB)
VI
105W
150pF
1/2
OPA2673
4
0
4VI
-4
40W
600W
133W
20MHz, Second-Order Butterworth
Low-Pass Filter
-8
-12
0.1
1
10
100
Frequency (MHz)
0.1mF
Figure 78. Buffered Single-Supply Active Filter
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LINE DRIVER HEADROOM MODEL
±IP
The first step in a driver design is to compute the
peak-to-peak output voltage from the target
specifications. This calculation is done using the
following equations:
VRMS2
PL = 10 ´ log
(1mW) ´ RL
(1)
RM
1:n
2VLPP
n
VLPP
n
RL
VLPP
RM
±IP
With PL power and VRMS voltage at the load, and RL
load impedance, this calculation gives:
VRMS =
(1mW) ´ RL ´ 10
PL
10
(2)
VP = CrestFactor ´ VRMS = CF ´ VRMS
(3)
With VP peak voltage at the load and the crest factor,
CF:
VLPP = 2 ´ CF ´ VRMS
(4)
with VLPP: peak-to-peak voltage at the load.
Consolidating Equation 1 through Equation 4 allows
the required peak-to-peak voltage at the load function
of the crest factor, the load impedance, and the
power in the load to be expressed. Thus:
VLPP = 2 ´ CF ´
(1mW) ´ RL ´ 10
With the required output voltage and current versus
turns ratio set, an output stage headroom model
allows the required supply voltage versus turns ratio
to be developed.
The headroom model (see Figure 80) can be
described with the following set of equations:
First, as available output voltage for each amplifier:
VOPP = VCC - (V1 + V2) - IP ´ (R1 + R2)
(8)
Or, second, as required single-supply voltage:
VCC = VOPP + (V1 + V2) + IP ´ (R1 + R2)
(9)
The minimum supply voltage for a set of power and
load requirements is given by Equation 9.
PL
10
Figure 79. Driver Peak Output Model
(5)
This VLPP is usually computed for a nominal line
impedance and may be taken as a fixed design
target.
Table 1 gives V1, V2, R1, and R2 for +12V operation
of the OPA2673.
+VCC
The next step for the driver is to compute the
individual amplifier output voltage and currents as a
function of VPP on the line and transformer turns ratio.
As the turns ratio changes, the minimum allowed
supply voltage also changes. The peak current in the
amplifier is given by:
2 ´ VLPP
1
1
±IP =
´
´
n
2
4RM
R1
V1
VO
(6)
IP
With VLPP defined in Equation 5 and RM defined in
Equation 7.
2
RM = LINE
2n2
(7)
The peak current is computed in Figure 79 by noting
that the total load is 4RM and that the peak current is
half of the peak-to-peak calculated using VLPP.
V2
R2
Figure 80. Line Driver Headroom Model
Table 1. Line Driver Headroom Model Values
+12V
24
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V1
R1
V2
R2
0.9V
2Ω
0.9V
2Ω
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TOTAL DRIVER POWER FOR LINE DRIVER
APPLICATIONS
The total internal power dissipation for the OPA2673
in a line driver application is the sum of the quiescent
power and the output stage power. The OPA2673
holds a relatively constant quiescent current versus
supply voltage—giving a power contribution that is
simply the quiescent current times the supply voltage
used (the supply voltage is greater than the solution
given in Equation 9). The total output stage power
may be computed with reference to Figure 81.
+VCC
IAVG =
DESIGN-IN TOOLS
Demonstration Fixtures
Two printed circuit boards (PCBs) are available to
assist in the initial evaluation of circuit performance
using the OPA2673 in its two package options. Both
of these are offered free of charge as unpopulated
PCBs, delivered with a user’s guide. The summary
information for these fixtures is shown in Table 2.
Table 2. Demonstration Fixtures by Package
PRODUCT
IP
CF
PACKAGE
ORDERING
NUMBER
LITERATURE
NUMBER
OPA2673IRGV
QFN-16
DEM-OPA-QFN-2A
SBOU067
OPA2673IDGQ
MSOP-10
DEM-OPA-MSOP-2A
SBOU068
These demonstration fixtures can be requested
through the Texas Instruments web site (www.ti.com).
RT
Macromodels and Applications Support
Figure 81. Output Stage Power Model
The two output stages used to drive the load of
Figure 79 can be seen as an H-Bridge in Figure 81.
The average current drawn from the supply into this
H-Bridge and load is the peak current in the load
given by Equation 6 divided by the crest factor (CF).
This total power from the supply is then reduced by
the power in RT to leave the power dissipated internal
to the drivers in the four output stage transistors. That
power is simply the target line power used in
Equation 7 plus the power lost in the matching
elements (RM). In the examples here, a perfect match
is targeted giving the same power in the matching
elements as in the load. The output stage power is
then set by Equation 10.
IP
POUT =
´ VCC - 2PL
CF
(10)
The total amplifier power is then:
IP
PTOT = IQ ´ VCC +
´ VCC - 2PL
CF
space
space
(11)
Computer simulation of circuit performance using
SPICE is often useful when analyzing the
performance of analog circuits and systems. This
technique is particularly true for video and RF
amplifier circuits where parasitic capacitance and
inductance can have a major effect on circuit
performance. A SPICE model for the OPA2673 is
available through the TI web site (www.ti.com). This
model does a good job of predicting small-signal ac
and transient performance under a wide variety of
operating conditions, but does not do as well in
predicting the harmonic distortion or dG/dΦ
characteristics. This model does not attempt to
distinguish between the package types in small-signal
ac performance, nor does it attempt to simulate
channel-to-channel coupling.
OPERATING SUGGESTIONS
Setting Resistor Values to Optimize Bandwidth
A current-feedback op amp such as the OPA2673
can hold an almost constant bandwidth over signal
gain settings with the proper adjustment of the
external resistor values, which are shown in the
Typical Characteristics; the small-signal bandwidth
decreases only slightly with increasing gain. These
characteristic curves also show that the feedback
resistor is changed for each gain setting. The resistor
values on the inverting side of the circuit for a
current-feedback op amp can be treated as frequency
response compensation elements, whereas the ratios
set the signal gain.
space
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Figure 82 shows the small-signal frequency response
analysis circuit for the OPA2673.
Developing the transfer function for the circuit of
Figure 82 gives Equation 13:
VO
VI
VI
a
a 1+
=
R F + RI 1 +
VO
Z(S) IERR
IERR
RF
RG
Figure 82. Current-Feedback Transfer Function
Analysis Circuit
The key elements of this current-feedback op amp
model are:
α = buffer gain from the noninverting input to the
inverting input
RI = buffer output impedance
IERR = feedback error current signal
Z(s)
=
frequency-dependent
open-loop
transimpedance gain from IERR to VO
RF
NG = Noise Gain = 1 +
RG
(12)
The buffer gain is typically very close to 1.00V/V and
is normally neglected from signal gain considerations.
This gain, however, sets the CMRR for a single op
amp differential amplifier configuration. For a buffer
gain of α < 1.0, the CMRR = –20 × log(1 – α)dB.
RI, the buffer output impedance, is a critical portion of
the bandwidth control equation. The OPA2673
inverting output impedance is typically 32Ω.
A current-feedback op amp senses an error current in
the inverting node (as opposed to a differential input
error voltage for a voltage-feedback op amp) and
passes this on to the output through an internal
frequency-dependent transimpedance gain. The
Typical Characteristics show this open-loop
transimpedance response, which is analogous to the
open-loop voltage gain curve for a voltage-feedback
op amp.
26
a ´ NG
=
1+
RI
RF
RG
Z(s)
RF
RG
1+
RF + RI ´ NG
Z(s)
(13)
This formula is written in a loop-gain analysis format,
where the errors arising from a non-infinite open-loop
gain are shown in the denominator. If Z(s) is infinite
over all frequencies, the denominator of Equation 13
reduces to 1 and the ideal desired signal gain shown
in the numerator is achieved. The fraction in the
denominator of Equation 13 determines the frequency
response. Equation 14 shows this as the loop-gain
equation:
Z(s)
= LoopGain
RF + RI ´ NG
(14)
If 20log(RF + NG × RI) is drawn on top of the
open-loop transimpedance plot, the difference
between the two would be the loop gain at a given
frequency. Eventually, Z(s) rolls off to equal the
denominator of Equation 14, at which point the loop
gain has reduced to 1 (and the curves have
intersected). This point of equality is where the
amplifier closed-loop frequency response given by
Equation 12 starts to roll off, and is exactly analogous
to the frequency at which the noise gain equals the
open-loop voltage gain for a voltage-feedback op
amp. The difference here is that the total impedance
in the denominator of Equation 14 may be controlled
somewhat separately from the desired signal gain (or
NG). The OPA2673 is internally compensated to give
a maximally flat frequency response for RF = 402Ω at
NG = 4V/V on ±6V supplies. Evaluating the
denominator of Equation 14 (which is the feedback
transimpedance) gives an optimal target of 530Ω. As
the signal gain changes, the contribution of the NG ×
RI term in the feedback transimpedance changes, but
the total can be held constant by adjusting RF.
Equation 15 gives an approximate equation for
optimum RF over signal gain:
RF = 530 - NG ´ RI
(15)
As the desired signal gain increases, this equation
eventually suggests a negative RF. A somewhat
subjective limit to this adjustment can also be set by
holding RG to a minimum value of 20Ω. Lower values
load both the buffer stage at the input and the output
stage if RF gets too low—actually decreasing the
bandwidth. Figure 83 shows the recommended RF
versus NG for ±6V operation. The values for RF
versus gain shown here are approximately equal to
the values used to generate the Typical
Characteristics. They differ in that the optimized
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values used in the Typical Characteristics are also
correcting for board parasitic not considered in the
simplified analysis leading to Equation 15. The values
shown in Figure 83 give a good starting point for
designs where bandwidth optimization is desired.
Feedback Resistor (W)
600
500
400
300
200
0
5
10
15
20
Noise Gain
Figure 83. Feedback Resistor vs Noise Gain
The total impedance going into the inverting input
may be used to adjust the closed-loop signal
bandwidth. Inserting a series resistor between the
inverting input and the summing junction increases
the feedback impedance (the denominator of
Equation 14), decreasing the bandwidth. The internal
buffer output impedance for the OPA2673 is slightly
influenced by the source impedance coming from of
the noninverting input terminal. High-source resistors
also have the effect of increasing RI, decreasing the
bandwidth. For those single-supply applications that
develop a midpoint bias at the noninverting input
through high valued resistors, the decoupling
capacitor is essential for power-supply ripple
rejection, noninverting input noise current shunting,
and to minimize the high-frequency value for RI in
Figure 82.
Output Current and Voltage
The OPA2673 provides output voltage and current
capabilities that are unsurpassed in a low-cost dual
monolithic op amp. Under no-load conditions at
+25°C, the output voltage typically swings closer than
1.1V to either supply rail; the tested (+25°C) swing
limit is within 1.2V of either rail. Into a 4Ω load (the
minimum tested load), it delivers more than ±460mA.
The specifications described previously, though
familiar in the industry, consider voltage and current
limits separately. In many applications, it is the
voltage times current (or V-I product) that is more
relevant to circuit operation. Refer to the Output
Voltage and Current Limitations plot in the Typical
Characteristics (Figure 6). The X- and Y-axes of this
graph show the zero-voltage output current limit and
the zero-current output voltage limit, respectively. The
four quadrants give a more detailed view of the
OPA2673 output drive capabilities, noting that the
graph is bounded by a safe operating area of 2W
maximum internal power dissipation (in this case, for
one channel only). Superimposing resistor load lines
onto the plot shows that the OPA2673 can drive ±4V
into 10Ω or ±45V into 25Ω without exceeding the
output capabilities or the 2W dissipation limit. A 100Ω
load line (the standard test circuit load) shows the full
±4.8V output swing capability, as stated in the
Electrical Characteristics table. The minimum
specified output voltage and current over temperature
are set by worst-case simulations at the cold
temperature extreme. Only at cold startup do the
output current and voltage decrease to the numbers
shown in the Electrical Characteristics table. As the
output transistors deliver power, the junction
temperatures increase, decreasing the VBEs
(increasing the available output voltage swing), and
increasing the current gains (increasing the available
output current). In steady-state operation, the
available output voltage and current is always greater
than
that
shown
in
the
over-temperature
specifications because the output stage junction
temperatures is higher than the minimum specified
operating ambient.
Driving Capacitive Loads
One of the most demanding and yet very common
load conditions for an op amp is capacitive loading.
Often, the capacitive load is the input of an
analog-to-digital
converter
(ADC)—including
additional external capacitance that may be
recommended to improve the ADC linearity. A
high-speed, high open-loop gain amplifier such as the
OPA2673 can be very susceptible to decreased
stability and closed-loop response peaking when a
capacitive load is placed directly on the output pin.
When the amplifier open-loop output resistance is
considered, this capacitive load introduces an
additional pole in the signal path that can decrease
the phase margin. Several external solutions to this
problem have been suggested.
When the primary considerations are frequency
response flatness, pulse response fidelity, and/or
distortion, the simplest and most effective solution is
to isolate the capacitive load from the feedback loop
by inserting a series isolation resistor between the
amplifier output and the capacitive load. This
approach does not eliminate the pole from the loop
response, but rather shifts it and adds a zero at a
higher frequency. The additional zero acts to cancel
the phase lag from the capacitive load pole, thus
increasing the phase margin and improving stability.
The Typical Characteristics show the Differential RS
vs Capacitive Load (Figure 27) and the resulting
frequency response at the load. Parasitic capacitive
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loads greater than 2pF can begin to degrade the
performance of the OPA2673. Long PCB traces,
unmatched cables, and connections to multiple
devices can easily cause this value to be exceeded.
Always consider this effect carefully, and add the
recommended series resistor as close as possible to
the OPA2673 output pin (see the Board Layout
Guidelines section).
Distortion Performance
The OPA2673 provides good distortion performance
into a 100Ω load on ±6V supplies. Generally, until the
fundamental signal reaches very high frequency or
power levels, the second harmonic dominates the
distortion with a negligible third harmonic component.
Focusing then on the second harmonic, increasing
the load impedance improves distortion directly.
Remember that the total load includes the feedback
network—in the noninverting configuration (see
Figure 76), this network is the sum of RF + RG; in the
inverting configuration, it is RF. Also, providing an
additional supply decoupling capacitor (0.01µF)
between the supply pins (for bipolar operation)
improves the second-order distortion slightly (3dB to
6dB).
In most op amps, increasing the output voltage swing
directly increases harmonic distortion. The Typical
Characteristics show the second harmonic increasing
at a little less than the expected 2x rate, whereas the
third harmonic increases at a little less than the
expected 3x rate. Where the test power doubles, the
difference between it and the second harmonic
decreases less than the expected 6dB, while the
difference between it and the third harmonic
decreases by less than the expected 12dB. This
factor also shows up in the two-tone, third-order
intermodulation spurious (IM3) response curves. The
third-order spurious levels are extremely low at
low-output power levels. The output stage continues
to hold them low even as the fundamental power
reaches very high levels. As the Typical
Characteristics show, the spurious intermodulation
powers do not increase as predicted by a traditional
intercept model. As the fundamental power level
increases, the dynamic range does not decrease
significantly. For two tones centered at 40MHz, with
10dBm/tone into a matched 50Ω load (that is, 2VPP
for each tone at the load, which requires 8VPP for the
overall two-tone envelope at the output pin), the
Typical Characteristics show 69dBc difference
between the test-tone power and the third-order
intermodulation spurious levels. This exceptional
performance improves further when operating at
lower frequencies.
28
Noise Performance
Wideband current-feedback op amps generally have
a
higher
output
noise
than
comparable
voltage-feedback op amps. The OPA2673 offers an
excellent balance between voltage and current noise
terms to achieve low output noise. The inverting
current noise (35pA/√Hz) is lower than earlier
solutions, whereas the input voltage noise
(2.4nV/√Hz) is lower than most unity-gain stable,
wideband voltage-feedback op amps. This low input
voltage noise is achieved at the price of higher
noninverting input current noise (5.2pA/√Hz). As long
as the ac source impedance from the noninverting
node is less than 100Ω, this current noise does not
contribute significantly to the total output noise. The
op amp input voltage noise and the two input current
noise terms combine to give low output noise under a
wide variety of operating conditions. Figure 84 shows
the op amp noise analysis model with all noise terms
included. In this model, all noise terms are taken to
be noise voltage or current density terms in either
nV/√Hz or pA/√Hz.
The total output spot noise voltage can be computed
as the square root of the sum of all squared output
noise voltage contributors. Equation 16 shows the
general form for the output noise voltage using the
terms given in Figure 84.
2
EO =
2
2
ENI + (IBNRS) + 4kTRS + (IBIRF) + 4kTRFNG
(16)
ENI
1/2
OPA2673
RS
EO
IBN
ERS
RF
Ö4kTRS
4kT
RG
RG
IBI
Ö4kTRF
4kT = 1.6E -20J
at 290°K
Figure 84. Op Amp Noise Analysis Model
Dividing this expression by the noise gain [NG = (1 +
RF/RG)] gives the equivalent input-referred spot noise
voltage at the noninverting input, as shown in
Equation 17.
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EN =
2
2
ENI + (IBNRS) + 4kTRS +
IBIRF
NG
2
+
4kTRF
NG
(17)
Evaluating these two equations for the OPA2673
circuit and component values of Figure 76 gives a
total output spot noise voltage of 18nV/√Hz and a
total equivalent input spot noise voltage of 4.5nV/√Hz.
This total input-referred spot noise voltage is higher
than the 2.4nV/√Hz specification for the op amp
voltage noise alone. This result reflects the noise
added to the output by the inverting current noise
times the feedback resistor. If the feedback resistor is
reduced in high-gain configurations (as suggested
previously), the total input-referred voltage noise
given by Equation 17 approaches only the 2.4nV/√Hz
of the op amp. For example, going to a gain of +8V/V
using RF = 250Ω gives a total input-referred noise of
2.8nV/√Hz.
Differential Noise Performance
Because the OPA2673 is used as a differential driver
in PLC applications, it is important to analyze the
noise in such a configuration. See Figure 85 for the
op amp noise model for the differential configuration.
As a reminder, the differential gain is expressed as:
2 ´ RF
GD = 1 +
RG
(18)
The output noise voltage can be expressed as shown
below:
EO2 =
2
2
2
2 ´ GD2 ´ EN + (IN ´ RS) + 4kTRS + 2(IIRF) + 2(4kTRFGD)
(19)
Dividing this expression by the differential noise gain,
GD = (1 + 2RF/RG), gives the equivalent input-referred
spot noise voltage at the noninverting input, as shown
in Equation 20.
EN =
2
2
2 ´ EN + (IN ´ RS) + 4kTRS + 2 II
RF
GD
2
+2
4kTRF
GD
(20)
Evaluating this equation for the OPA2673 circuit and
component values shown on the front page gives a
total output spot noise voltage of 72.3nV/√Hz and a
total equivalent input spot noise voltage of
18.4nV/√Hz.
In order to minimize the noise contributed by IN, it is
recommended to keep the noninverting source
impedance as low as possible.
IN
DC Accuracy and Offset Control
Driver
EN
RS
II
ERS
RF
Ö4kTRF
Ö4kTRS
RG
EO2
Ö4kTRG
RF
Ö4kTRF
IN
EN
RS
II
ERS
Ö4kTRS
A current-feedback op amp such as the OPA2673
provides exceptional bandwidth in high gains, giving
fast pulse settling but only moderate dc accuracy.
The Electrical Characteristics show an input offset
voltage comparable to high-speed, voltage-feedback
amplifiers; however, the two input bias currents are
somewhat higher and are unmatched. While bias
current cancellation techniques are very effective with
most voltage-feedback op amps, they do not
generally reduce the output dc offset for wideband
current-feedback op amps. Because the two input
bias currents are unrelated in both magnitude and
polarity, matching the input source impedance to
reduce error contribution to the output is ineffective.
Evaluating the configuration of Figure 76, using a
worst-case +25°C input offset voltage and the two
input bias currents, gives a worst-case output offset
range equal to:
VOS = ±(NG ´ VIO(MAX)) ± (IBN ´ RS/2 ´ NG) ± (IBI ´ RF)
where NG = noninverting signal gain
= ±(4 ´ 7mV) + (25mA ´ 25W ´ 4) ± (402W ´ 48mA)
= ±28mV ± 2.5mV ± 19.3mV
VOS = ±49.8mV (max at +25°C)
(21)
Figure 85. Differential Op Amp Noise Analysis
Model
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Power Control Operation
The OPA2673 provides a power control feature that
may be used to reduce system power. The four
modes of operation for this power control feature are
100% bias, 75% bias, 50% bias, and power
shutdown. These four operating modes are set
through two logic lines A0 and A1. Table 3 shows the
different modes of operation.
Table 3. Operating Modes
MODE OF
OPERATION
A1
A0
100% bias
0
0
75% bias
0
1
50% bias
1
0
Shutdown
1
1
The 100% bias mode is used for normal operating
conditions. The 75% bias mode brings the quiescent
power to 24mA. The 50% bias mode brings the
quiescent power to 16mA. The shutdown mode has a
high output impedance as well as the lowest
quiescent power (5.5mA).
If the A0 and A1 pins are left unconnected, the
OPA2673 operates normally (100% bias).
To change the power mode, the control pins (either
A0 or A1) must be asserted low. This logic control is
referenced to the ground supply, as shown in the
simplified circuit of Figure 86.
+VS
A0 or A1
1.4V
GND
Figure 86. Supply Power Control Circuit
space
30
THERMAL ANALYSIS
As a result of the high output power capability of the
OPA2673, heat-sinking or forced airflow may be
required under extreme operating conditions. The
maximum desired junction temperature sets the
maximum allowed internal power dissipation,
described below. In no case should the maximum
junction temperature be allowed to exceed +150°C.
Operating junction temperature (TJ) is given by TA +
PD × θJA. The total internal power dissipation (PD) is
the sum of quiescent power (PDQ) and additional
power dissipation in the output stage (PDL) to deliver
load power. Quiescent power is the specified no-load
supply current times the total supply voltage across
the part. PDL depends on the required output signal
and load; for a grounded resistive load, however, PDL
is at a maximum when the output is fixed at a voltage
equal to 1/2 of either supply voltage (for equal bipolar
supplies). Under this condition, PDL = VS2/(4 × RL),
where RL includes feedback network loading.
Note that it is the power in the output stage and not
into the load that determines internal power
dissipation.
As a worst-case example, compute the maximum TJ
using an OPA2673 QFN-16 in the circuit of Figure 76
operating at the maximum specified ambient
temperature of +85°C with both outputs driving a
grounded 20Ω load to +2.5V.
Control
space
The shutdown feature for the OPA2673 is a
ground-supply
referenced,
current-controlled
interface. For voltage output logic interfaces, the
on/off voltage levels described in the Electrical
Characteristics apply only for either the ground pin
RGV package or the –VS pin used for the
single-supply specifications.
PD = 12V × 32mA + 2 × [52/(4 × [20Ω 535Ω])] =
1.03W
Maximum TJ = +85°C + (1.03 × 45°C/W) = 131°C
Although this value is still well below the specified
maximum junction temperature, system, reliability
considerations may require lower tested junction
temperatures.The highest possible internal dissipation
occurs if the load requires current to be forced into
the output for positive output voltages, or sourced
from the output for negative output voltages. This
condition puts a high current through a large internal
drop in the output transistors. The output V-I plot in
the Typical Characteristics (Figure 6) includes a
boundary for 2W maximum internal power dissipation
under these conditions.
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www.ti.com..................................................................................................................................................... SBOS382A – JUNE 2008 – REVISED OCTOBER 2008
BOARD LAYOUT GUIDELINES
Achieving
optimum
performance
with
a
high-frequency amplifier such as the OPA2673
requires careful attention to board layout parasitic and
external component types. Recommendations that
optimize performance include:
a) Minimize parasitic capacitance to any ac ground
for all of the signal I/O pins. Parasitic capacitance on
the output and inverting input pins can cause
instability; on the noninverting input, it can react with
the source impedance to cause unintentional band
limiting. To reduce unwanted capacitance, a window
around the signal I/O pins should be opened in all of
the ground and power planes around those pins.
Otherwise, ground and power planes should be
unbroken elsewhere on the board.
b) Minimize the distance (< 0.25in, or 6,350mm)
from the power-supply pins to high-frequency 0.1µF
decoupling capacitors. At the device pins, the ground
and power-plane layout should not be in close
proximity to the signal I/O pins. Avoid narrow power
and ground traces to minimize inductance between
the pins and the decoupling capacitors. The
power-supply connections (on pins 7 and 14 for a
QFN package) should always be decoupled with
these capacitors. An optional supply decoupling
capacitor across the two power supplies (for bipolar
operation) improves second-harmonic distortion
performance. Larger (2.2µF to 6.8µF) decoupling
capacitors, effective at a lower frequency, should also
be used on the main supply pins. These can be
placed somewhat farther from the device and may be
shared among several devices in the same area of
the PCB.
c) Careful selection and placement of external
components
preserve
the
high-frequency
performance of the OPA2673. Resistors should be
of a very low reactance type. Surface-mount resistors
work best and allow a tighter overall layout. Metal film
and carbon composition axially-leaded resistors can
also provide good high-frequency performance.
Again, keep the leads and PCB trace length as short
as possible. Never use wire-wound type resistors in a
high-frequency application. Although the output pin
and inverting input pin are the most sensitive to
parasitic capacitance, always position the feedback
and series output resistor, if any, as close as possible
to the output pin. Other network components, such as
noninverting input termination resistors, should also
be placed close to the package. Where double-side
component mounting is allowed, place the feedback
resistor directly under the package on the other side
of the board between the output and inverting input
pins. The frequency response is primarily determined
by the feedback resistor value as described
previously. Increasing the value reduces the
bandwidth, whereas decreasing it gives a more
peaked frequency response. The 402Ω feedback
resistor used in the Typical Characteristics at a gain
of +4V/V on ±6V supplies is a good starting point for
design. Note that a 511Ω feedback resistor, rather
than a direct short, is recommended for the unity-gain
follower application. A current-feedback op amp
requires a feedback resistor even in the unity-gain
follower configuration to control stability.
d) Connections to other wideband devices on the
board may be made with short direct traces or
through onboard transmission lines. For short
connections, consider the trace and the input to the
next device as a lumped capacitive load. Relatively
wide traces (50mils to 100mils, or 1,27mm to
2,54mm) should be used, preferably with ground and
power planes opened up around them. Estimate the
total capacitive load and set RS from the plot of
Differential RS vs Capacitive Load (Figure 27). Low
parasitic capacitive loads (< 5pF) may not need an
RS because the OPA2673 is nominally compensated
to operate with a 2pF parasitic load. If a long trace is
required, and the 6dB signal loss intrinsic to a
doubly-terminated transmission line is acceptable,
implement a matched impedance transmission line
using microstrip or stripline techniques (consult an
ECL design handbook for microstrip and stripline
layout techniques). A 50Ω environment is normally
not necessary onboard. In fact, a higher impedance
environment improves distortion; see the distortion
versus load plots. With a characteristic board trace
impedance defined based on board material and
trace dimensions, a matching series resistor into the
trace from the output of the OPA2673 is used, as well
as a terminating shunt resistor at the input of the
destination device. Remember also that the
terminating impedance is the parallel combination of
the shunt resistor and the input impedance of the
destination device.
This total effective impedance should be set to match
the trace impedance. The high output voltage and
current capability of the OPA2673 allows multiple
destination devices to be handled as separate
transmission lines, each with respective series and
shunt terminations. If the 6dB attenuation of a
doubly-terminated transmission line is unacceptable,
a long trace can be series-terminated at the source
end only. Treat the trace as a capacitive load in this
case, and set the series resistor value as shown in
the plot of Differential RS vs Capacitive Load
(Figure 27). However, this approach does not
preserve
signal
integrity
as
well
as
a
doubly-terminated line. If the input impedance of the
destination device is low, there is some signal
attenuation because of the voltage divider formed by
the series output into the terminating impedance.
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e) Socketing a high-speed part such as the
OPA2673 is not recommended. The additional lead
length and pin-to-pin capacitance introduced by the
socket can create an extremely troublesome parasitic
network, which can make it almost impossible to
achieve a smooth, stable frequency response. Best
results are obtained by soldering the OPA2673
directly onto the board.
INPUT AND ESD PROTECTION
The OPA2673 is built using a high-speed
complementary bipolar process. The internal junction
breakdown voltages are relatively low for these very
small geometry devices and are reflected in the
Absolute Maximum Ratings table. All device pins
have limited ESD protection using internal diodes to
the power supplies, as shown in Figure 87.
These diodes provide moderate protection to input
overdrive voltages above the supplies as well. The
protection diodes can typically support 30mA
continuous current. Where higher currents are
possible (for example, in systems with ±15V supply
parts driving into the OPA2673), current-limiting
series resistors should be added into the two inputs.
Keep these resistor values as low as possible,
because high values degrade both noise performance
and frequency response.
+VCC
External
Pin
Internal
Circuitry
-VCC
Figure 87. ESD Steering Diodes
empty for space
empty for space
empty for space
empty for space
Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (June, 2008) to Revision A ........................................................................................................ Page
•
•
32
Corrected y-axis units specified for Open-Loop Transimpedance Gain and Phase characteristic graph (Figure 15) .......... 8
Changed equation references in paragraph discussing transfer equation and loop-gain analysis format.......................... 26
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PACKAGE OPTION ADDENDUM
www.ti.com
1-Sep-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
OPA2673IDGQ
PREVIEW
MSOPPower
PAD
DGQ
10
OPA2673IDGQR
PREVIEW
MSOPPower
PAD
DGQ
10
2500
OPA2673IRGVR
ACTIVE
QFN
RGV
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
OPA2673IRGVRG4
ACTIVE
QFN
RGV
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
OPA2673IRGVT
ACTIVE
QFN
RGV
16
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
OPA2673IRGVTG4
ACTIVE
QFN
RGV
16
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
Lead/Ball Finish
MSL Peak Temp (3)
TBD
Call TI
Call TI
TBD
Call TI
Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Aug-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
OPA2673IRGVR
QFN
RGV
16
2500
330.0
12.4
4.3
4.3
1.5
8.0
12.0
Q2
OPA2673IRGVT
QFN
RGV
16
250
180.0
12.4
4.3
4.3
1.5
8.0
12.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Aug-2008
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
OPA2673IRGVR
QFN
RGV
16
2500
346.0
346.0
29.0
OPA2673IRGVT
QFN
RGV
16
250
190.5
212.7
31.8
Pack Materials-Page 2
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