TI VCA821_12

VCA821
VC
A8
21
VC
A821
www.ti.com ....................................................................................................................................... SBOS407B – DECEMBER 2007 – REVISED DECEMBER 2008
Ultra-Wideband, > 40dB Gain Adjust Range, Linear in dB
VARIABLE GAIN AMPLIFIER
FEATURES
1
DESCRIPTION
• 710MHz SMALL-SIGNAL BANDWIDTH
(G = +2V/V)
• 320MHz, 4VPP BANDWIDTH (G = +10V/V)
• 0.1dB GAIN FLATNESS to 135MHz
• 2500V/µs SLEW RATE
• > 40dB GAIN ADJUST RANGE
• HIGH GAIN ACCURACY: 20dB ±0.3dB
• HIGH OUTPUT CURRENT: ±90mA
23
The VCA821 is a dc-coupled, wideband, linear in dB,
continuously
variable,
voltage-controlled
gain
amplifier. It provides a differential input to
single-ended conversion with a high-impedance gain
control input used to vary the gain down 40dB from
the nominal maximum gain set by the gain resistor
(RG) and feedback resistor (RF).
APPLICATIONS
•
•
•
•
•
AGC RECEIVERS with RSSI
DIFFERENTIAL LINE RECEIVERS
PULSE AMPLITUDE COMPENSATION
VARIABLE ATTENUATORS
VOLTAGE-TUNABLE ACTIVE FILTERS
VIN1
RF
+VIN
RG+
RS
R1
RL
FB
RG
VOUT
VCA821
C1
CL
RG-
VIN2
-VIN
20W
The VCA821 internal architecture consists of two
input buffers and an output current feedback amplifier
stage integrated with a multiplier core to provide a
complete variable gain amplifier (VGA) system that
does not require external buffering. The maximum
gain is set externally with two resistors, providing
flexibility in designs. The maximum gain is intended
to be set between 6dB and 32dB. Operating from ±5V
supplies, the gain control voltage for the VCA821
adjusts the gain linearly in dB as the control voltage
varies from 0V to +2V. For example, set at a
maximum gain of 20dB, the VCA821 provides 20dB,
at VG = +2V, to less than –20dB at VG = 0V. The
VCA821 offers excellent gain linearity. For a 20dB
maximum gain, and a gain-control input voltage
varying between +1V and +2V, the gain does not
deviate by more than ±0.3dB (maximum at +25°C).
RS
VCA821 RELATED PRODUCTS
DUALS
GAIN
ADJUST
RANGE
(dB)
VCA810
—
80
2.4
35
6
—
VCA2612
45
1.25
80
3
—
VCA2613
45
1
80
—
VCA2615
52
0.8
50
-6
—
VCA2617
48
4.1
50
-9
VCA820
—
40
8.2
150
-15
VCA821
—
40
6.0
420
-18
VCA822
—
40
8.2
150
VCA824
—
40
6.0
420
Differential Equalizer
SINGLES
INPUT
NOISE
(nV/√Hz)
SIGNAL
BANDWIDTH
(MHz)
9
Equalized Frequency Response
Gain (dB)
0
Initial Frequency Response
of the VCA821 with RC Load
-3
-12
-21
-24
1M
10M
100M
1G
Frequency (Hz)
Differential Equalization of an RC Load
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
X2Y is a trademark of X2Y Attenuators LLC.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007–2008, Texas Instruments Incorporated
VCA821
SBOS407B – DECEMBER 2007 – REVISED DECEMBER 2008 ....................................................................................................................................... www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION (1)
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING
PRODUCT
PACKAGE-LEAD
PACKAGE
DESIGNATOR
VCA821
SO-14
D
–40°C to +85°C
VCA821ID
VCA821
MSOP-10
DGS
–40°C to +85°C
BOR
(1)
ORDERING
NUMBER
TRANSPORT
MEDIA, QUANTITY
VCA821ID
Rail, 50
VCA821IDR
Tape and Reel, 2500
VCA821IDGST
Tape and Reel, 250
VCA821IDGSR
Tape and Reel, 2500
For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
VCA821
UNIT
±6.5
V
Power Supply
Internal Power Dissipation
See Thermal Characteristics
Input Voltage Range
Storage Temperature Range
±VS
V
–65 to +125
°C
Lead Temperature (soldering, 10s)
+260
°C
Junction Temperature (TJ)
+150
°C
Junction Temperature (TJ), Maximum Continuous Operation
+140
C
2000
V
ESD Rating: Charge Device Model (CDM)
Human Body Model (HBM)
1000
V
Machine Model
200
V
PIN CONFIGURATIONS
D PACKAGE
SO-14
(TOP VIEW)
DGS PACKAGE
MSOP-10
(TOP VIEW)
+VCC
1
14 +VCC
VG
2
+VIN
FB
1
10 GND
13 NC
+VCC
2
9
VOUT
3
12 FB
VG
3
8
-VCC
+RG
4
11 GND
+VIN
4
7
-VIN
-RG
5
10 VOUT
+RG
5
6
-RG
-VIN
6
9
VREF
-VCC
7
8
-VCC
NC = No Connection
2
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Product Folder Link(s): VCA821
VCA821
www.ti.com ....................................................................................................................................... SBOS407B – DECEMBER 2007 – REVISED DECEMBER 2008
ELECTRICAL CHARACTERISTICS: VS = ±5V
At AVMAX = 20dB, RF = 402Ω, RG = 80Ω, RL = 100Ω, unless otherwise noted.
VCA821
MIN/MAX OVER
TEMPERATURE
TYP
PARAMETER
CONDITIONS
+25°C
+25°C (2)
0°C to
70°C (3)
–40°C to
+85°C (3)
UNITS
MIN/
MAX
TEST
LEVEL (1)
AC PERFORMANCE
Small-Signal Bandwidth
G = 6dB, VO = 500mVPP
710
MHz
typ
C
G = 20dB, VO = 500mVPP
420
MHz
typ
C
G = 40dB, VO = 500mVPP
170
MHz
typ
C
Large-Signal Bandwidth
G = 20dB, VO = 4VPP
320
MHz
typ
C
Gain Control Bandwidth
VO = 200mVPP
330
MHz
min
B
Bandwidth for 0.1dB Flatness
G = 20dB, VO = 200mVPP
135
MHz
typ
C
Slew Rate
G = 20dB, VO = 5V Step
2500
1800
1700
1700
V/µs
min
B
Rise-and-Fall Time
G = 20dB, VO = 5V Step
1.5
1.8
1.9
1.9
ns
max
B
Settling Time to 0.01%
G = 20dB, VO = 5V Step
11
ns
typ
C
2nd Harmonic
VO = 2VPP, f = 20MHz
–66
–64
–64
–64
dBc
min
B
3rd Harmonic
VO = 2VPP, f = 20MHz
–63
–61
–61
–61
dBc
min
B
Input Voltage Noise
f > 100kHz
6.0
nV/√Hz
typ
C
Input Current Noise
f > 100kHz
2.6
pA/√Hz
typ
C
dB
max
A
V
typ
C
240
235
235
Harmonic Distortion
GAIN CONTROL
Absolute Gain Error
GMAX = 20dB, VG = 2V
Vctrl0
±0.1
±0.4
±0.5
±0.6
0.85
VSlope
0.09
Absolute Gain Error
Gain at VG = 0.2V
V
typ
C
±0.6
dB
max
A
–24
–23
dB
max
A
16.6
16.7
µA
max
A
±12
nA/°C
max
B
MΩ || pF
typ
C
GMAX = 20dB, VG = 1V, (G = 18.06
dB)
±0.3
±0.4
relative to max gain
–26
–24
10
16
±12
Gain Control Bias Current
Average Gain Control Bias Current Drift
Gain Control Input Impedance
±0.5
1.5 || 0.6
DC PERFORMANCE
Input Offset Voltage
Average Input Offset Voltage Drift
Input Bias Current
Average Input Bias Current Drift
Input Offset Current
Average Input Offset Current Drift
G = 20dB, VCM = 0V, VG = 1V
±4
±17
G = 20dB, VCM = 0V, VG = 1V
G = 20dB, VCM = 0V, VG = 1V
19
25
G = 20dB, VCM = 0V, VG = 1V
G = 20dB, VCM = 0V, VG = 1V
±0.5
±2.5
G = 20dB, VCM = 0V, VG = 1V
Max Current Through Gain Resistance
±17.8
±19
mV
max
A
30
30
µV/°C
max
B
29
31
µA
max
A
90
90
nA/°C
max
B
±3.2
±3.5
µA
max
A
±16
±16
nA/°C
max
B
max
B
±2.6
±2.55
±2.55
±2.5
mA
INPUT
Most Positive Common Mode Input Voltage
RL = 100Ω
+1.6
+1.6
+1.6
+1.6
V
min
A
Most Negative Common Mode Input Voltage
RL = 100Ω
–2.1
-2.1
–2.1
–2.1
V
max
A
VCM = ±0.5V
80
65
60
60
dB
min
A
0.9 || 0.6
MΩ || pF
typ
C
1 || 2
MΩ || pF
typ
C
Common-Mode Rejection Ratio
Input Impedance
Differential
Common-Mode
(1)
(2)
(3)
Test levels: (A) 100% tested at +25°C. Over temperature limits set by characterization and simulation. (B) Limits set by characterization
and simulation. (C) Typical value only for information.
Junction temperature = ambient for +25°C tested specifications.
Junction temperature = ambient at low temperature limit; junction temperature = ambient +23°C at high temperature limit for over
temperature specifications.
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3
VCA821
SBOS407B – DECEMBER 2007 – REVISED DECEMBER 2008 ....................................................................................................................................... www.ti.com
ELECTRICAL CHARACTERISTICS: VS = ±5V (continued)
At AVMAX = 20dB, RF = 402Ω, RG = 80Ω, RL = 100Ω, unless otherwise noted.
VCA821
MIN/MAX OVER
TEMPERATURE
TYP
PARAMETER
CONDITIONS
+25°C
+25°C (2)
0°C to
70°C (3)
–40°C to
+85°C (3)
UNITS
MIN/
MAX
TEST
LEVEL (1)
OUTPUT
Output Voltage Swing
RL = 1kΩ
±3.9
±3.6
±3.4
±3.3
V
min
A
RL = 100Ω
±3.6
±3.5
±3.3
±3.2
V
min
A
VO = 0V, RL = 10Ω
±90
±60
±50
±45
mA
min
A
G = +10V/V, f > 100kHz
0.01
Ω
typ
C
Specified Operating Voltage
±5
V
typ
C
Minimum Operating Voltage
±3.5
V
typ
C
Output Current
Output Impedance
POWER SUPPLY
Maximum Operating Voltage
±6
±6
±6
V
max
A
Maximum Quiescent Current
VG = 1V
34
35
35.5
36
mA
max
A
Minimum Quiescent Current
VG = 1V
34
32.5
32
31.5
mA
max
A
–68
–61
–59
–58
dB
min
A
–40 to +85
°C
typ
C
Power-Supply Rejection Ratio (–PSRR)
THERMAL CHARACTERISTICS
Specified Operating Range D Package
Thermal Resistance θJA
Junction-to-Ambient
DGS
MSOP-10
130
°C/W
typ
C
D
SO-14
80
°C/W
typ
C
4
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Product Folder Link(s): VCA821
VCA821
www.ti.com ....................................................................................................................................... SBOS407B – DECEMBER 2007 – REVISED DECEMBER 2008
TYPICAL CHARACTERISTICS: VS = ±5V, DC Parameters
At TA = +25°C, RL = 100Ω, VG = +2V, and VIN = single-ended input on +VIN with –VIN at ground, unless otherwise noted.
MAXIMUM DIFFERENTIAL INPUT VOLTAGE vs RG
MAXIMUM GAIN ADJUST RANGE vs RF
40
IRG MAX = 2.6mA
VIN MAX(VPP) = 2 ´ RG ´ IRG MAX (AP)
Maximum Gain Adjust Range (dB)
Differential Input Voltage (VPP)
10
1
30
25
VO = 1VPP
20
VO = 2VPP
15
VO = 4VPP
10
VO = 3VPP
5
0
0.1
10
100
1k
100
1k
10k
Gain Resistor (W)
Feedback Resistor (W)
Figure 1.
Figure 2.
MAXIMUM GAIN ADJUST RANGE vs
PEAK-TO-PEAK OUTPUT VOLTAGE
GAIN ERROR BAND vs
GAIN CONTROL VOLTAGE
12
60
Absolute
Error
IRG = 2.6mA
AVMAX(V/V) = 2 ´ [RF/VIN(VPP)] ´ 2 ´ IRG (AP)
50
10
RF = 3kW
Absolute
Error
8
40
RF = 4kW
Gain (V/V)
Maximum Gain Adjust Range (dB)
IRG = 2.6mA
AVMAX(V/V) = 2 ´ [RF/VIN(VPP)] ´ 2 ´ IRG (AP)
35
RF = 5kW
30
RF = 500W
6
Relative Error to
Maximum Gain
4
20
RF = 1kW
2
10
RF = 1.5kW
RF = 2kW
0
0
0.1
1
10
0
0.2
0.4
0.6
0.8
1.0
1.2
Output Voltage (VPP)
Control Voltage (V)
Figure 3.
Figure 4.
GAIN ERROR BAND vs
GAIN CONTROL VOLTAGE
1.4
1.6
1.8
2.0
RECOMMENDED RF vs AVMAX
40
460
For > 40dB Gain Adjust Range
20
Feedback Resistor (W)
450
Gain (dB)
0
-20
Equation
A(V/V) = K ´
-40
RF
´
RG
1
( VV
G0
1+e
- VG
)
SLOPE
-60
Data
VCTRL0 = 0.85V
VSLOPE = 90mV
-80
440
430
420
410
400
NOTE: -3dB bandwidth varies with package type.
See the Applications Information section for more details.
390
-100
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
1
10
Control Voltage (V)
AVMAX (V/V)
Figure 5.
Figure 6.
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100
5
VCA821
SBOS407B – DECEMBER 2007 – REVISED DECEMBER 2008 ....................................................................................................................................... www.ti.com
TYPICAL CHARACTERISTICS: VS = ±5V, DC and Power-Supply Parameters
At TA = +25°C, RL = 100Ω, VG = +2V, and VIN = single-ended input on +VIN with –VIN at ground, unless otherwise noted.
SUPPLY CURRENT vs CONTROL VOLTAGE
(AVMAX = 6dB)
SUPPLY CURRENT vs CONTROL VOLTAGE
(AVMAX = 20dB)
36
36
+IQ
+IQ
35
-IQ
-IQ
Quiescent Current (mA)
Quiescent Current (mA)
35
34
33
32
31
34
33
32
31
30
30
29
29
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0
0.8
1.0
1.2
1.4
Figure 7.
Figure 8.
1.6
Input Offset Voltage (mV)
+IQ
34
33
32
31
1.0
1.2
1.4
1.6
1.8
2.0
5
0
-3.0
-4.5
0.8
Input Offset Voltage (VOS)
Left Scale
-2.5
-4.0
0.6
10
-2.0
-3.5
20
15
-1.5
29
0.4
25
Input Bias Current (IB)
Right Scale
-1.0
30
0.2
30
-0.5
35
0
2.0
-5
Right Scale
10 x Input Offset Current (IOS)
-50
Gain Control Voltage (V)
-25
0
25
-10
50
75
100
Input Bias and Offset Current (mA)
-IQ
36
1.8
TYPICAL DC DRIFT vs TEMPERATURE
0
37
Quiescent Current (mA)
0.6
0.4
Gain Control Voltage (V)
SUPPLY CURRENT vs CONTROL VOLTAGE
(AVMAX = 32dB)
-15
125
Temperature (°C)
Figure 9.
6
0.2
Gain Control Voltage (V)
Figure 10.
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TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = 6dB
At TA = +25°C, RL = 100Ω, RF = 453Ω, RG = 453Ω, VG = +2V, VIN = single-ended input on +VIN with –VIN at ground, and
SO-14 package, unless otherwise noted.
SMALL-SIGNAL FREQUENCY RESPONSE
LARGE-SIGNAL FREQUENCY RESPONSE
3
3
VO = 1VPP
VG = +1V
0
0
Normalized Gain (dB)
Normalized Gain (dB)
VO = 2VPP
-3
VG = +2V
-6
-9
-12
-3
-6
-12
VO = 5VPP
AVMAX = 6dB
VIN = 1VPP
RL = 100W
-15
-18
1M
VO = 4VPP
-9
-15
-18
10M
100M
1G
2G
1M
Figure 11.
Figure 12.
SMALL-SIGNAL PULSE RESPONSE
1G
2G
LARGE-SIGNAL PULSE RESPONSE
4.0
200
3.0
100
0
-100
VIN = 2VPP
f = 20MHz
2.0
Output Voltage (V)
Output Voltage (mV)
100M
Frequency (Hz)
300
-200
10M
Frequency (Hz)
1.0
0
-1.0
-2.0
VIN = 250mVPP
f = 20MHz
-300
-3.0
Time (10ns/div)
Time (10ns/div)
Figure 13.
Figure 14.
COMPOSITE VIDEO dG/dP
GAIN FLATNESS, DEVIATION FROM LINEAR PHASE
0
0
-0.3
-0.015
-0.4
-0.020
-dP, VG = 0V
-0.5
-0.025
-0.6
-0.030
-dP, VG = +1V
-0.7
-0.8
-0.040
-0.045
-0.9
2
3
0.1
0.10
0
0.05
0
-0.1
Right Scale
-0.2
-0.05
-0.3
-0.10
-0.035
-dG, VG = +1V
1
Magnitude (dB)
-0.010
Differential Phase (°)
Differential Gain (%)
-0.005
-dG, VG = 0V
-0.2
0.15
Left Scale
4
-0.4
-0.15
AVMAX = 6dB
VG = +2V
-0.5
Deviation from Linear Phase (°)
-0.1
0.2
-0.20
0
50
100
150
200
Frequency (MHz)
Number of Video Loads
Figure 15.
Figure 16.
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VCA821
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TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = 6dB (continued)
At TA = +25°C, RL = 100Ω, RF = 453Ω, RG = 453Ω, VG = +2V, VIN = single-ended input on +VIN with –VIN at ground, and
SO-14 package, unless otherwise noted.
HARMONIC DISTORTION vs
LOAD RESISTANCE
-60
-60
-65
-65
-70
3rd Harmonic
-75
-80
AVMAX = 6dB
VG = +2V
VO = 2VPP
RL = 100W
2nd Harmonic
-85
Harmonic Distortion (dBc)
Harmonic Distortion (dBc)
HARMONIC DISTORTION vs
FREQUENCY
-90
-70
2nd Harmonic
-75
-80
3rd Harmonic
-85
-90
0.1
1
10
100
100
1k
Frequency (MHz)
Resistance (W)
Figure 17.
Figure 18.
HARMONIC DISTORTION vs
OUTPUT VOLTAGE
HARMONIC DISTORTION vs
GAIN CONTROL VOLTAGE
-10
AVMAX = 6dB
VG = +2V
RL = 100W
f = 20MHz
-35
-40
-45
-50
-55
-60
-65
2nd Harmonic
-70
-75
AVMAX = 6dB
VO = 2VPP
RL = 100W
f = 20MHz
-20
Maximum Current
Through RG Limited
Harmonic Distortion (dBc)
-30
Harmonic Distortion (dBc)
AVMAX = 6dB
VG = +2V
VO = 2VPP
f = 20MHz
3rd Harmonic
-30
-40
Maximum Current Through RG Limited
-50
-60
2nd Harmonic
-70
3rd Harmonic
-80
-80
-90
-85
0.1
1
0.8
10
1.0
1.2
1.4
1.6
1.8
2.0
Output Voltage Swing (VPP)
Gain Control Voltage (V)
Figure 19.
Figure 20.
TWO-TONE, 3RD-ORDER
INTERMODULATION INTERCEPT
TWO-TONE, 3RD-ORDER INTERMODULATION INTERCEPT
vs
GAIN CONTROL VOLTAGE
38
40
36
35
Intercept Point (+dBm)
Intercept Point (+dBm)
Constant Input Voltage
34
32
30
28
30
Constant Output Voltage
25
20
15
26
At 50W Matched Load
10
24
0
8
10
20
30
40
50
60
70
80
90
100
f = 20MHz
At 50W Matched Load
0.8
1.0
1.2
1.4
1.6
Frequency (MHz)
Gain Control Voltage (V)
Figure 21.
Figure 22.
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1.8
2.0
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Product Folder Link(s): VCA821
VCA821
www.ti.com ....................................................................................................................................... SBOS407B – DECEMBER 2007 – REVISED DECEMBER 2008
TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = 6dB (continued)
At TA = +25°C, RL = 100Ω, RF = 453Ω, RG = 453Ω, VG = +2V, VIN = single-ended input on +VIN with –VIN at ground, and
SO-14 package, unless otherwise noted.
GAIN vs GAIN CONTROL VOLTAGE
GAIN CONTROL FREQUENCY RESPONSE
2.2
3
2.0
1.8
0
Normalized Gain (dB)
1.6
Gain (V/V)
1.4
1.2
1.0
0.8
0.6
0.4
-3
-6
-9
0.2
VG = 1VDC + 10mVPP
VIN =0.5VDC
0
-12
-0.2
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
10M
1M
2.0
Frequency (Hz)
Figure 23.
Figure 24.
GAIN CONTROL PULSE RESPONSE
1G
FULLY-ATTENUATED RESPONSE
20
4
2
1
2.5
0
2.0
-1
1.5
1.0
10
VG = +2V
0
Normalized Gain (dB)
3
Output Voltage (V)
VIN = 1VDC
Input Voltage (V)
100M
Gain Control Voltage (V)
-10
-30
-40
-50
-60
0.5
-70
0
-80
-0.5
VO = 2VPP
-20
Input Referred
VG = 0V
-90
10M
1M
Time (10ns/div)
100M
1G
Frequency (Hz)
Figure 25.
Figure 26.
GROUP DELAY vs GAIN CONTROL VOLTAGE
GROUP DELAY vs FREQUENCY
2.0
1.6
1.8
1.4
10MHz
1.6
Group Delay (ns)
Group Delay (ns)
1.2
1.4
1.2
1.0
1MHz
0.8
20MHz
0.6
1.0
0.8
0.6
0.4
0.4
VG = +2V
VO = 1VPP
0.2
0.2
0
0
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0
20
40
60
Gain Control Voltage (V)
Frequency (MHz)
Figure 27.
Figure 28.
80
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TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = 6dB (continued)
At TA = +25°C, RL = 100Ω, RF = 453Ω, RG = 453Ω, VG = +2V, VIN = single-ended input on +VIN with –VIN at ground, and
SO-14 package, unless otherwise noted.
RECOMMENDED RS vs CAPACITIVE LOAD
FREQUENCY RESPONSE vs CAPACITIVE LOAD
9
100
VO = 0.5VPP
CL = 10pF
6
CL = 22pF
CL = 100pF
RS (W)
RS (W)
3
10
CL = 47pF
0
RF
-3
VIN
+
RS
VCA821
NOTE: (1) 1kW is optional.
-9
1
10
100
1
1k
10
100
Capacitive Load (pF)
Capacitive Load (pF)
Figure 29.
Figure 30.
OUTPUT VOLTAGE NOISE DENSITY
1k
INPUT CURRENT NOISE DENSITY
200
10
Input Voltage Noise Density (pA/ÖHz)
Output Voltage Noise Density (nV/ÖHz)
1kW(1)
-
0.1dB Flatness Targeted
1
VG = +1V
100
VG = +2V
VG = 0V
10
1
100
10
VOUT
CL
-6
1k
10k
100k
1M
10M
100
1k
10k
100k
Frequency (Hz)
Frequency (Hz)
Figure 31.
Figure 32.
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10M
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TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = 20dB
At TA = +25°C, RL = 100Ω, RF = 402Ω, RG = 80Ω, VG = +2V, and VIN = single-ended input on +VIN with –VIN at ground, unless
otherwise noted.
SMALL-SIGNAL FREQUENCY RESPONSE
LARGE-SIGNAL FREQUENCY RESPONSE
3
3
0
0
Normalized Gain (dB)
Normalized Gain (dB)
VG = +1V
-3
-6
VG = +2V
-9
-12
AVMAX = 20dB
VIN = 200mVPP
RL = 100W
-15
-18
1M
VO = 1VPP
-3
VO = 2VPP
-6
-9
VO = 4VPP
-12
VO = 5VPP
-15
-18
10M
100M
1G
1M
Figure 33.
Figure 34.
200
2
100
0
-100
1
0
-1
-2
VIN = 50mVPP
VIN = 400mVPP
f = 20MHz
f = 20MHz
-3
-300
Time (10ns/div)
Time (10ns/div)
Figure 35.
Figure 36.
Left Scale
-0.1
0.10
-0.2
0.05
0
-0.3
Right Scale
-0.05
-0.4
-0.10
AVMAX = 20dB
VG = +2V
0
50
-0.15
100
150
200
Deviation from Linear Phase (°)
0.15
0
Magnitude (dB)
OUTPUT VOLTAGE NOISE DENSITY
0.20
Output Voltage Noise Density (nV/ÖHz)
GAIN FLATNESS, DEVIATION FROM LINEAR PHASE
0.1
-0.6
1G
LARGE-SIGNAL PULSE RESPONSE
3
Output Voltage (V)
Output Voltage (mV)
SMALL-SIGNAL PULSE RESPONSE
-0.5
100M
Frequency (Hz)
300
-200
10M
Frequency (Hz)
200
VG = +2V
100
VG = 0V
VG = +1V
10
100
Frequency (MHz)
1k
10k
100k
1M
10M
Frequency (Hz)
Figure 37.
Figure 38.
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TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = 20dB (continued)
At TA = +25°C, RL = 100Ω, RF = 402Ω, RG = 80Ω, VG = +2V, and VIN = single-ended input on +VIN with –VIN at ground, unless
otherwise noted.
HARMONIC DISTORTION vs
LOAD RESISTANCE
-50
-66
-55
-68
Harmonic Distortion (dBc)
Harmonic Distortion (dBc)
HARMONIC DISTORTION vs
FREQUENCY
-60
3rd Harmonic
-65
-70
-75
AVMAX = 20dB
VG = +2V
VO = 2VPP
RL = 100W
2nd Harmonic
-80
-72
3rd Harmonic
-74
-76
-78
2nd Harmonic
-85
-80
0.1
1
10
-40
100
1k
Resistance (W)
Figure 39.
Figure 40.
HARMONIC DISTORTION vs
OUTPUT VOLTAGE
HARMONIC DISTORTION vs
GAIN CONTROL VOLTAGE
-10
AVMAX = +10V/V
VG = +2V
RL = 100W
f = 20MHz
-30
100
Frequency (MHz)
AVMAX = 20dB
VO = 2VPP
RL = 100W
f = 20MHz
-20
Maximum Current
Through RG Limited
Harmonic Distortion (dBc)
-20
Harmonic Distortion (dBc)
-70
AVMAX = 20dB
VG = +2V
VO = 1VPP
f = 20MHz
-50
-60
2nd Harmonic
-70
3rd Harmonic
-80
-30
-40
Maximum Current through
RG Limited.
-50
-60
2nd Harmonic
-70
3rd Harmonic
-80
-90
-90
0.1
1
0.6
10
0.8
1.0
1.2
1.4
1.6
1.8
2.0
Output Voltage Swing (VPP)
Gain Control Voltage (V)
Figure 41.
Figure 42.
TWO-TONE, 3RD-ORDER
INTERMODULATION INTERCEPT
TWO-TONE, 3RD-ORDER INTERMODULATION INTERCEPT
vs
GAIN CONTROL VOLTAGE
37
40
35
35
Intercept Point (+dBm)
Intercept Point (+dBm)
Constant Input Voltage
33
31
29
30
25
Constant Output Voltage
20
VG = +2V
At 50W Matched Load
15
27
0
12
10
20
30
40
50
60
70
80
90
100
f = 20MHz
At 50W Matched Load
0.8
1.0
1.2
1.4
1.6
Frequency (MHz)
Gain Control Voltage (V)
Figure 43.
Figure 44.
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TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = 20dB (continued)
At TA = +25°C, RL = 100Ω, RF = 402Ω, RG = 80Ω, VG = +2V, and VIN = single-ended input on +VIN with –VIN at ground, unless
otherwise noted.
GAIN vs GAIN CONTROL VOLTAGE
GAIN CONTROL FREQUENCY RESPONSE
11
3
10
9
0
Normalized Gain (dB)
8
Gain (V/V)
7
6
5
4
3
2
-3
-6
-9
1
-12
0
-15
-1
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
10M
1M
2.0
100M
Gain Control Voltage (V)
Frequency (Hz)
Figure 45.
Figure 46.
GAIN CONTROL PULSE RESPONSE
2
1
2.5
0
2.0
-1
4
3
Output Voltage (V)
3
Output Voltage (V)
VIN = 0.2VDC
1G
OUTPUT VOLTAGE AND CURRENT LIMITATIONS
5
4
Input Voltage (V)
VG = 1VDC + 10mVPP
VIN = 0.1VDC
1.5
1.0
1W Internal
Power
Dissipation
100W
Load
2
1
50W
Load
0
25W
Load
-1
-2
0.5
-3
0
-4
-5
-150
-0.5
Time (10ns/div)
1W Internal
Power
Dissipation
-100
-50
0
50
100
150
Output Current (mA)
Figure 47.
Figure 48.
FULLY-ATTENUATED RESPONSE
IRG LIMITED OVERDRIVE RECOVERY
0.4
30
20
Input Voltage (V)
0
-10
VO = 2VPP
-20
-30
-40
-50
-60
Input Referred
-70
VG = 0V
-80
0.2
1.0
0.1
0.5
0
-0.1
0
Output Voltage
Right Scale
1M
10M
100M
-0.5
-0.2
-1.0
-0.3
-1.5
-0.4
-90
1.5
1G
Output Voltage (V)
Normalized Gain (dB)
0.3
VG = +2V
10
2.0
AVMAX = +10V/V
VG = 0.7V
Input Voltage
Left Scale
-2.0
Time (40ns/div)
Frequency (Hz)
Figure 49.
Figure 50.
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TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = 20dB (continued)
At TA = +25°C, RL = 100Ω, RF = 402Ω, RG = 80Ω, VG = +2V, and VIN = single-ended input on +VIN with –VIN at ground, unless
otherwise noted.
OUTPUT LIMITED OVERDRIVE RECOVERY
Output Voltage
Right Scale
2
0
0
-0.4
-2
Input Voltage
Left Scale
10MHz
4
0.2
-0.2
1.65
1.60
Output Voltage (V)
Input Voltage (V)
0.4
GROUP DELAY vs GAIN CONTROL VOLTAGE
6
AVMAX = +10V/V
VG = +2V
1.55
1MHz
1.50
20MHz
1.45
-4
-0.6
Group Delay (ns)
0.6
-6
1.40
Time (40ns/div)
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
Gain Control Voltage (V)
Figure 51.
Figure 52.
GROUP DELAY vs FREQUENCY
1.8
1.6
Group Delay (ns)
1.4
1.2
1.0
0.8
0.6
0.4
VG = +2V
VO = 1VPP
0.2
0
0
20
40
60
80
100
Frequency (MHz)
Figure 53.
14
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TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = 32dB
At TA = +25°C, RL = 100Ω, RF = 402Ω, RG = 18Ω, VG = +2V, VIN = single-ended input on +VIN with –VIN at ground, and SO-14
package, unless otherwise noted.
LARGE-SIGNAL FREQUENCY RESPONSE
3
0
0
Normalized Gain (dB)
Normalized Gain (dB)
SMALL-SIGNAL FREQUENCY RESPONSE
3
-3
VG = +1V
-6
VG = +2V
-9
-12
AVMAX = 32dB
VIN = 50mVPP
RL = 100W
-15
VO = 1VPP, 2VPP, 4VPP, 5VPP
-3
-6
-9
-12
-15
-18
-18
1M
10M
100M
1G
0
100
200
300
Frequency (Hz)
Frequency (MHz)
Figure 54.
Figure 55.
SMALL-SIGNAL PULSE RESPONSE
400
500
LARGE-SIGNAL PULSE RESPONSE
400
2.5
2.0
300
1.5
Output Voltage (V)
Output Voltage (V)
200
100
0
-100
-200
1.0
0.5
0
-0.5
-1.0
-1.5
VIN = 12.5mVPP
-2.0
f = 20MHz
-300
VIN = 100mVPP
f = 20MHz
-2.5
Time (10ns/div)
Time (10ns/div)
Figure 56.
Figure 57.
0.10
0.05
0
0
-0.1
-0.2
-0.05
-0.3
-0.10
-0.4
-0.15
-0.20
-0.5
0
20
40
60
200
Deviation from Linear Phase (°)
AVMAX = 32dB
VG = +2V
0.1
Magnitude (dB)
OUTPUT VOLTAGE NOISE DENSITY
0.15
Output Voltage Noise Density (nV/ÖHz)
GAIN FLATNESS, DEVIATION FROM LINEAR PHASE
0.2
1000
VG = +2V
VG = +1V
100
VG = 0V
10
100
Frequency (MHz)
1k
10k
100k
1M
10M
Frequency (Hz)
Figure 58.
Figure 59.
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TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = 32dB (continued)
At TA = +25°C, RL = 100Ω, RF = 402Ω, RG = 18Ω, VG = +2V, VIN = single-ended input on +VIN with –VIN at ground, and SO-14
package, unless otherwise noted.
HARMONIC DISTORTION vs
FREQUENCY
-35
-50
AVMAX = 32dB
VG = +2V
VO = 2VPP
RL = 100W
-45
-55
Harmonic Distortion (dBc)
-40
Harmonic Distortion (dBc)
HARMONIC DISTORTION vs
LOAD RESISTANCE
-50
-55
-60
2nd Harmonic
-65
-60
3rd Harmonic
-65
-70
-75
-80
3rd Harmonic
-70
-85
0.1
-30
100
100
1k
Resistance (W)
Figure 60.
Figure 61.
HARMONIC DISTORTION vs
OUTPUT VOLTAGE
HARMONIC DISTORTION vs
GAIN CONTROL VOLTAGE
-10
AVMAX = 32dB
VO = 2VPP
RL = 100W
f = 20MHz
-15
Maximum Current
Through RG Limited
-40
-50
2nd Harmonic
Frequency (MHz)
AVMAX = 32dB
VG = +2V
RL = 100W
f = 20MHz
-20
Harmonic Distortion (dBc)
10
Harmonic Distortion (dBc)
-10
1
AVMAX = 32dB
VG = +2V
VO = 1VPP
f = 20MHz
2nd Harmonic
-60
3rd Harmonic
-70
-20
-25
-30
Maximum Current Through RG Limited
-35
-40
-45
3rd Harmonic
-50
-55
2nd Harmonic
-60
-80
0.1
1
0.6
10
0.8
1.0
1.2
1.4
1.6
1.8
2.0
Output Voltage Swing (VPP)
Gain Control Voltage (V)
Figure 62.
Figure 63.
TWO-TONE, 3RD-ORDER
INTERMODULATION INTERCEPT
TWO-TONE, 3RD-ORDER INTERMODULATION INTERCEPT
vs
GAIN CONTROL VOLTAGE
35
34
Constant Output Voltage
30
Intercept Point (+dBm)
Intercept Point (+dBm)
32
30
28
26
24
VG = +2V
At 50W Matched Load
22
0
16
10
20
30
Constant Input Voltage
25
20
15
10
40
50
60
70
80
90
100
f = 20MHz
At 50W Matched Load
0.8
1.0
1.2
1.4
1.6
Frequency (MHz)
Gain Control Voltage (V)
Figure 64.
Figure 65.
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TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = 32dB (continued)
At TA = +25°C, RL = 100Ω, RF = 402Ω, RG = 18Ω, VG = +2V, VIN = single-ended input on +VIN with –VIN at ground, and SO-14
package, unless otherwise noted.
GAIN vs GAIN CONTROL VOLTAGE
GAIN CONTROL FREQUENCY RESPONSE
3
45
40
0
Normalized Gain (dB)
35
Gain (V/V)
30
25
20
15
10
-3
-6
-9
-12
5
-15
0
VG = 1VDC + 10mVPP
VIN = 10mVDC
-18
-5
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
10M
1M
Frequency (Hz)
Figure 66.
Figure 67.
GAIN CONTROL PULSE RESPONSE
1G
FULLY ATTENUATED RESPONSE
30
4
2
1
2.5
0
2.0
-1
20
VG = +2V
10
Normalized Gain (dB)
3
Output Voltage (V)
VIN = 50mVDC
Input Voltage (V)
100M
Gain Control Voltage (V)
1.5
1.0
0.5
0
-10
VO = 2VPP
-20
-30
-40
-50
-60
Input Referred
-70
0
VG = 0V
-80
-90
-0.5
10M
1M
Time (10ns/div)
100M
1G
Frequency (Hz)
Figure 68.
Figure 69.
IRG LIMITED OVERDRIVE RECOVERY
0.4
1.2
0.8
0.1
0.4
0
0
-0.1
-0.4
-0.2
-0.8
-0.3
Output Voltage
Right Scale
-0.4
-1.2
-1.6
6
AVMAX = 32dB
VG = +2V
Output Voltage
Right Scale
4
0.1
2
0
0
-0.1
-0.2
-2
Input Voltage
Left Scale
-0.3
Output Voltage (V)
0.2
0.2
Input Voltage (V)
AVMAX = 32dB
VG = 0.7V
Input Voltage
Left Scale
Output Voltage (V)
Input Voltage (V)
0.3
OUTPUT LIMITED OVERDRIVE RECOVERY
0.3
1.6
-4
-6
Time (40ns/div)
Time (40ns/div)
Figure 70.
Figure 71.
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TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = 32dB (continued)
At TA = +25°C, RL = 100Ω, RF = 402Ω, RG = 18Ω, VG = +2V, VIN = single-ended input on +VIN with –VIN at ground, and SO-14
package, unless otherwise noted.
GROUP DELAY vs
GAIN CONTROL VOLTAGE
GROUP DELAY vs FREQUENCY
2.5
2.15
10MHz
2.10
2.0
Group Delay (ns)
Group Delay (ns)
20MHz
2.05
2.00
1MHz
1.95
1.90
1.5
1.0
0.5
VG = +2V
VO = 1VPP
1.85
0
1.80
0
18
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0
20
40
60
Gain Control Voltage (V)
Frequency (MHz)
Figure 72.
Figure 73.
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APPLICATION INFORMATION
WIDEBAND VARIABLE GAIN AMPLIFIER
OPERATION
For test purposes, the input impedance is set to 50Ω
with a resistor to ground and the output impedance is
set to 50Ω with a series output resistor. Voltage
swings reported in the Electrical Characteristics table
are taken directly at the input and output pins, while
output power (dBm) is at the matched 50Ω load. For
the circuit in Figure 74, the total effective load is
100Ω 1kΩ. Note that for the SO-14 package, there
is a voltage reference pin, VREF (pin 9). For the
SO-14 package, this pin must be connected to
ground through a 20Ω resistor in order to avoid
possible oscillations of the output stage. In the
MSOP-10 package, this pin is internally connected
and does not require such precaution. An X2Y™
capacitor has been used for power-supply bypassing.
The combination of low inductance, high resonance
frequency, and integration of three capacitors in one
package (two capacitors to ground and one across
the supplies) enables the VCA821 to achieve the low
second-harmonic distortion reported in the Electrical
Characteristics table. More information on how the
VCA821 operates can be found in the Operating
Suggestions section.
The VCA821 provides an exceptional combination of
high output power capability with a wideband, greater
than 40dB gain adjust range, linear in dB variable
gain amplifier. The VCA821 input stage places the
transconductance element between two input buffers,
using the output currents as the forward signal. As
the differential input voltage rises, a signal current is
generated through the gain element. This current is
then mirrored and gained by a factor of two before
reaching the multiplier. The other input of the
multiplier is the voltage gain control pin, VG.
Depending on the voltage present on VG, up to two
times the gain current is provided to the
transimpedance output stage. The transimpedance
output stage is a current-feedback amplifier providing
high output current capability and high slew rate,
2500V/µs. This exceptional full-power performance
comes at the price of relatively high quiescent current
(34mA), but low input voltage noise for this type of
architecture (6nV/√Hz).
Figure 74 shows the dc-coupled, gain of +10V/V, dual
power-supply circuit used as the basis of the ±5V
Electrical Characteristics and Typical Characteristics.
®
0.1mF
+5V
X2Y Capacitor Detail
X2Yâ
Capacitor
(see detail)
+VS
-5V
A
G1
+
2.2mF
VG
B
-VS
+VIN
VIN
20W
x1
FB
IRG
RG+
RG
200W
G2
+ 2.2mF
RF
1kW
x2
RG-
VOUT
VOUT
x1
20W
-VIN
VREF
SO-14
VCA821
20W
Figure 74. DC-Coupled, AVMAX = 20dB, Bipolar Supply Specification and Test Circuit
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DIFFERENCE AMPLIFIER
Because both inputs of the VCA821 are
high-impedance, a difference amplifier can be
implemented without any major problem. Figure 75
shows this implementation. This circuit provides
excellent common-mode rejection ratio (CMRR) as
long as the input is within the CMRR range of –2.1V
to +1.6V. Note that this circuit does not make use of
the gain control pin, VG. Also, it is recommended to
choose RS such that the pole formed by RS and the
parasitic input capacitance does not limit the
bandwidth of the circuit. Figure 76 shows the
common-mode rejection ratio for this circuit
implemented in a gain of 20dB for VG = +2V. Note
that because the gain control voltage is fixed and is
normally set to +2V, the feedback element can be
reduced in order to increase the bandwidth. When
reducing the feedback element, make sure that the
VCA821 is not limited by common-mode input
voltage, the current flowing through RG, or any other
limitation described in this data sheet.
be used advantageously because its architecture
allows the application to isolate the input from the
gain setting elements. Figure 77 shows an
implementation of such a configuration. The transfer
function is shown in Equation 1.
RF
1 + sRGC1
´
G=2´
RG
1 + sR1C1
(1)
VIN1
R1
RG
20W
RS
Figure 75. Difference Amplifier
85
C1
RGVIN2
-VIN
20W
RS
80
Input Referred
75
70
65
9
Equalized Frequency Response
60
6
55
3
0
50
45
40
10k
100k
1M
10M
100M
Frequency (Hz)
Gain (dB)
Common-Mode Rejection Ratio (dB)
VCA821
This transfer function has one pole, P1 (located at
RGC1), and one zero, Z1 (located at R1C1). When
equalizing an RC load, RL and CL, compensate the
pole added by the load located at RLCL with the zero
Z1. Knowing RL, CL, and RG allows the user to select
C1 as a first step and then calculate R1. Using
RL = 75Ω, CL = 100pF and wanting the VCA821 to
operate at a gain of +2V/V, which gives RF = RG =
453Ω, allows the user to select C1 = 15.5pF to ensure
a positive value for the resistor R1. With all these
values known, to achieve greater than 300MHz
bandwidth, R1 can be calculated to be 20Ω. Figure 78
shows the frequency response for both the initial,
unequalized frequency response and the resulting
equalized frequency response.
FB
VCA821
RG-VIN
VIN-
FB
RG
Figure 77. Differential Equalizer
+VIN
RG+
RS
RG+
RS
RF
VIN+
RF
+VIN
Initial Frequency Response
of the VCA821 with RC Load
-3
-6
-9
-12
-15
Figure 76. Common-Mode Rejection Ratio
-18
-21
-24
1M
DIFFERENTIAL EQUALIZER
100M
1G
Frequency (Hz)
If the application requires frequency shaping (the
transition from one gain to another), the VCA821 can
20
10M
Figure 78. Differential Equalization of an RC Load
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DIFFERENTIAL CABLE EQUALIZER
AGC LOOP
A differential cable equalizer can easily be
implemented using the VCA821. An example of a
cable equalization for 100 feet of Belden cable 1694F
is illustrated in Figure 78, with Figure 79 showing the
result for this implementation. This implementation
has a maximum error of 0.2dB from dc to 70MHz.
In the typical AGC loop shown in Figure 81, the
OPA695 follows the VCA821 to provide 40dB of
overall gain. The output of the OPA695 is rectified
and integrated by an OPA820 to control the gain of
the VCA821. when the output level exceeds the
reference voltage (VREF), the integrator ramps down
reducing the gain of the AGC loop. Conversely, if the
output is too small, the integrator ramps up increasing
the net gain and the output voltage.
Note that this implementation shows the cable
attenuation side-by-side with the equalization in the
same plot. For a given frequency, the equalization
function realized with the VCA821 matches the cable
attenuation. The circuit in Figure 80 is a driver circuit.
To implement a receiver circuit, the signal is received
differentially between the +VIN and –VIN inputs.
1694F Cable Attenuation (dB)
Equalizer Gain (dB)
2.0
1.5
1.0
Cable Attenuation
0.5
VCA821 Equalization
0
-0.5
-1.0
1
10
100
Frequency (MHz)
Figure 79. Cable Attenuation versus Equalizer Gain
VIN
R2
453W
+VIN
R8
50W
RG+
R18
13.6kW
R17
6kW
R21
3kW
R9
432W
VCA821
C7
300mF
RG-
GND
VG
-VIN
C6
320mF
VOUT
FB
VREF
R1
20W
R10
75W
VOUT
75W Load
R5
50W
C5
4pF
VG = +1VDC
C9
10mF
Figure 80. Differential Cable Equalizer
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1kW
VIN
+VIN
RG+ FB
50W
200W
50W
VCA821 Out
RG- VG
-VIN
50W
OPA695
50W
VOUT
950W
100W
50W
0.1mF
1kW
1N4150
OPA820
VREF
Figure 81. AGC Loop
predict typical small-signal ac performance, transient
steps, dc performance, and noise under a wide
variety of operating conditions. The models include
the noise terms found in the electrical specifications
of the relevant product data sheet.
DESIGN-IN TOOLS
DEMONSTRATION BOARDS
Two printed circuit boards (PCBs) are available to
assist in the initial evaluation of circuit performance
using the VCA821 in its two package options. Both of
these are offered free of charge as unpopulated
PCBs, delivered with a user's guide. The summary
information for these fixtures is shown in Table 1.
Table 1. EVM Ordering Information
PRODUCT
PACKAGE
BOARD PART
NUMBER
LITERATURE
REQUEST
NUMBER
VCA821ID
SO-14
DEM-VCA-SO-1B
SBOU050
VCA821IDGS
MSOP-10
DEM-VCA-MSOP-1A
SBOU051
The demonstration fixtures can be requested at the
Texas Instruments web site (www.ti.com) through the
VCA821 product folder.
MACROMODELS AND APPLICATIONS
SUPPORT
Computer simulation of circuit performance using
SPICE is often useful when analyzing the
performance of analog circuits and systems. This
principle is particularly true for video and RF amplifier
circuits where parasitic capacitance and inductance
can play a major role in circuit performance. A SPICE
model for the VCA821 is available through the TI web
page. The applications group is also available for
design assistance. The models available from TI
22
OPERATING SUGGESTIONS
Operating the VCA821 optimally for a specific
application requires trade-offs between bandwidth,
input dynamic range and the maximum input voltage,
the maximum gain of operation and gain, output
dynamic range and the maximum input voltage, the
package used, loading, and layout and bypass
recommendations. The Typical Characteristics have
been defined to cover as much ground as possible to
describe the VCA821 operation. There are four
sections in the Typical Characteristics:
• VS = ±5V DC Parameters and VS = ±5V DC and
Power-Supply Parameters, which include dc
operation and the intrinsic limitation of a VCA821
design
• VS = ±5V, AVMAX = 6dB Gain of 6dB Operation
• VS = ±5V, AVMAX = 20dB Gain of 20dB Operation
• VS = ±5V, AVMAX = 32dB Gain of 32dB Operation
Where the Typical Characteristics describe the actual
performance that can be achieved by using the
amplifier properly, the following sections describe in
detail the trade-offs needed to achieve this level of
performance.
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PACKAGE CONSIDERATIONS
The VCA821 is available in both SO-14 and
MSOP-10 packages. Each package has, for the
different gains used in the typical characteristics,
different values of RF and RG in order to achieve the
same performance detailed in the Electrical
Characteristics table.
Figure 82 shows a test gain circuit for the VCA821.
Table 2 lists the recommended configuration for the
SO-14 and MSOP-10 packages.
There are no differences between the packages in
the recommended values for the gain and feedback
resistors. However, the bandwidth for the
VCA821IDGS (MSOP-10 package) is lower than the
bandwidth for the VCA821ID (SO-14 package). This
difference is true for all gains, but especially true for
gains greater than 5V/V, as can be seen in Figure 83
and Figure 84. Note that the scale must be changed
to a linear scale to view the details.
3
AVMAX = 2V/V
+VIN
VIN
R1
50W
Source
RF
RG+
50W
RG
VOUT
RGR3
R2
50W
Load
Normalized Gain (dB)
0
AVMAX = 5V/V
-3
-6
-9
AVMAX = 10V/V
-12
AVMAX = 20V/V
-15
-VIN
50W
AVMAX = 40V/V
-18
0
200
400
600
800
1000
Frequency (MHz)
VG
Figure 83. SO-14 Recommended RF and RG
versus AVMAX
Figure 82. Test Circuit
Table 2. SO-14 and MSOP-10 RF and RG
Configurations
3
AVMAX = 2V/V
G=2
G = 10
G = 40
RF
453Ω
402Ω
402Ω
RG
453Ω
80Ω
18Ω
Normalized Gain (dB)
0
AVMAX = 5V/V
-3
-6
-9
AVMAX = 10V/V
-12
AVMAX = 20V/V
-15
AVMAX = 40V/V
-18
0
200
400
600
800
1000
Frequency (MHz)
Figure 84. MSOP-10 Recommended RF and RG
versus AVMAX
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MAXIMUM GAIN OF OPERATION
This section describes the use of the VCA821 in a
fixed-gain application in which the VG control pin is
set at VG = +1V. The tradeoffs described here are
with bandwidth, gain, and output voltage range.
In the case of an application that does not make use
of the VGAIN, but requires some other characteristic of
the VCA821, the RG resistor must be set such that
the maximum current flowing through the resistance
IRG is less than ±2.6mA typical, or 5.2mAPP as
defined in the Electrical Characteristics table, and
must follow Equation 2.
VOUT
IRG =
AVMAX ´ RG
(2)
As Equation 2 illustrates, once the output dynamic
range and maximum gain are defined, the gain
resistor is set. This gain setting in turn affects the
bandwidth, because in order to achieve the gain (and
with a set gain element), the feedback element of the
output stage amplifier is set as well. Keeping in mind
that the output amplifier of the VCA821 is a
current-feedback amplifier, the larger the feedback
element, the lower the bandwidth because the
feedback resistor is the compensation element.
Limiting the discussion to the input voltage only and
ignoring the output voltage and gain, Figure 1
illustrates the tradeoff between the input voltage and
the current flowing through the gain resistor.
OUTPUT CURRENT AND VOLTAGE
The VCA821 provides output voltage and current
capabilities that are unsurpassed in a low-cost
monolithic VCA. Under no-load conditions at +25°C,
the output voltage typically swings closer than 1V to
either supply rails; the +25°C swing limit is within
1.2V of either rails. Into a 15Ω load (the minimum
tested load), it is tested to deliver more than ±90mA.
The specifications described above, though familiar in
the industry, consider voltage and current limits
separately. In many applications, it is the voltage ×
current, or V-I product, that is more relevant to circuit
operation. Refer to the Output Voltage and Current
Limitations plot (Figure 48) in the Typical
Characteristics. The X- and Y-axes of this graph
show the zero-voltage output current limit and the
zero-current output voltage limit, respectively. The
four quadrants give a more detailed view of the
VCA821 output drive capabilities, noting that the
graph is bounded by a Safe Operating Area of 1W
maximum internal power dissipation. Superimposing
resistor load lines onto the plot shows that the
24
VCA821 can drive ±2.5V into 25Ω or ±3.5V into 50Ω
without exceeding the output capabilities or the 1W
dissipation limit. A 100Ω load line (the standard test
circuit load) shows the full ±3.9V output swing
capability, as shown in the Typical Characteristics.
The minimum specified output voltage and current
over-temperature are set by worst-case simulations at
the cold temperature extreme. Only at cold startup do
the output current and voltage decrease to the
numbers shown in the Electrical Characteristics
tables. As the output transistors deliver power, the
respective junction temperatures increase, thereby
increasing the available output voltage swing and
output current.
In steady-state operation, the available output voltage
and current are always greater than the temperature
shown in the over-temperature specifications
because the output stage junction temperatures are
higher than the specified operating ambient.
INPUT VOLTAGE DYNAMIC RANGE
The VCA821 has a input dynamic range limited to
+1.6V and –2.1V. Increasing the input voltage
dynamic range can be done by using an attenuator
network on the input. If the VCA821 is trying to
regulate the amplitude at the output, such as in an
AGC application, the input voltage dynamic range is
directly proportional to Equation 3.
VIN(PP) = RG ´ IRG(PP)
(3)
As such, for unity-gain or under-attenuated
conditions, the input voltage must be limited to the
CMIR of ±1.6V (3.2VPP) and the current (IRQ) must
flow through the gain resistor, ±2.6mA (5.2mAPP).
This configuration sets a minimum value for RE such
that the gain resistor must be greater than
Equation 4.
3.2VPP
RGMIN =
= 615.4W
5.2mAPP
(4)
Values lower than 615.4Ω are gain elements that
result in reduced input range, as the dynamic input
range is limited by the current flowing through the
gain resistor RG (IRG). If the IRG current limits the
performance of the circuit, the input stage of the
VCA821 goes into overdrive, resulting in limited
output voltage range. Such IRG-limited overdrive
conditions are shown in Figure 50 for the gain of
20dB and Figure 70 for the 32dB gain.
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OUTPUT VOLTAGE DYNAMIC RANGE
OFFSET ADJUSTMENT
With its large output current capability and its wide
output voltage swing of ±3.9V typical on 100Ω load, it
is easy to forget other types of limitations that the
VCA821 can encounter. For these limitations, careful
analysis must be done to avoid input stage limitation:
either voltage or IRG current. Note that if control pin
VG varies, the gain limitation may affect other aspects
of the circuit.
As a result of the internal architecture used on the
VCA821, the output offset voltage originates from the
output stage and from the input stage and multiplier
core. Figure 85 shows how to compensate both
sources of the output offset voltage. Use this
procedure to compensate the output offset voltage:
starting with the output stage compensation, set
VG = –1V to eliminate all offset contribution of the
input stage and multiplier core. Adjust the output
stage offset compensation potentiometer. Finally, set
VG = +1V to the maximum gain and adjust the input
stage and multiplier core potentiometer. This
procedure effectively eliminates all offset contribution
at the maximum gain. Because adjusting the gain
modifies the contribution of the input stage and the
multiplier core, some residual output offset voltage
remains.
BANDWIDTH
The output stage of the VCA821 is a wideband
current-feedback amplifier. As such, the feedback
resistance is the compensation of the last stage.
Reducing the feedback element and maintaining the
gain constant limits the useful range of IRG, and
therefore, reduces the gain adjust range. For a given
gain, reducing the gain element limits the maximum
achievable output voltage swing.
+5V
Output Stage Offset
Compensation Circuit
10kW
4kW
0.1mF
-5V
RF
VIN
+VIN
RG+
50W
RG
FB
VOUT
VCA821
RG-VIN
+5V
1kW
50W
10kW
0.1mF
-5V
Input Stage and Multiplexer Core
Offset Compensation Circuit
Figure 85. Adjusting the Input and Output Voltage Sources
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NOISE
This model is formulated in Equation 5 and Figure 86.
The VCA821 offers 6nV/√Hz input-referred voltage
noise density at a gain of 20dB and 2.6pA/√Hz
input-referred
current
noise
density.
The
input-referred voltage noise density considers that all
noise terms (except the input current noise but
including the thermal noise of both the feedback
resistor and the gain resistor) are expressed as one
term.
eO = AVMAX ´
2 ´ (RS ´ in)2 + en2 + 2 ´ 4kTRS
(5)
A more complete model is shown in Figure 87. For
additional information on this model and the actual
modeled noise terms, please contact the High-Speed
Product Application Support team at www.ti.com.
RF
in
RS
+VIN
RG+
eO
RG
FB
VCA821
eO
RG-VIN
*
4kTRS
in
RS
*
4kTRS
NOTE: RF and RG are noiseless.
Figure 86. Simple Noise Model
VG
inINPUT
VG
+VIN
V+
RS1
*
*
enINPUT
4kTRS1
FB
x1
RF
+RG
*
inINPUT
VOUT
RG
(Noiseless)
ICORE
4kTRF
*
eO
iinOUTPUT
-RG
VREF
x1
RF
enOUTPUT
*
enINPUT
iniOUTPUT
*
-VIN
4kTRF
VRS2
inINPUT
GND
*
4kTRS2
Figure 87. Full Noise Model
26
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THERMAL ANALYSIS
The VCA821 does not require heatsinking or airflow
in most applications. The maximum desired junction
temperature sets the maximum allowed internal
power dissipation as described in this section. In no
case should the maximum junction temperature be
allowed to exceed +150°C.
Operating junction temperature (TJ) is given by
Equation 6:
TJ = TA + PD ´ qJA
(6)
The total internal power dissipation (PD) is the sum of
quiescent power (PDQ) and additional power
dissipated in the output stage (PDL) to deliver load
power. Quiescent power is simply the specified
no-load supply current times the total supply voltage
across the part. PDL depends on the required output
signal and load; for a grounded resistive load,
however, it is at a maximum when the output is fixed
at a voltage equal to one-half of either supply voltage
(for equal bipolar supplies). Under this worst-case
condition, PDL = VS2/(4 × RL), where RL is the
resistive load.
Note that it is the power in the output stage and not in
the load that determines internal power dissipation.
As a worst-case example, compute the maximum TJ
using a VCA821ID (SO-14 package) in the circuit of
Figure 74 operating at maximum gain and at the
maximum specified ambient temperature of +85°C.
PD = 10V(36mA) + 52/(4 ´ 100W) = 422.5mW
(7)
Maximum TJ = +85°C + (0.443W ´ 80°C/W) = 120.5°C
(8)
This maximum operating junction temperature is well
below most system level targets. Most applications
should be lower because an absolute worst-case
output stage power was assumed in this calculation
of VCC/2, which is beyond the output voltage range for
the VCA821.
BOARD LAYOUT
Achieving
optimum
performance
with
a
high-frequency amplifier such as the VCA821
requires careful attention to printed circuit board
(PCB) layout parasitics and external component
types. Recommendations to optimize performance
include:
a) Minimize parasitic capacitance to any ac ground
for all of the signal I/O pins. This recommendation
includes the ground pin (pin 2). Parasitic capacitance
on the output can cause instability: on both the
inverting input and the noninverting input, it can react
with the source impedance to cause unintentional
band limiting. To reduce unwanted capacitance, a
window around the signal I/O pins should be opened
in all of the ground and power planes around those
pins. Otherwise, ground and power planes should be
unbroken elsewhere on the board. Place a small
series resistance (greater than 25Ω) with the input pin
connected to ground to help decouple package
parasitics.
b) Minimize the distance (less than 0.25 inches, or
6.3mm) from the power-supply pins to high-frequency
0.1µF decoupling capacitors. At the device pins, the
ground and power plane layout should not be in close
proximity to the signal I/O pins. Avoid narrow power
and ground traces to minimize inductance between
the pins and the decoupling capacitors. The
power-supply connections should always be
decoupled with these capacitors. Larger (2.2µF to
6.8µF) decoupling capacitors, effective at lower
frequencies, should also be used on the main supply
pins. These capacitors may be placed somewhat
farther from the device and may be shared among
several devices in the same area of the PCB.
c) Careful selection and placement of external
components
preserve
the
high-frequency
performance of the VCA821. Resistors should be a
very low reactance type. Surface-mount resistors
work best and allow a tighter overall layout. Metal-film
and carbon composition, axially-leaded resistors can
also provide good high-frequency performance.
Again, keep the leads and PCB trace length as short
as possible. Never use wire-wound type resistors in a
high-frequency application. Because the output pin is
the most sensitive to parasitic capacitance, always
position the series output resistor, if any, as close as
possible to the output pin. Other network
components, such as inverting or non-inverting input
termination resistors, should also be placed close to
the package.
d) Connections to other wideband devices on the
board may be made with short direct traces or
through onboard transmission lines. For short
connections, consider the trace and the input to the
next device as a lumped capacitive load. Relatively
wide traces (50mils to 100mils, or 1.27mm to
2.54mm) should be used, preferably with ground and
power planes opened up around them.
e) Socketing a high-speed part like the VCA821 is
not recommended. The additional lead length and
pin-to-pin capacitance introduced by the socket can
create an extremely troublesome parasitic network,
which can make it almost impossible to achieve a
smooth, stable frequency response. Best results are
obtained by soldering the VCA821 onto the board.
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INPUT AND ESD PROTECTION
The VCA821 is built using a very high-speed
complementary bipolar process. The internal junction
breakdown voltages are relatively low for these very
small geometry devices. These breakdowns are
reflected in the Section 2 table.
All pins on the VCA821 are internally protected from
ESD by means of a pair of back-to-back
reverse-biased diodes to either power supply, as
shown in Figure 88. These diodes begin to conduct
when the pin voltage exceeds either power supply by
about 0.7V. This situation can occur with loss of the
amplifier power supplies while a signal source is still
present. The diodes can typically withstand a
continuous current of 30mA without destruction. To
ensure long-term reliability, however, diode current
should be externally limited to 10mA whenever
possible.
28
+VS
External
Pin
ESD protection diodes internally
connected to all pins.
Internal
Circuitry
-VS
Figure 88. Internal ESD Protection
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Revision History
Changes from Revision A (August 2008) to Revision B ................................................................................................ Page
•
Revised second paragraph in Wideband Variable Gain Amplifier Operation section describing pin 9 ............................... 19
Changes from Original (December 2007) to Revision A ................................................................................................ Page
•
Changed storage temperature range rating in Absolute Maximum Ratings table from –40°C to +125°C to –65°C to
+125°C ................................................................................................................................................................................... 2
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PACKAGE OPTION ADDENDUM
www.ti.com
19-Nov-2012
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package Qty
Drawing
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Samples
(3)
(Requires Login)
VCA821ID
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
VCA821IDG4
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
VCA821IDGSR
ACTIVE
VSSOP
DGS
10
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
VCA821IDGSRG4
ACTIVE
VSSOP
DGS
10
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
VCA821IDGST
ACTIVE
VSSOP
DGS
10
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
VCA821IDGSTG4
ACTIVE
VSSOP
DGS
10
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
VCA821IDR
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
VCA821IDRG4
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
19-Nov-2012
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Nov-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
VCA821IDGSR
VSSOP
DGS
10
VCA821IDGST
VSSOP
DGS
VCA821IDR
SOIC
D
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
10
250
180.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Nov-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
VCA821IDGSR
VSSOP
DGS
10
2500
367.0
367.0
35.0
VCA821IDGST
VSSOP
DGS
10
250
210.0
185.0
35.0
VCA821IDR
SOIC
D
14
2500
367.0
367.0
38.0
Pack Materials-Page 2
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