TRF1020 GSM RECEIVER SLWS028B – MAY 1998 – REVISED SEPTEMBER 1998 D D D D D Operates from 2.75 V to 3.5 V Supply Low Current Consumption Low Profile Package: 48-pin Plastic Quad Flat Package (PQFP) Global System for Mobile Communications (GSM), Class 3, 4, or 5 Mobile Station (MS) Portable Cellular Telephone Applications Conversion from Radio Frequency (RF) to I and Q Baseband on a Single Chip D D D D D Independent Powerdown of Low Noise Amplifiers (LNA), Mixers, Intermediate Frequency (IF) Amplifiers, and Voltage-Controlled Oscillator (VCO) Digital Gain Control for LNA and IF Amplifiers Two IF Amplifiers for Dual Conversion if Required Cascaded Operation of IF Amplifiers for Single-Conversion Configurations DC Compensation of I and Q Outputs description The TRF1020 is a single-chip radio frequency (RF) downconverter suitable for 900-MHz GSM applications. It combines in one small package an LNA, an RF mixer, an IF mixer, two IF amplifiers, an I and Q mixer, and one buffered VCO. The TRF1020 requires few external components. The LNA has a nominal gain of 12.4 dB and noise figure of 2.1 dB. The first RF mixer has a conversion gain of 13.4 dB and a single-sideband (SSB) noise figure of 8.3 dB. The IF amplifiers have combined variable gain from 0 to 84 dB in approximately 3-dB steps. The IF amplifier frequency range is 40 to 180 MHz for the first IF amplifier and 10 to 180 MHz for the second IF amplifier. The local oscillator of the I and Q mixer operates at four times the last frequency of the IF mixer. Power consumption is kept to a minimum and can be further reduced by dynamically placing selected functions in standby power-down mode when not required. Power-down control is provided through the three-line digital serial interface. These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the gates. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 1998, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TRF1020 GSM RECEIVER SLWS028B – MAY 1998 – REVISED SEPTEMBER 1998 OS2_DIV4 IQMIX_VCC IF2_V CC IF2_GND IF2_IN– IF2_IN+ OS2_VCC OS2_BASE OS2_GND OS2_EMIT OS2_SYN GND PFB PACKAGE (TOP VIEW) 48 47 46 45 44 43 42 41 40 39 38 37 IQMIX_I+ IQMIX_I– VMID IQMIX_Q+ IQMIX_Q– IQMIX_GND DIG_VCC DIG_CMP CLK STROBE DAT DIG_GND 1 36 2 35 3 34 4 33 5 32 6 31 7 30 8 29 9 28 10 27 11 26 25 12 LNA_GND LNA_IN LNA_GND LNA_OUT LNA_VCC LNA_GND MIX1_RF IF1_IN+ IF1_IN– MIX1_GND OS1_BASE OS1_EMIT 13 14 15 16 17 18 19 20 21 22 23 24 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MIX2_LO MIX2_IF+ MIX2_IF– IF1_GND IF1_VCC MIX1_IF– MIX1_IF+ OS1_SYN OS1_MOD LO_BUF_GND OS1_GND OS1_VCC TRF1020 GSM RECEIVER SLWS028B – MAY 1998 – REVISED SEPTEMBER 1998 functional block diagram I /Q Mixer Buffer 1 2 External LPF 48 2nd IF Amplifier Buffer IF2_IN+ 43 44 MIX2_IF– OS2_BASE 41 0° IF2_IN– 2nd LO From Modulator (MIX2_LO) Buffer 2nd VCO ÷4 39 Buffer 38 90° 36 34 Buffer IF Mixer 35 OS2_EMIT 4 MIX2_IF+ External IF BPF 20 21 5 1st IF Amplifier IQMIX_I + IQMIX_I – Divide-by-Four To SYNTH (OS2_DIV4) External Tank SYNTH Loop Filter To SYNTH (OS2_SYN) IQMIX_Q + IQMIX_Q – IF1_IN+ IF1_IN– MIX1_IF– Buffer RF Mixer 31 Buffer 24 30 MIX1_IF+ External RF BPF Buffer 29 To SYNTH (OS1_SYN) Buffer 28 To Transmit Modulator (OS1_MOD) 19 MIX1_RF LNA Serial Interface POST OFFICE BOX 655303 11 • DALLAS, TEXAS 75265 12 DIG_GND 10 DAT 9 STROBE 8 DIG_VCC 7 CLK 14 LNA_IN DIG_CMP 16 LNA_OUT 1st LO in (OS1_EMIT) 3 TRF1020 GSM RECEIVER SLWS028B – MAY 1998 – REVISED SEPTEMBER 1998 serial port operation The TRF1020 device register is manipulated through a synchronous serial data port. The timing relationships are defined in Figure 1. One 24-bit word is clocked into a temporary holding register in little endian fashion (LSB clocked in first). New data, residing in the temporary registers, is loaded into the operation registers on the rising edge of the STROBE line. The control data-bit functions are detailed in Tables 1, 2, 3, 4, 5, 6, and 7 in the following sections. Table 1. Control Data BIT/Signal Name Map CONTROL DATA BIT† SIGNAL NAME D0 LNAP D1 LNAG D2 MX1STBY D3 MX1P D4 MX2P D5 MX2BYP D6 IF1AGC1 D7 IF1AGC2 D8 IF1AGC3 D9 IF1AGC4 D10 IF1AGC5 D11 IF1AGC6 D12 DMODP D13 DMODSTBY D14 IF2AGC1 D15 IF2AGC2 D16 IF2AGC3 D17 IF2AGC4 D18 IF2AGC5 D19 IF2AGC6 D20 DMDISABLE D21 <Not Used> D22 <Not Used> D23 <Not Used> † D0 is the first bit sent in the 24-bit serial data word, D23 is the last bit sent. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TRF1020 GSM RECEIVER SLWS028B – MAY 1998 – REVISED SEPTEMBER 1998 low noise amplifier (LNA) The LNA gain is controlled as described in Table 2. Table 2. LNA Gain Control (see Note 1) NOMINAL GAIN (dB) LNAP LNAG 0 0 1 0 0 1 –6 1 1 Not Allowed – 30† 12.4‡ † Low gain state ‡ High gain state NOTE 1: See Table 1, Control Data BIT/Signal Name Map. RF mixer The RF mixer section is controlled as described in Table 3. Table 3. RF Mixer Control (see Note 1) SIGNAL DESCRIPTION MX1STBY RF mixer standby MX1P RF mixer power OPERATION 1: Entire section on 0: Don’t care 1: Section powered up 0: Power shut down NOTE 1: See Table 1, Control Data BIT/Signal Name Map. first IF amplifier and IF mixer The second downconverter group consists of the first IF amplifier whose output feeds the IF mixer function. Because the first IF amplifier output is not brought out to device terminals, the two functions are specified together. In order to provide for cascaded operation of the first and second IF amplifiers, it is possible to bypass the IF mixer function. The first IF amplifier gain is controlled according to Table 4. The first IF amplifier and IF mixer power-down control are described in Table 5. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 TRF1020 GSM RECEIVER SLWS028B – MAY 1998 – REVISED SEPTEMBER 1998 first IF amplifier and IF mixer (continued) Table 4. First IF Amplifier Gain Control (see Note 1) IF1AGC6 IF1AGC5 IF1AGC4 IF1AGC3 IF1AGC2 IF1AGC1 GAIN (dB) 0 0 0 0 0 0 0 0 0 0 0 0 1 3 0 0 0 0 1 1 6 0 0 0 1 1 1 9 0 0 1 0 0 0 12 0 0 1 0 0 1 14.5 0 0 1 0 1 1 17.5 0 0 1 1 1 1 20.5 0 1 1 0 0 0 23 0 1 1 0 0 1 26 0 1 1 0 1 1 29 0 1 1 1 1 1 32 1 1 1 0 0 0 34.5 1 1 1 0 0 1 37 1 1 1 0 1 1 39.5 1 1 1 1 1 1 42 NOTE 1: See Table 1, Control Data BIT/Signal Name Map. Table 5. IF Mixer Bias Control (see Note 1) SIGNAL DESCRIPTION OPERATION 1: Mixer bypassed MX2BYP (see Note 2) IF mixer bypass MX2P IF mixer power control 0: Normal operation 1: Operational 0: Nonoperational NOTES: 1. See Table 1, Control Data BIT/Signal Name Map. 2. Using the mixer-bypass function disables the LO input to the mixer (at the buffer) and unbalances the mixer to allow the signal to pass through the mixer. 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TRF1020 GSM RECEIVER SLWS028B – MAY 1998 – REVISED SEPTEMBER 1998 second IF amplifier and I/Q mixer The second IF amplifier gain is controlled as described in Table 6, while the second IF amplifier, I/Q mixer and second VCO power-down controls are described in Table 7. Table 6. Second IF Amplifier Gain Control (see Note 1) IF2AGC6 IF2AGC5 IF2AGC4 IF2AGC3 IF2AGC2 IF2AGC1 GAIN (dB) 0 0 0 0 0 0 0 0 0 0 0 0 1 3 0 0 0 0 1 1 6 0 0 0 1 1 1 8.5 0 0 1 0 0 0 12 0 0 1 0 0 1 15 0 0 1 0 1 1 18 0 0 1 1 1 1 21 0 1 1 0 0 0 24 0 1 1 0 0 1 27 0 1 1 0 1 1 30 0 1 1 1 1 1 33 1 1 1 0 0 0 36 1 1 1 0 0 1 39 1 1 1 0 1 1 40 1 1 1 1 1 1 42.5 NOTE 1: See Table 1, Control Data BIT/Signal Name Map. Table 7. I/Q Mixer and Second VCO Control (see Note 1) SIGNAL DESCRIPTION DMODSTBY DEMOD standby DMODP Power control DMDISABLE DC correction OPERATION 1: Entire section on 0: Only second VCO/synth buffer on 1: Normal operation 0: Power shut down 1: Internal dc correction off 0: Internal dc correction on NOTE 1: See Table 1, Control Data BIT/Signal Name Map. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 TRF1020 GSM RECEIVER SLWS028B – MAY 1998 – REVISED SEPTEMBER 1998 Terminal Functions TERMINAL NAME NO. I/O DESCRIPTION CLK 9 I Serial data timing control signal. DAT 11 I Serial data input. DIG_CMP 8 I Control signal for I and Q DC compensation circuitry. DIG_GND 12 Ground connection for digital control circuitry. DIG_VCC GND 7 Voltage supply connection for digital control circuitry. 37 Ground IF1_GND 33 Ground connection for first IF amplifier and IF mixer circuitry. IF2_GND 45 IF1_IN+ 20 I Noninverting RF mixer output. IF2_IN+ 43 I Noninverting second IF amplifier input signal. IF1_IN– 21 I Inverting RF mixer output. IF2_IN– 44 I Inverting second IF amplifier input signal. IF1_VCC IF2_VCC 32 Voltage supply connection for first IF amplifier. 46 Voltage supply connection for second IF amplifier. IQMIX_GND 6 IQMIX_I+ 1 O Noninverting in-phase output. IQMIX_I – 2 O Inverting in-phase output. IQMIX_Q+ 4 O Noninverting quadrature-phase output. IQMIX_Q– 5 O Inverting quadrature-phase output. IQMIX_VCC LNA_GND Ground connection for second IF amplifier. Ground connection for the I and Q mixer. 47 Voltage supply connection for the I and Q mixer circuitry. 13, 15, 18 Ground connection for the LNA circuitry. LNA_IN 14 I Low-noise amplifier input. LNA_OUT 16 O Low-noise amplifier output. LNA_VCC LO_BUF_GND 17 Bias supply for the LNA circuitry. 27 Ground connection for OS1 LO buffer. MIX1_GND 22 MIX1_IF+ 30 O Noninverting first IF amplifier input signal. MIX1_IF– 31 O Inverting first IF amplifier input signal. MIX1_RF 19 I RF mixer input. MIX2_IF+ 35 O Noninverting first IF amplifier and IF mixer input. MIX2_IF– 34 O Inverting first IF amplifier and IF mixer input. MIX2_LO 36 I IF mixer LO input. OS1_BASE 23 I Base of OS1 transistor. OS2_BASE 41 I Base of the OS2 transistor. OS2_DIV4 48 O Oscillator frequency divided by 4. OS1_EMIT 24 External RF mixer LO input. OS2_EMIT 39 Emitter of OS2 transistor. OS1_GND 26 Ground connection for the OS1 circuitry. OS2_GND 40 Ground connection for OS2 circuitry. OS1_MOD 28 O OS1 buffered output. OS1_SYN 29 O OS1 buffered output. OS2_SYN 38 O OS2 buffered output. 8 Ground connection for RF mixer circuitry. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TRF1020 GSM RECEIVER SLWS028B – MAY 1998 – REVISED SEPTEMBER 1998 Terminal Functions (Continued) TERMINAL NAME I/O NO. DESCRIPTION OS1_VCC OS2_VCC 25 Bias supply for OS1 circuitry. STROBE 10 I Data strobe. VMID 3 I Bias supply reference voltage for A/D converters (VDD/2). 42 Bias supply for the OS2 circuitry. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to +5.5 V Input voltage to any other pin, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to (VCC +0.3) V Power dissipation, PD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300 mW Maximum operating junction temperature, TJmax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C Operating ambient temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40 °C to +85°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to +150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions MIN MAX UNIT V – 0.3 VCC 0.8 2.75 3.5 V – 40 85 °C – 30 105 °C Logic 1 level, VIH 2 Logic 0 level, VIL Supply voltage, VCC Operating free-air temperature, TA Operating junction temperature, TJ NOM V typical power consumption, VCC = 3 V OPERATING CURRENT (mA) STANDBY CURRENT (µA) OPERATING POWER (mW) STANDBY POWER (µW) LNA 11 5 33 15 RF mixer 18 5 54 15 MODULE Main VCO and buffers 6 5 18 15 First IF amplifier and IF mixer 22 15 66 45 Second IF amplifier and I/Q mixer 30 20 90 60 6 5 18 15 93 55 279 165 Second VCO and buffers Total POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 TRF1020 GSM RECEIVER SLWS028B – MAY 1998 – REVISED SEPTEMBER 1998 electrical characteristics over recommended free-air temperature range (unless otherwise noted) low noise amplifier (LNA), VCC = 3 V (typical values) PARAMETERS TEST CONDITIONS RF frequency range MIN TYP 915 Power gain Noise figure MAX UNIT 970 MHz High gain 12.4 dB Low gain – 5.8 dB High gain 2.1 Low gain N/A N/A dB Gain/temperature sensitivity 0.003 dB/°C Gain/frequency sensitivity 0.012 dB/MHz Reverse isolation 20 1 dB compression Input 1-dB Input third-order third order intercept (IP3) High gain –12 Low gain >5 High gain 3.9 Low gain 7.3 dB dBm dBm RF mixer (MIX1), VCC = 3 V (typical values) PARAMETERS TEST CONDITIONS MIN RF frequency range 915 LO frequency range 975 IF frequency range 40 Power conversion gain (see Note 3) SSB noise figure TYP 149 MAX UNIT 970 MHz 1220 MHz 180 MHz 13.4 dB 8.3 dB Ω RF input resistance Single ended 50 LO input impedance Single ended 50 Ω LO Power level Into OS1-base, pin 23 (for external VCO applications) –5 dBm IF output load impedance Open-collector output, 149 MHz differential RF input 1-dB compression (see Note 3) RF input third-order intercept (see Note 3) Input second-order intercept |f2 -f1| = 200 kHz, 2 fLO – 2 fRF, fdesired = 925.2 MHz, fdesired = 2f1 – f2 fLO = 1074.2 MHz, fRF = 999.7 MHz 500 Ω –9.1 dBm 4.7 dBm 15 dBm RF feedthrough to IF (see Note 3) 915 MHz to 970 MHz –15.6 dBc LO feedthrough to IF (see Note 3) 970 MHz to 1220 MHz – 35 dBm LO feedthrough to RF (see Note 4) 975 MHz to 1220 MHz – 35 dBm NOTES: 3. Into 500-Ω differential load 4. Into 50-Ω load 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TRF1020 GSM RECEIVER SLWS028B – MAY 1998 – REVISED SEPTEMBER 1998 electrical characteristics over recommended free-air temperature range (unless otherwise noted) (continued) first IF amplifier (IF1) and IF mixer (MIX2), VCC = 3 V, TA = 25°C, fI(IF) = 149 MHz, f(LO) = 97 MHz, fO(IF) = 52 MHz PARAMETERS TEST CONDITIONS MIN TYP MAX UNIT IF frequency range 40 180 MHz LO port frequency range 60 180 MHz Second mixer output frequency range Mixer on 10 80 Mixer bypassed 40 180 Power conversion gain at max IF gain setting (see Note 5) 39 Dynamic range Gain error (see Note 6) See Table 4 DSB noise figure at max IF gain Differential LO input impedance Single-ended LO input level Input 1-dB 1 dB compression (see Note 5) third order intercept (see Note 5) Input third-order 46 dB 39.5 dB ±1 dB 9.4 IF input impedance Output impedance 42.5 MHz 15 dB 2 kΩ 50 Ω – 10 dBm 52 MHz, differential, open collector 2500 Ω Maximum IF gain –61.6 Minimum IF gain –19.7 |f2 -f1| = 200 kHz, fdesired = 2f1 – f2 Maximum IF gain –52.5 Minimum IF gain –9.6 dBm dBm NOTES: 5. For 500 Ω differential load. 6. Error at any gain step relative to gain state per Table 4 at a single frequency. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 TRF1020 GSM RECEIVER SLWS028B – MAY 1998 – REVISED SEPTEMBER 1998 electrical characteristics over recommended free-air temperature range (unless otherwise noted) (continued) second IF amplifier (IF2) and I/Q mixer ((IQMIX) and second VCO (OS2)), VCC = 3 V, Vmid = VCC /2, TA = 25°C, fI(IF) = 52 MHz PARAMETERS TEST CONDITIONS MIN IF frequency range 10 Power gain at max IF gain setting (see Note 7) 37 TYP 42 Dynamic range MAX UNIT 180 MHz 47 dB 40 dB dB Gain error (see Notes 7 and 8) See Table 6 ±1 SSB noise figure Maximum IF gain 12 dB IF input impedance Differential 2 kΩ Input 1 1-dB dB compression (see Note 7) Maximum IF gain –55 Minimum IF gain –19 Input third-order third order intercept (see Note 7) |f| 2 -f1| = 200 kHz,, fdesired = 2f1 – f2 I and Q output impedance Differential open collector I and Q output voltage swing (see Note 7) Each differential line I and Q output dc level (see Note 7) Maximum IF gain –45 Minimum IF gain –9 dBm Ω 1100 1.7 Vpp Vmid ± 10 mV (see Note 9) Each differential line I and Q baseband bandwidth (see Note 7) I to Q output gain balance (see Note 7) dBm Between I or Q outputs I or Q amplitude balance (see Note 7) V 200 kHz ± 0.5 dB ± 0.69 dB ±1 deg I or Q phase accuracy (see Note 7) NOTES: 7. For 10-kΩ differential load at I and Q outputs 8. Error at any gain step is relative to gain setting per Table 6 at a single frequency. 9. DC compensation operating second VCO (OS2), VCC = 3 V (typical values) PARAMETERS TEST CONDITIONS Frequency range MIN TYP 180 MAX UNIT 720 MHz Auxiliary LO output power Into 100 Ω –14.5 dBm Phase noise Offset = 200 kHz –120 120 dBc /Hz second VCO (OS2) divide-by-four output (OS2_DIV4), VCC = 3 V PARAMETERS TEST CONDITIONS Frequency range TYP 45 Output voltage level 12 MIN 180 250 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MAX UNIT MHz mVp-p TRF1020 GSM RECEIVER SLWS028B – MAY 1998 – REVISED SEPTEMBER 1998 electrical characteristics over recommended free-air temperature range (unless otherwise noted) (continued) serial interface timing requirements with VDDP = VDDA ≥ 2.75 V and ≤ 3.5 V, TA = 25°C (see Figure 1) PARAMETER MIN TYP MAX CLOCK, DATA and STROBE input capacitance Ri CLOCK, DATA and STROBE input resistance fclock t(r), t(f) CLOCK frequency tw(High) tw(Low) Pulse duration, CLOCK high 20 ns Pulse duration, CLOCK low 20 ns Data setup time before CLOCK high 20 ns Strobe setup time before CLOCK high 20 ns Data hold timeafter CLOCK high 20 ns Strobe hold time after CLOCK high 20 ns 2 REF_IN ns tsu th tw(pulse) 10 UNIT Ci 10 kΩ 0 CLOCK input rise and fall time Strobe pulse width duration pF 20 MHz 8 ns cascaded performance VCC = 3 V, LNA through Mixer1, TA = 25°C PARAMETER RF = 940 MHz, LO = 1089 MHz, IF = 149 MHz (measurements include filter loss) Max LNA gain setting Cascaded gain Min LNA gain setting Cascaded SSB NF MIN 25 TYP MAX 27 29 6.8 UNIT dB dB Max LNA gain setting 3.8 Max LNA gain setting –8.9 dBm Min LNA gain setting 9.1 dBm RF input return loss 8.4 dB LO input return loss 13.5 dB IF input return loss 10.6 dB Input third order intercept Input, |f2 – f1 |= 200 kHz POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 4.5 dB 13 TRF1020 GSM RECEIVER SLWS028B – MAY 1998 – REVISED SEPTEMBER 1998 PARAMETER MEASUREMENT INFORMATION Data Valid DATA Data Change D0 D1 tsu D22 th – VIH D23 – VIL tw(High) – VIH CLOCK – VIL tsu tw(Low) th tw(pulse) STROBE – VIH – VIL Clock Enabled Shift in Data Clock Disabled Store Data Figure 1. TRF1020 Timing Relationships APPLICATION INFORMATION Table 8. TRF1020 Evaluation Board Parts List SIZE (mm) MANUFACTURER 100 pF 0402 Murata GRM36COG101J50 9 pF 0402 Murata GRM36COG090D50 Capacitor 100 pF 0402 Murata GRM36COG101J50 Capacitor 10000 pF 0402 Murata GRM36COG103K50 DESIGNATORS DESCRIPTION C1, 2, 3, 4 Capacitor C5, Capacitor C6 C7 14 VALUE MANUFACTURER P/N C10, 11 Capacitor 56 pF 0402 Murata GRM36COG560J50 C14, 16 Capacitor 1 µF 3258B Venkel TA025TCM105KAR C15 Capacitor 39 pF 0402 Murata GRM36COG390J50 C19 Capacitor 56 pF 0402 Murata GRM36COG560J50 C20 Capacitor 5 pF 0402 Murata GRM36COG050D50 C21 Capacitor 5 pF 0402 Murata GRM36COG050C50 C22 Capacitor 330 pF 1206 Murata GRM42–6COG331J50 C23 Capacitor 1000 pF 0402 Murata GRM36COG102Z50 C24 Capacitor 100 pF 0402 Murata GRM36COG101J50 C25 Capacitor 4 pF 0402 Murata GRM36COG040C50 C26 Capacitor 56 pF 0402 Murata GRM36COG560K50 C27 Capacitor 100 pF 0402 Murata GRM36COG101J50 C28 Capacitor 2.7 pF 0402 Murata GRM36COG2R7J50 C29 Capacitor 100 pF 0402 Murata GRM36COG101J50 C31 Capacitor 330 pF 1206 Murata GRM42–6COG331J50 C32 Capacitor 100 pF 0402 Murata GRM36COG101J50 C34 Capacitor 100 pF 0402 Murata GRM36COG101J50 C35 Capacitor 220 pF 1206 Murata GRM42-6COG221J50 C37 Capacitor 2 pF 0402 Murata GRM36COG020C50 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TRF1020 GSM RECEIVER SLWS028B – MAY 1998 – REVISED SEPTEMBER 1998 APPLICATION INFORMATION Table 8. TRF1020 Evaluation Board Parts List (Continued) DESIGNATORS DESCRIPTION VALUE SIZE (mm) MANUFACTURER MANUFACTURER P/N C38 Capacitor 33 pF 0402 Murata GRM36COG330J50 C41, 42, 43, 44 Capacitor 10 pF 0402 Murata GRM36COG100D50 C45, 46, 47 Capacitor 100 pF 0402 Murata GRM36COG101J50 C48 Capacitor 220 pF 1206 Murata GRM42-6COG221J50 C49 Capacitor 10000 pF 0402 Murata GRM36COG103K50 C50, 51 Capacitor 100000 pF 0402 Murata GRM36COG1042016 C52 Capacitor 10000 pF 0402 Murata GRM36COG103K50 C53 Capacitor 56 pF 0402 Murata GRM36COG056J50 C54 Capacitor 1 pF 0402 Murata GRM36COG010C50 C55 Capacitor 1000 pF 0402 Murata GRM36X7R102K50 C56 Capacitor 39pF 1206 Murata GRM42–6COG390J50 C57 Capacitor 1 pF 0402 Murata GRM36COG010C50 C58 Capacitor 3.3 pF 0402 Murata GRM36COG3R3050 C59 Capacitor 18 pF 1206 Murata GRM42–6COG180J50 C60 Capacitor 100 pF 0402 Murata GRM36COG101J50 C61 Capacitor 10000 pF 0402 Murata GRM36X7R103K16 C62 Capacitor 1000000 pF 3258B Venkel TA025TCM105KAR C63 Capacitor 1000000 pF 1206 Murata GRM42-6Y5V105 C64 Capacitor 100 pF 0402 Murata GRM36COG101J50 C65 Capacitor 2 pF 0402 Murata GRM36COG020C50 C66 Capacitor 6 pF 0402 Murata GRM36COG060J50 C72 Capacitor 1000 pF 0402 Murata GRM36Y5V102Z50 C73 Capacitor 33 pF 0402 Murata GRM36COG330O50 C74, 75, 76 Capacitor 1000 pF 0402 Murata GRM36Y5V102Z50 C77 Capacitor 82 pF 0402 Murata GRM36COG820J50 C80 Capacitor 12 pF 0402 Murata GRM36COG120O50 C81 Capacitor 5 pF 0402 Murata GRM36COG050C50 C82 Capacitor 12 pF 0402 Murata GRM36X7R120K16 C83 Capacitor 5 pF 0402 Murata GRM36COG050C50 C84 Capacitor 9 pF 0402 Murata GRM36COG090J50 C85 Capacitor 10000 pF 0402 Murata GRM36COG103K50 C86 Capacitor 22 pF 0402 Murata GRM36COG220J50 C87 Capacitor 5.6 pF 0603 Murata GRM39COG5R6C50 L1 Inductor 150 nH 1008 Coilcraft 1008CS-151XKBC L2 Inductor 470 nH 0603 Toko L3 Inductor 180 nH 0805 Coilcraft 0805HS–181TKBC L4 Inductor 6.8 nH 0603 Coilcraft 0603HS–6N8TKBC L5 Inductor 15 nH 0603 Coilcraft 0603HS–15NTJBC POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 LL2012-FR47K 15 TRF1020 GSM RECEIVER SLWS028B – MAY 1998 – REVISED SEPTEMBER 1998 APPLICATION INFORMATION Table 8. TRF1020 Evaluation Board Parts List (Continued) SIZE (mm) MANUFACTURER 15 nH 0603 Coilcraft 0603HS-15NTJBC 6.8 nH 0603 Coilcraft 0603HS–6N8TJBC 120 nH 0603 Coilcraft 0603HS-R12TJBC Inductor 180 nH 0805 Coilcraft 0805HS–180TKBC Inductor 150 nH 1008 Coilcraft 1008CS-151XKBC DESIGNATORS DESCRIPTION L6 Inductor L7 Inductor L8, 9 Inductor L10 L11 16 VALUE MANUFACTURER P/N L12 Inductor 56 nH 0603 Coilcraft 0603HS-56NTJBC L13, 14 Inductor 3.9 nH 0603 Coilcraft 0603HS-3N9TKBC L15, 16 Inductor 390 nH 1008 Coilcraft 1008CS–391XKBC L17 Inductor 39 nH 0603 Coilcraft 0603HS–39NTJBC L18 Inductor 390 nH 1008 Coilcraft 1008CS–391XKBC L19 Inductor 120 nH 1008 Coilcraft 1008CS–121XKBC L21 Inductor 39 nH 0805 Coilcraft 0805HS-390TMBC L22 Inductor 6.8 nH 0402 Toko LL1005–F6N8K L23 Inductor 180 nH 0805 Coilcraft 0805HS–181TKBC L25, 26 Inductor 47 nH 0603 Coilcraft 0603HS–47NTJBC L27 Inductor 39 nH 0805 Coilcraft 0805HS-390TMBC L28 Inductor 150 nH 0805 Coilcraft 0805HS–151TKBC L29 Inductor 120 nH 0603 Coilcraft 0603HS–R12TJBC R1, 2 Resistor 0Ω 0402 Panasonic ERJ–2GEJ0R00 R3 Resistor 10 kΩ 0402 Panasonic ERJ-2GEJ103 R4 Resistor 1.5 kΩ 0402 Panasonic ERJ-2GEJ152 R5, 6 Resistor 1 kΩ 0402 Panasonic ERJ-2GEJ102 R7 Resistor 1.5kΩ 0402 Panasonic ERJ-2GEJ152 R8 Resistor 1 kΩ 0402 Panasonic ERJ-2GEJ102 R9 Resistor 1.5 kΩ 0402 Panasonic ERJ-2GEJ152 R10 Resistor 1 kΩ 0402 Panasonic ERJ-2GEJ102 ERJ-2GEJ152 R11 Resistor 1.5 kΩ 0402 Panasonic R12 Resistor 10 kΩ Trimpot Bourns R13 Resistor 10 kΩ 0402 Panasonic ERJ-2GEJ103 R14 Resistor 9.1 kΩ 0402 Panasonic ERJ-2GEJ912 R15 Resistor 10 kΩ 0402 Panasonic ERJ-2GEJ103 R16 Resistor 10 kΩ 0402 Panasonic ERJ-2GEJ103 R17 Resistor 2 kΩ Trimpot Bourns R18, 21 Resistor 22 kΩ 0402 Panasonic 3214W–1–103ECT 3214W–1–202ECT ERJ-2GEJ223 R19 Resistor 10 kΩ Trimpot Bourns R20, 22, 23 Resistor 10 kΩ 0402 Panasonic ERJ-2GEJ103 R24 Resistor 9.1 kΩ 0402 Panasonic ERJ-2GEJ912 R25 Resistor 10 kΩ 0402 Panasonic ERJ-2GEJ103 R26 Resistor 2 kΩ Trimpot Bourns R29 Resistor 10 kΩ 0402 Panasonic ERJ-2GEJ103 R30 Resistor 5.1kΩ 0402 Panasonic ERJ–2GEJ512 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3214W–1–103ECT 3214W–1–202ECT TRF1020 GSM RECEIVER SLWS028B – MAY 1998 – REVISED SEPTEMBER 1998 APPLICATION INFORMATION Table 8. TRF1020 Evaluation Board Parts List (Continued) VALUE SIZE (mm) MANUFACTURER MANUFACTURER P/N 0402 Panasonic ERJ-2GEJ0R00 Trimpot Bourns 3214W-103ECT DESIGNATORS DESCRIPTION R31, 32, 33 Resistor 0Ω R36 Resistor 10 kΩ R39 Resistor 200 Ω 0402 Panasonic ERJ-2GEJ201 R40, 41 Resistor 50 Ω 0402 Panasonic ERK-2GEJ201 R42 Resistor 47 kΩ 0402 Panasonic ERJ-2GEJ473 0Ω 0402 Panasonic ERJ-2GEJ0R00 Bourns 3296–Y–1–103 Panasonic ERJ-2GEJ0R00 R43 Resistor R44 Adj. Resistor R50, 51 Resistor P1 Connector, 9-pin serial Amp J1, 2, 4, 5, 6, 8, 10, 11, 12, 13, 14, 15 SMA board connector EF Johnson J20, 21 DC voltage connector Amp 4-103239-0 U1 Voltage regulator (3 V) Toko TK11230CT-ND U10 GSM receiver TI U11, 12 Operational amplifiers Motorola MC34071D CR1 Varactor diode Motorola MMBV2109 F1 Differential SAW filter RF Monolithics 10 kΩ 0Ω 0402 745990-4 142-0701-801 TRF1020 RFM_SF 1076A F2 Bandpass filter Murata T1, 2 Balun transformer Toko 617PT1026 T3, 4 Balun transformer MA/COM ETC1–1–13 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SAFC942.5MA7ON 17 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 R16 10 k 6 C83 5 pF J21 1 + C14 2 1 µF C51 I_OUT .1 µ F J12 2 1 –12 V DEM_LO J11 2 1 C3 100 pF 47 k R44 10 k R42 1 C16 1 µF –12 V 4 U3 +12 V C26 56 pF 10 k VCC C75 5 + 2 R15 10 k R18 22 k CW 22 k 10 k R36 R30 CCW 2k VCC C15 L3 180 nH 39 pF C80 12 pF 5 pF C81 L2 C87 100 pF 37 38 39 40 41 42 43 44 45 46 47 48 C58 U10 TRF1020 –12 V R21 2k 4 C45 100 pF 2 5 U3 4 C19 56 pF 10 k R20 –12 V + P1:I P1:F P1:E P1:D P1:A R25 10 k C50 Q_OUT J13 0.1 µ F 9 6 5 1 R11 1.5 k R9 1.5 k R7 1.5 k R4 1.5 k 100 pF L7 6.8 nH 5 pF 1k C44 10 pF R10 8 1k C43 10 pF R8 3 1k C42 10 pF R6 7 1k C41 10 pF R5 2 J8 RF_IN 2.7 pF C28 P1:H L27 GND VIN VOUT U1 L29 120 nH + VCC GND 13 46 5 C63 1µ F IN OUT C62 1µ F 4 5 6 2 J20 C64 100 pF VIN 2 1 J5 IF1_IN C27 100 pF SF2 SAFC942.5MA7ON TK11230CT–ND BYP GND CONT 0 L4 6.8 nH 6 pF C66 L28 0 R32 150 nH 1 4 ETC1-1-13 3 T4 5 220 pF C59 18 pF C35 C48 220 pF C56 39 pF C61 .01 µ F 3 2 1 R31 C34 100 pF C25 4 pF 39 nH L21 39 nH VCC C60 100 pF P1:C P1:G P1:B L6 15 nH MIXI_LO J6 L5 15nH OSI_MOD 6.8 nH L22 100 pF C24 C55 1 pF 1000 pF C32 C37 2 pF 1 pF 50 C57 50 C54 L14 3.9 nH R41 VCC J4 MIX1_OUT SF1 SF1076A L26 6 47 nH 11 IN OUT 5 L25 12 IN OUT GND 47 nH 1234 78910 0 R33 3.9 nH R40 L13 330 pF C38 C22 33 pF C20 VCC 6 180 nH OSI_SYN 24 23 22 21 20 19 18 17 16 15 14 13 C31 3 T3 5 1 4 ETC1-1-13 Figure 2. Evaluation Board Schematic 10 k 9.1 k R22 R23 10 k L10 180 nH 330 pF L23 C23 1000 pF VCC C29 100 pF 120 nH 120 nH L9 VCC L8 5 pF C21 C4 100 pF VCC +12 V OFFSET ADJUST W R19 AMPLITUDE BALANCE CCW CW R26 W 10 k R24 3 _7 CW CCW R29 10 k C47 J15 100 pF 5.6 pF C46 100 pF 470 nH C49 C2 1000 pF .01 µ F 100 pF 1000 pF C74 C1 100 pF 1 1000 pF C76 VCC 617PT1026 R13 10 k J2 3.3 pF L12 56 nH L11 150 nH L1 150 nH VCC 9pF R39 200 C6 C7 .01 µ F MIX2_LO C10 56 pF C11 56 pF L18 390 nH –12 V OFFSET ADJUST 5.1k R12 W AMPLITUDE BALANCE CW CCW W R17 R14 7 _ 3 10 k 9.1 k CCW CW + 5 2 0 R2 C52 0.01 µ F VCC 0 R1 C5 R50 0 4 T2 3 R51 0 12 pF L17 39 nH C82 VCO2_BUF J1 C53 82 pF L16 56 pF 390 nH J15 C77 L19 120 nH 2 5 C72 1000 pF 1 3 4 T1 617PT1026 CR1 MMBV2109 9 pF C84 C86 22 pF 3 C85 0.01 µ F 2 3 IF2_IN 12 V R3 R43 0 2 VCC 33 pF L15 390 nH MIX2_OUT C73 36 35 34 33 32 31 30 29 28 27 26 25 1 2 3 4 5 6 7 8 9 10 11 12 18 J14 TRF1020 GSM RECEIVER SLWS028B –MAY 1998 – REVISED SEPTEMBER 1998 APPLICATION INFORMATION TRF1020 GSM RECEIVER SLWS028B – MAY 1998 – REVISED SEPTEMBER 1998 TYPICAL CHARACTERISTICS S11 & S22 Freq 0 9–1 Ghz S21 & S12 Freq 9–1 Ghz Figure 3. LNA S-Parameters Figure 4. LNA Gain Table 9. Listing of LNA S-Parameters (see Note 10) FREQ (MHz) S11 (MAG) S11 (ANG) S21 (MAG) S21 (ANG) S12 (MAG) S12 (ANG) S22 (MAG) S22 (ANG) 920 0.528 –106.9 3.941 81.85 0.016 89.3 0.596 7.7 930 0.523 –108.0 3.906 80.50 0.016 88.4 0.590 6.5 940 0.520 –109.1 3.873 79.44 0.016 87.3 0.586 5.4 950 0.515 –110.2 3.854 78.36 0.017 86.3 0.582 4.2 960 0.512 –111.3 3.827 77.19 0.017 86.6 0.577 3.2 970 0.509 –112.7 3.813 76.05 0.017 85.7 0.571 2.2 NOTE 10: The numbers in Table 9 were taken using a 50-Ω setup with no I/O gain or noise-figure matching. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 19 TRF1020 GSM RECEIVER SLWS028B – MAY 1998 – REVISED SEPTEMBER 1998 TYPICAL CHARACTERISTICS LNA HIGH-GAIN NOISE FIGURE vs FREQUENCY LNA HIGH GAIN vs FREQUENCY 12.8 2.9 12.7 LNA High–Gain Noise Figure – dB –40°C LNA High Gain – dB 12.6 12.5 25°C 12.4 12.3 12.2 85°C 12.1 2.5 85°C 2.3 25°C 2.1 –40°C 1.9 1.7 12 11.9 920 2.7 930 950 940 1.5 920 960 930 LNA HIGH-GAIN IP3 vs FREQUENCY LNA HIGH-GAIN 1-dB COMPRESSION POINT vs FREQUENCY LNA High–Gain 1–dB Compression Point –dBm 5 LNA High Gain IP3 – dBm 4.5 4 3.5 25°C 85°C 3 2.5 2 920 930 940 950 960 –11.5 –11.6 –11.7 –11.8 –11.9 –40°C, 25°C –12 –12.1 85°C –12.2 –12.3 –12.4 –12.5 920 930 940 f – Frequency – MHz f – Frequency – MHz Figure 8 Figure 7 20 960 Figure 6 Figure 5 –40°C 950 940 f – Frequency – MHz f – Frequency – MHz POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 950 960 TRF1020 GSM RECEIVER SLWS028B – MAY 1998 – REVISED SEPTEMBER 1998 TYPICAL CHARACTERISTICS LNA HIGH GAIN AT 25°C vs VOLTAGE 2.5 12.9 2.4 LNA High–Gain Noise Figure – dB 13 12.8 LNA High Gain – dB LNA HIGH-GAIN NOISE FIGURE AT 25°C vs VOLTAGE 920 MHz 12.7 940 MHz 12.6 12.5 960 MHz 12.4 12.3 12.2 12.1 12 2.5 2.3 960 MHz 2.2 940 MHz 2.1 920 MHz 2 1.9 1.8 1.7 1.6 3 1.5 2.5 3.5 3 Voltage – V 3.5 Voltage – V Figure 10 Figure 9 LNA HIGH-GAIN IP3 AT 25°C vs VOLTAGE LNA HIGH-GAIN CURRENT AT 25°C vs VOLTAGE 6 0.012 960 MHz 0.0118 940 MHz LNA High–Gain Current – A LNA High–Gain IP3 – dBm 5 4 920 MHz 3 2 0.0116 0.0114 0.0112 0.011 0.0108 1 0.0106 0 2.5 3 3.5 0.0104 2.5 Voltage – V 3 3.5 Voltage – V Figure 12 Figure 11 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 21 TRF1020 GSM RECEIVER SLWS028B – MAY 1998 – REVISED SEPTEMBER 1998 TYPICAL CHARACTERISTICS MIX1 SSB NOISE FIGURE vs FREQUENCY MIX1 GAIN vs FREQUENCY 11 14 MIX1 Gain – dB 13.5 MIX1 SSB Noise Figure – dB –40°C 25°C 85°C 13 12.5 10 9 85°C 25°C 8 –40°C 7 12 920 930 950 940 6 920 960 930 MIX1 IP3 vs FREQUENCY MIX1 1-dB COMPRESSION POINT vs FREQUENCY 7 MIX1 1–dB Compression Point – dBm –8.5 6 MIX1 IP3 – dBm 960 Figure 14 Figure 13 85°C 5 25°C 4 –40°C 930 940 950 960 –40°C –9 25°C 85°C –9.5 –10 920 f – Frequency – MHz 930 940 f – Frequency – MHz Figure 16 Figure 15 22 950 f – Frequency – MHz f – Frequency – MHz 3 920 940 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 950 960 TRF1020 GSM RECEIVER SLWS028B – MAY 1998 – REVISED SEPTEMBER 1998 TYPICAL CHARACTERISTICS MIX1 NOISE FIGURE AT 25°C vs VOLTAGE MIX1 GAIN AT 25°C vs VOLTAGE 14.5 9.5 13.5 940 MHz 955 MHz 13 960 MHz 12.5 12 2.5 960 MHz 9 920 MHz MIX1 Noise Figure – dB MIX1 Gain – dB 14 955 MHz 8.5 940 MHz 8 920 MHz 7.5 2.7 2.9 3.1 3.3 3.5 7 2.5 3.7 2.7 2.9 Voltage – V 3.1 3.3 3.5 3.7 3.5 3.7 Voltage – V Figure 18 Figure 17 MIX1 IP3 AT 25°C vs VOLTAGE MIX1 CURRENT AT 25°C vs VOLTAGE 6 0.021 5.5 940 MHz 0.02 920 MHz 4.5 MIX1 Current – A MIX1 IP3 – dBm 5 955 MHz 4 960 MHz 3.5 0.019 0.018 3 0.017 2.5 2 2.5 2.7 2.9 3.1 3.3 3.5 3.7 0.016 2.5 2.7 Voltage – V 2.9 3.1 3.3 Voltage – V Figure 20 Figure 19 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 23 TRF1020 GSM RECEIVER SLWS028B – MAY 1998 – REVISED SEPTEMBER 1998 TYPICAL CHARACTERISTICS LNA/MIX1 CASCADED GAIN AT 25°C vs FREQUENCY LNA/MIX1 CASCADED NOISE FIGURE AT 25°C vs FREQUENCY 6 LNA/Mix1 Cascaded Noise Figure – dB LNA/Mix1 Cascaded Gain – dB 30 28 –40°C 26 25°C 24 85°C 22 20 925 930 935 940 945 950 955 85°C 5 4 3 –40°C 2 1 0 925 960 25°C 930 935 940 950 f – Frequency – MHz Figure 21 Figure 22 LNA/MIX1 CASCADED 1-dB COMPRESSION AT 25°C POWER OUT vs POWER IN 6 Power Out – dBm 5 4 3 2 1 0 –50 –45 –40 –35 –34 –33 –32 –31 –30 –29 –28 Power In – dBm Figure 23 24 945 f – Frequency – MHz POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 955 960 TRF1020 GSM RECEIVER SLWS028B – MAY 1998 – REVISED SEPTEMBER 1998 MECHANICAL DATA PFB (S-PQFP-G48) PLASTIC QUAD FLATPACK 0,27 0,17 0,50 36 0,08 M 25 37 24 48 13 0,13 NOM 1 12 5,50 TYP 7,20 SQ 6,80 9,20 SQ 8,80 Gage Plane 0,25 0,05 MIN 0°– 7° 1,05 0,95 Seating Plane 0,75 0,45 0,08 1,20 MAX 4073176 / B 10/96 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Falls within JEDEC MS-026 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 25 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. 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