VCA VCA810 810 www.ti.com SBOS275F – JUNE 2003 – REVISED DECEMBER 2010 High Gain Adjust Range, Wideband, VARIABLE GAIN AMPLIFIER Check for Samples: VCA810 FEATURES Operating from ±5V supplies, the gain control voltage for the VCA810 will adjust the gain from –40dB at 0V input to +40dB at –2V input. Increasing the control voltage above ground will attenuate the signal path to greater than 80dB. Signal bandwidth and slew rate remain constant over the entire gain adjust range. This 40dB/V gain control is accurate within ±1.5dB (±0.9dB for high grade), allowing the gain control voltage in an AGC application to be used as a Received Signal Strength Indicator (RSSI) with ±1.5dB accuracy. 1 • • • • • • • • • 2 HIGH GAIN ADJUST RANGE: ±40dB DIFFERENTIAL IN/SINGLE-ENDED OUT LOW INPUT NOISE VOLTAGE: 2.4nV/√Hz CONSTANT BANDWIDTH vs GAIN: 35MHz HIGH dB/V GAIN LINEARITY: ±0.3dB GAIN CONTROL BANDWIDTH: 25MHz LOW OUTPUT DC ERROR: < ±40mV HIGH OUTPUT CURRENT: ±60mA LOW SUPPLY CURRENT: 24.8mA (max for −40°C to +85°C temperature range) Excellent common-mode rejection and common-mode input range at the two high-impedance inputs allow the VCA810 to provide a differential receiver operation with gain adjust. The output signal is referenced to ground. Zero differential input voltage gives a 0V output with a small dc offset error. Low input noise voltage ensures good output SNR at the highest gain settings. APPLICATIONS • • • • • • • OPTICAL RECEIVER TIME GAIN CONTROL SONAR SYSTEMS VOLTAGE-TUNABLE ACTIVE FILTERS LOG AMPLIFIERS PULSE AMPLITUDE COMPENSATION AGC RECEIVERS WITH RSSI IMPROVED REPLACEMENT FOR VCA610 In applications where pulse edge information is critical, and the VCA810 is being used to equalize varying channel loss, minimal change in group delay over gain setting will retain excellent pulse edge information. +5V 6 V+ V- VCA810 1 8 Gain Adjust + X1 5 VOUT An improved output stage provides adequate output current to drive the most demanding loads. While principally intended to drive analog-to-digital converters (ADCs) or second-stage amplifiers, the ±60mA output current will easily drive doubly-terminated 50Ω lines or a passive post-filter stage over the ±1.7V output voltage range. VCA810 RELATED PRODUCTS 2 VC DUALS GAIN ADJUST RANGE (dB) VCA811 — 80 2.4 80 — VCA2612 45 1.25 80 — VCA2613 45 1 80 — VCA2614 45 3.6 40 — VCA2616 45 3.3 40 VCA2618 45 5.5 30 3 SINGLES 0 ® -2V -40dB ® +40dB Gain 7 -5V DESCRIPTION The VCA810 is a dc-coupled, wideband, continuously variable, voltage-controlled gain amplifier. It provides a differential input to single-ended output conversion with a high-impedance gain control input used to vary the gain over a –40dB to +40dB range linear in dB/V. INPUT NOISE (nV/√Hz) SIGNAL BANDWIDTH (MHz) 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2003–2010, Texas Instruments Incorporated VCA810 SBOS275F – JUNE 2003 – REVISED DECEMBER 2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) SPECIFIED TEMPERATURE RANGE PACKAGE MARKING PRODUCT PACKAGE-LEAD PACKAGE DESIGNATOR VCA810ID SO-8 D –40°C to +85°C VCA810 VCA810AID SO-8 D –40°C to +85°C VCA810A (2) (1) (2) ORDERING NUMBER TRANSPORT MEDIA, QUANTITY VCA810ID Rails, 75 VCA810IDR Tape and Reel, 2500 VCA810AID Rails, 75 VCA810AIDR Tape and Reel, 2500 For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the device product folder at www.ti.com. The A indicating high grade appears opposite the pin 1 marking indicator. ABSOLUTE MAXIMUM RATINGS (1) Over operating free-air temperature range, unless otherwise noted. Power supply Internal power dissipation VCA810 UNIT ±6.5 V See Thermal Analysis section Differential input voltage ±VS Input common-mode voltage range Storage temperature range, D package Junction temperature (TJ) Human body model (HBM) V ±VS V –65 to +125 °C +150 °C 2000 V ESD ratings Charge device model (CDM) 1500 V Machine model 200 V (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. PIN CONFIGURATIONS D PACKAGE SO-8 (TOP VIEW) A -In -VS 8 7 +VS VOUT 6 5 (1) VCA810 1 +In 2 (1) High grade version indicator. (2) NC = Not connected. 2 3 4 GND Gain NC Control, VC (2) Submit Documentation Feedback Copyright © 2003–2010, Texas Instruments Incorporated Product Folder Link(s): VCA810 VCA810 www.ti.com SBOS275F – JUNE 2003 – REVISED DECEMBER 2010 ELECTRICAL CHARACTERISTICS: VS = ±5V Boldface limits are tested at +25°C. At RL = 500Ω, and VIN = single-ended input on V+ with V− at ground,, unless otherwise noted. VCA810 MIN/MAX OVER TEMPERATURE TYP PARAMETER CONDITIONS +25°C +25°C (2) 0°C to +70°C (3) –40°C to +85°C (3) UNITS MIN/ MAX TEST LEVEL (1) AC PERFORMANCE −2V ≤ VC ≤ 0V 35 30 29 29 MHz min B VO = 2VPP, −2 ≤ VC ≤ −1 35 30 29 29 MHz min B VO < 500mVPP, −2V ≤ VC ≤ 0V 0.1 0.5 0.5 0.5 dB min B VO = 3.5V Step, −2 ≤ VC ≤ −1, 10% to 90% 350 300 300 295 V/ms min B Settling time to 0.01% VO = 1V Step, −2 ≤ VC ≤ −1 30 40 41 41 ns min B Rise-and-fall time VO = 1V Step, −2 ≤ VC ≤ −1 10 12 12.1 12.1 ns min B G = 0dB, VC=−1V, f = 5MHz, VO = 500mVPP 6.2 ns typ C VO < 500mVPP, −2V ≤ VC ≤ 0V, f = 5MHz 3.5 ns typ C Second harmonic VO = 1VPP, f = 1MHz, VC = −1V, G = 0dB –71 –51 –50 –49 dBc min B Third harmonic VO = 1VPP, f = 1MHz, VC = −1V, G = 0dB −35 –34 –32 –29 dBc min B Input voltage noise VC = −2V 2.4 2.8 3.4 3.5 nV/√Hz max B Input current noise −2V ≤ VC ≤ 0V 1.4 1.8 2.0 2.1 pA/√Hz max B f ≤ 1MHz, VC > +200mV −80 −70 dB max B VIN = 2V to 0V, VC = −2V, G = 40dB 100 150 ns min B −2V ≤ VC ≤ 0V ±4 ±22 ±30 ±32 mV max A ±125 ±125 V/°C max B Both inputs grounded ±0.1 ±0.25 ±0.30 ±0.35 mV max A ±1 ±1.2 mV/°C max B −12 −14 mA max A ±25 ±30 nA/°C max B ±700 ±800 nA max A ±1.4 ±2.2 nA/°C max B A Small-signal bandwidth (see Figure 29) Large-signal bandwidth Frequency response peaking Slew rate Group delay Group delay variation Harmonic distortion Fully attenuated feedthrough Overdrive recovery DC PERFORMANCE Output offset voltage (both inputs grounded) (4) Single-ended or differential input Output offset voltage drift Input offset voltage (4) input offset voltage drift Input bias current −2V ≤ VC ≤ 0V −6 –10 Input bias current drift Input offset current −2V ≤ VC ≤ 0V ±100 ±600 Input offset current drift INPUT Common-mode input range ±2.4 ±2.3 ±2.3 ±2.2 V min VCM = 0.5V, VC = −2V, Input-referred 95 85 83 80 dB min A VCM = 0V, Single-ended 1|| 1 MΩ || pF typ C VCM = 0V, Differential > 10 || < 2 MΩ || pF typ C VC = 0V, VCM = 0V 3 VPP typ C VC = −2V, RL = 100Ω ±1.8 ±1.7 ±1.4 ±1.3 V min A VC = −2V, RL = 100Ω ±1.7 ±1.6 ±1.3 ±1.2 V min A Output current VO = 0V ±60 ±40 ±35 ±32 mA min A Output short-circuit current VO = 0V ±120 mA typ C VO = 0V, f < 100kHz 0.2 Ω typ C Common-mode rejection ratio Input impedance Differential input range (5) OUTPUT Voltage output swing Output impedance (1) (2) (3) (4) (5) Test levels: (A) 100% tested at +25°C. Over temperature limits set by characterization and simulation. (B) Limits set by characterization and simulation. (C) Typical value; only for information. Junction temperature = ambient for +25°C tested specifications. Junction temperature = ambient at low temperature limit; junction temperature = ambient +30°C at high temperature limit for over temperature specifications. Total output offset is: (Output Offset Voltage ± Input Offset Voltage x Gain). Maximum input at minimum gain for < 1dB gain compression. Submit Documentation Feedback Copyright © 2003–2010, Texas Instruments Incorporated Product Folder Link(s): VCA810 3 VCA810 SBOS275F – JUNE 2003 – REVISED DECEMBER 2010 www.ti.com ELECTRICAL CHARACTERISTICS: VS = ±5V (continued) Boldface limits are tested at +25°C. At RL = 500Ω, and VIN = single-ended input on V+ with V− at ground,, unless otherwise noted. VCA810 MIN/MAX OVER TEMPERATURE TYP PARAMETER GAIN CONTROL (VC, Pin 3) CONDITIONS +25°C +25°C (2) 0°C to +70°C (3) –40°C to +85°C (3) UNITS MIN/ MAX TEST LEVEL (1) Single-ended or differential input ΔVC/ΔdB = 25mV/dB ±40 dB typ C Maximum control voltage G = −40dB 0 V typ C Minimum control voltage G = +40dB –2 V typ C −1.8V ≤ VC ≤ −0.2V ±0.4 ±1.5 ±2.5 ±3.5 dB max A VC < −1.8V, VC > −0.2V ±0.5 ±2.2 ±3.7 ±4.7 dB max A −1.8V ≤ VC ≤ −0.2V ±0.02 ±0.03 dB/°C max B VC < −1.8V, VC > −0.2V ±0.03 ±0.04 dB/°C max B db/V typ C Specified gain range Gain accuracy Gain drift Gain control slope –40 Gain control linearity (6) −1.8V ≤ VC ≤ 0V ±0.3 ±1 ±1.1 ±1.2 dB max A VC < −1.8V ±0.7 ±1.6 ±2.5 ±3.2 dB max A 25 20 19 19 MHz min B dB/ns typ C Gain control bandwidth Gain control slew rate 80dB Gain Step 900 Gain settling time 1%, 80dB Step 0.8 ms typ C Input bias current VC = −1V –1.5 –3.5 –4.5 –8 mA max A Gain + Power-supply rejection ratio VC = −2V, G = +40dB, +VS = 5V ±0.5V 0.5 1.5 1.8 2 dB/V max A Gain – Power-supply rejection ratio VC = −2V, G = +40dB, –VS = –5V ±0.5V 0.7 1.5 1.8 2 dB/V max A V typ C Minimum operating voltage ±4 ±4 ±4 V min A Maximum operating voltage ±6 ±6 ±6 V max A POWER SUPPLY Specified operating voltage ±5 Positive supply quiescent current Maximum quiescent current +VS = +5V, G = −40dB 10 12.5 12.6 12.7 mA min A Minimum quiescent current +VS = +5V, G = −40dB 10 7.5 7.2 7.1 mA max A Maximum quiescent current +VS = +5V, G = +40dB 18 20.5 22 22.3 mA min A Minimum quiescent current +VS = +5V, G = +40dB 18 15.5 14.5 13.5 mA max A Maximum quiescent current −VS = −5V, G = −40dB 12 14.5 14.6 14.7 mA max A Minimum quiescent current −VS = −5V, G = −40dB 12 9.5 9.4 9.3 mA min A Maximum quiescent current −VS = −5V, G = +40dB 20 22.5 24.5 24.8 mA max A Minimum quiescent current −VS = −5V, G = +40dB 20 17.5 16.5 16 mA min A Positive power-supply rejection ratio (+PSRR) Input-referred, VC = −2V 90 75 75 73 dB min A Negative power-supply rejection ratio (–PSRR) Input-referred, VC = −2V 85 70 70 68 dB min A –40 to +85 °C typ C 80 °C/W typ C Negative supply quiescent current (7) THERMAL CHARACTERISTICS Specified operating range, ID package Thermal resistance, q JA D (6) (7) 4 SO-8 Junction-to-ambient Maximum deviation from best line fit. Magnitude. Submit Documentation Feedback Copyright © 2003–2010, Texas Instruments Incorporated Product Folder Link(s): VCA810 VCA810 www.ti.com SBOS275F – JUNE 2003 – REVISED DECEMBER 2010 HIGH GRADE DC SPECIFICATIONS: VS = ±5V (VCA810AID) Boldface limits are tested at +25°C. At RL = 500Ω, and VIN = single-ended input on V+ with V− at ground,, unless otherwise noted. VCA810AID MIN/MAX OVER TEMPERATURE TYP PARAMETER CONDITIONS DC PERFORMANCE Single-ended or differential input Output offset voltage −2V < VC < 0V +25°C +25°C (2) 0°C to +70°C (3) –40°C to +85°C (3) UNITS MIN/ MAX TEST LEVEL (1) ±4 ±14 ±24 ±26 mV max A Input offset voltage ±0.1 ±0.2 ±0.25 ±0.3 mV max A Input offset current ±100 ±500 ±600 ±700 mA max A GAIN CONTROL (VC, Pin 3) Single-ended or differential input −1.8V ≤ VC ≤ −0.2V ±0.4 ±0.9 ±1.9 ±2.9 dB max A VC < −1.8V, VC > −0.2V ±0.5 ±1.5 ±3.0 ±4.0 dB max A −1.8V ≤ VC ≤ 0V ±0.3 ±0.6 ±0.7 ±0.8 dB max A VC < −1.8V ±0.7 ±1.1 ±1.9 ±2.7 dB/V max A Maximum quiescent current +VS = +5V, G = −40dB 10 11.5 11.6 11.7 mA min A Minimum quiescent current +VS = +5V, G = −40dB 10 8.5 8.2 8.1 mA max A Maximum quiescent current +VS = +5V, G = +40dB 18 19.5 21 21.3 mA min A Minimum quiescent current +VS = +5V, G = +40dB 18 16.5 15.5 14.5 mA max A Maximum quiescent current −VS = −5V, G = −40dB 12 14 14.1 14.2 mA min A Minimum quiescent current −VS = −5V, G = −40dB 12 10 9.9 9.8 mA max A Maximum quiescent current −VS = −5V, G = +40dB 20 22 24 24.3 mA min A Minimum quiescent current −VS = −5V, G = +40dB 20 18 17 16.5 mA max A Gain accuracy Gain control linearity (4) POWER SUPPLY Positive supply quiescent current Negative supply quiescent current (5) (1) (2) (3) (4) (5) Test levels: (A) 100% tested at +25°C. Over temperature limits set by characterization and simulation. (B) Limits set by characterization and simulation. (C) Typical value; only for information. Junction temperature = ambient for +25°C tested specifications. Junction temperature = ambient at low temperature limit; junction temperature = ambient +30°C at high temperature limit for over temperature specifications. Maximum deviation from best line fit. Magnitude. Submit Documentation Feedback Copyright © 2003–2010, Texas Instruments Incorporated Product Folder Link(s): VCA810 5 VCA810 SBOS275F – JUNE 2003 – REVISED DECEMBER 2010 www.ti.com TYPICAL CHARACTERISTICS: VS = ±5V At RL = 500Ω and VIN = single-ended input on V+ with V− at ground, unless otherwise noted. SMALL−SIGNAL FREQUENCY RESPONSE GAIN CONTROL FREQUENCY RESPONSE 60 3 Gain (dB) 20 RL = 500W VIN = 10mVPP, VOUT = 1VPP 0 VIN = 100mVPP, VOUT = 1VPP -3 Gain (dB) 40 VIN = 1VPP, VOUT = 1VPP 0 VOUT = 2VPP, VIN = 200mVPP -6 -9 -20 -12 VOUT = 2VPP, VIN = 20mVPP -40 -15 -60 VC = -1VDC + 10mVPP -18 1 10 100 1000 1 10 Frequency (MHz) Figure 1. Figure 2. ATTENUATED PULSE RESPONSE HIGH GAIN PULSE RESPONSE 0.6 150 G = +40dB VIN = 2VPP G = -20dB 50 G = -40dB 0 -50 0.2 G = +20dB 0 -0.2 -0.4 -100 -0.6 -150 Time (20ns/div) Time (20ns/div) Figure 3. Figure 4. GAIN CONTROL PULSE RESPONSE 1.2 GAIN vs CONTROL VOLTAGE 60 G = 0dB to -40dB, VIN = 1VDC Specified Operating Range 40 1.0 20 0.8 Gain (dB) Output Voltage (V) VIN = 10mVPP 0.4 Output Voltage (V) Output Voltage (mV) 100 100 Frequency (MHz) 0.6 0.4 0.2 0 -20 -40 Output Disabled for +0.15V £ VC £ +2V -60 0 G = 0dB to +40dB, VIN = 10mVDC -0.2 -80 -100 Time (20ns/div) 0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5 Control Voltage, VC (V) Figure 5. 6 Figure 6. Submit Documentation Feedback Copyright © 2003–2010, Texas Instruments Incorporated Product Folder Link(s): VCA810 VCA810 www.ti.com SBOS275F – JUNE 2003 – REVISED DECEMBER 2010 TYPICAL CHARACTERISTICS: VS = ±5V (continued) At RL = 500Ω and VIN = single-ended input on V+ with V− at ground, unless otherwise noted. HARMONIC DISTORTION vs FREQUENCY VO = 1VPP RL = 500W Harmonic Distortion (dBc) -35 HARMONIC DISTORTION vs RLOAD -20 G = 0dB, Third Harmonic G = 0dB, Third Harmonic Harmonic Distortion (dBc) -30 -40 -45 -50 G = +40dB, Third Harmonic -55 G = +40dB, Second Harmonic -60 -65 -70 -30 -40 G = +40dB, Third Harmonic -50 -60 G = +40dB, Second Harmonic f = 1MHz VO = 1VPP RL = 500W -70 G = 0dB, Second Harmonic -75 G = 0dB, Second Harmonic -80 0.1 1 10 100 1000 Frequency (MHz) Load (W) Figure 7. Figure 8. HARMONIC DISTORTION vs OUTPUT VOLTAGE f = 1MHz RL = 500W Harmonic Distortion (dBc) -30 HARMONIC DISTORTION vs GAIN -20 G = 0dB, Third Harmonic Harmonic Distortion (dBc) -20 -40 G = +40dB, Second Harmonic -50 -60 -70 -80 G = +40dB, Third Harmonic -90 Third Harmonic -40 -50 -60 Second Harmonic -70 G = 0dB, Second Harmonic -100 -80 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 0 1 5 10 15 Figure 9. 35 40 HARMONIC DISTORTION vs ATTENUATION Output Limited Max Useful Input Voltage Range Max Useful Output Voltage Range 0.1 Resulting Output Voltage 30 -20 Harmonic Distortion (dBc) Input/Output Voltage (VPP) Input Limited 25 Figure 10. INPUT/OUTPUT RANGE vs GAIN 10 20 Gain (dB) Output Voltage (VPP) 1 f = 1MHz VO = 1VPP RL = 500W -30 Resulting Input Voltage f = 1MHz VIN = 1VPP RL = 500W -30 Third Harmonic -40 -50 -60 Second Harmonic -70 Input and Output Measured at 1dB Compression -80 0.01 -40 -30 -20 -10 0 10 20 30 40 -40 -35 -30 -25 -20 -15 -10 -5 0 Attenuation (dB) Gain (dB) Figure 11. Figure 12. Submit Documentation Feedback Copyright © 2003–2010, Texas Instruments Incorporated Product Folder Link(s): VCA810 7 VCA810 SBOS275F – JUNE 2003 – REVISED DECEMBER 2010 www.ti.com TYPICAL CHARACTERISTICS: VS = ±5V (continued) At RL = 500Ω and VIN = single-ended input on V+ with V− at ground, unless otherwise noted. NOISE DENSITY vs CONTROL VOLTAGE 10000 Input-Referred Voltage Noise Density INPUT VOLTAGE AND CURRENT NOISE 10 RS = 20W on Each Input en (nV/?Hz) in (pA/?Hz) en (nV/?Hz) eO (nV/?Hz) 1000 100 Differential Input Voltage Noise (2.4nV/ÖHz) Output-Referred Voltage Noise Density 10 Current Noise (1.8pA/ÖHz) Each Input 1 1 0 100 -0.2 -0.4 -0.6 -0.8 -1.0 -1.2 -1.4 -1.6 -1.8 -2.0 1k 10k 100k 1M Control Voltage (V) Frequency (Hz) Figure 13. Figure 14. FULLY ATTENUATED ISOLATION vs FREQUENCY OUTPUT OFFSET VOLTAGE TOTAL ERROR BAND vs GAIN 0 10M 50 40 Output Offset Error (mV) -20 Isolation (dB) VC = +0.1V -40 -60 VC = +0.2V -80 -100 30 Maximum Error Band 20 10 Typical Devices 0 -10 -20 -30 -40 -120 -50 1M 10M 100M -40 -30 -20 -10 Frequency (Hz) Figure 15. TYPICAL GAIN ERROR PLOT 20 30 40 OUTPUT OFFSET VOLTAGE DISTRIBUTION 250 Deviation from -40dB/V Gain Slope Total Tested = 1462 G = +40dB 200 0.2 0.1 0 Count Gain Error (dB) 10 Figure 16. 0.4 0.3 0 Gain (dB) -0.1 150 100 -0.2 -0.3 50 -0.4 0 -0.5 -1 Control Voltage (V) -1.5 -2 <-50 <-45 <-40 <-35 <-30 <-25 <-20 <-15 <-10 <-5 <0 <5 <10 <15 <20 <25 <30 <35 <40 <45 <50 >50 0 -0.5 Output Offset Voltage (mV) Figure 17. 8 Figure 18. Submit Documentation Feedback Copyright © 2003–2010, Texas Instruments Incorporated Product Folder Link(s): VCA810 VCA810 www.ti.com SBOS275F – JUNE 2003 – REVISED DECEMBER 2010 TYPICAL CHARACTERISTICS: VS = ±5V (continued) At RL = 500Ω and VIN = single-ended input on V+ with V− at ground, unless otherwise noted. GROUP DELAY vs GAIN GROUP DELAY vs FREQUENCY 10 10 9 8 8 Group Delay (ns) Group Delay (ns) VO = 1VPP RL = 500W VO = 1VPP RL = 500W 1MHz 7 6 5MHz 5 G = 0dB 6 G = +40dB 4 2 10MHz 4 0 -40 -30 -20 0 -10 10 20 30 1 40 Figure 19. Figure 20. OVERDRIVE RECOVERY AT MAXIMUM GAIN OVERDRIVE RECOVERY AT MAXIMUM ATTENUATION 15 VOUT 1.5 1.0 10x VIN 0.5 0 -0.5 -1.0 -1.5 5 VIN 0 200 -5 -10 -15 -20 -2.0 -25 -2.5 Time (100ns/div) Time (100ns/div) Figure 21. Figure 22. COMMON−MODE REJECTION RATIO AND POWER−SUPPLY REJECTION RATIO vs GAIN COMMON−MODE REJECTION RATIO AND POWER−SUPPLY REJECTION RATIO vs FREQUENCY 110 Input-Referred 100 90 80 CMRR (dB) PSRR (dB) 70 60 50 PSRR 40 CMRR, G = ±40dB 90 CMRR 80 CMRR (dB) PSRR (dB) VOUT 10 Input/Output Voltage (mV) Input/Output Voltage (V) 2.0 100 100 Frequency (MHz) 2.5 110 10 Gain (dB) 70 60 50 30 30 20 20 10 10 0 CMRR, G = 0dB 40 PSRR, G = 0dB PSRR, G = +40dB 0 -40 -30 -20 -10 0 10 20 30 40 0.1 Gain (dB) 1 10 100 Frequency (MHz) Figure 23. Figure 24. Submit Documentation Feedback Copyright © 2003–2010, Texas Instruments Incorporated Product Folder Link(s): VCA810 9 VCA810 SBOS275F – JUNE 2003 – REVISED DECEMBER 2010 www.ti.com TYPICAL CHARACTERISTICS: VS = ±5V (continued) At RL = 500Ω and VIN = single-ended input on V+ with V− at ground, unless otherwise noted. GAIN CONTROL −PSRR AT MAX GAIN 6 5 5 4 4 Gain (dB) Gain (dB) GAIN CONTROL +PSRR AT MAX GAIN 6 3 2 2 1 1 0 0 1k 10k 100k 1M 10M 100M 1k Figure 26. 20 20 19 10 8 5 6 0 4 -5 10x Input Offset Current (IOS) 17 16 14 13 -10 0 -15 11 -20 10 0 25 50 75 100 125 Quiescent Current for -VS 15 2 -2 12 Quiescent Current for +VS 0 -0.5 -1.0 -1.5 -2.0 Control Voltage (V) Temperature (°C) Figure 27. 10 100M 18 Supply Current (mA) Input Bias Current (IB) Output Offset Voltage (mA) 10 10M TYPICAL SUPPLY CURRENT vs CONTROL VOLTAGE 25 15 -25 1M Figure 25. 12 -50 100k Frequency (Hz) Output Offset Voltage (VOS) 14 10k Frequency (Hz) TYPICAL DC DRIFT vs TEMPERATURE 16 Input Bias and Offset Current (mA) 3 Figure 28. Submit Documentation Feedback Copyright © 2003–2010, Texas Instruments Incorporated Product Folder Link(s): VCA810 VCA810 www.ti.com SBOS275F – JUNE 2003 – REVISED DECEMBER 2010 APPLICATION INFORMATION CIRCUIT DESCRIPTION The VCA810 is a high gain adjust range, wideband, voltage amplifier with a voltage-controlled gain, as shown in Figure 29. The circuit’s basic voltage amplifier responds to the control of an internal gain-control amplifier. At its input, the voltage amplifier presents the high impedance of a differential stage, permitting flexible input impedance matching. To preserve termination options, no internal circuitry connects to the input bases of this differential stage. For this reason, the user must provide dc paths for the input base currents from a signal source, either through a grounded termination resistor or by a direct connection to ground. The differential input stage also permits rejection of common-mode signals. At its output, the voltage amplifier presents a low impedance, simplifying impedance matching. An open-loop design produces wide bandwidth at all gain settings. A ground-referenced differential to single-ended conversion at the output retains the low output offset voltage. +5V 6 V+ V- VCA810 1 8 Gain Adjust + X1 5 Thus, G(dB) varies linearly over the specified −40dB to +40dB range as VC varies from 0V to −2V. Optionally, making VC slightly positive (≥ +0.15V) effectively disables the amplifier, giving greater than 80dB of signal path attenuation at low frequencies. Internally, the gain-control circuit varies the amplifier gain by varying the transconductance, gm, of a bipolar transistor using the transistor bias current. Varying the bias currents of differential stages varies gm to control the voltage gain of the VCA810. A gm-based gain adjust normally suffers poor thermal stability. The VCA810 includes circuitry to minimize this effect. VCA810 OPERATION Figure 30 shows the circuit configuration used as the basis of the Electrical Characteristics and Typical Characteristics. Voltage swings reported in the specifications are taken directly at the input and output pins. For test purposes, the input impedance is set to 50Ω with a resistance to ground. A 25Ω resistance (RT) is included on the V− input to get bias current cancellation. Proper supply bypassing is shown in Figure 30, and consists of two capacitors on each supply pin: one large electrolytic capacitor (2.2mF to 6.8mF), effective at lower frequencies, and one small ceramic capacitor (0.1mF) for high-frequency decoupling. For more information on decoupling, refer to the Board Layout section. VOUT +5V -5V 2 VC 0.1mF 0.1mF 6.8mF + 6.8mF + 3 0 ® -2V -40dB ® +40dB Gain 7 -5V Figure 29. Block Diagram of the VCA810 A gain control voltage, VC, controls the amplifier gain magnitude through a high-speed control circuit. Gain polarity can be either inverting or noninverting, depending upon the amplifier input driven by the input signal. The gain control circuit presents the high-input impedance of a noninverting op amp connection. The control voltage pin is referred to ground as shown in Figure 29. The control voltage VC varies the amplifier gain according to the exponential relationship: G(V/V) = 10 1 VI 50W Source RS 50W 8 RT 25W 6 7 2 VCA810 5 3 VO RL 500W RC VC Figure 30. Variable Gain, Specification and Test Circuit -2 (VC + 1) This translates to the log gain relationship: G(dB) = –40 ● (VC + 1)dB. Notice that both inverting and noninverting inputs are connected to ground with a resistor (RS and RT). Matching the dc source impedance looking out of each input will minimize input offset voltage error. Submit Documentation Feedback Copyright © 2003–2010, Texas Instruments Incorporated Product Folder Link(s): VCA810 11 VCA810 SBOS275F – JUNE 2003 – REVISED DECEMBER 2010 www.ti.com RANGE-FINDING TGC AMPLIFIER The block diagram in Figure 31 illustrates the fundamental configuration common to pulse-echo range finding systems. A photodiode preamp provides an initial gain stage to the photodiode. 20W OPA657 VCA810 ADC and DSP 20kW 20W VC charging the holding capacitor. This charge drives the capacitor voltage in a positive direction, reducing the amplifier gain. R3 and the CH largely determine the attack time of this AGC correction. Between gain corrections, resistor R1 charges the capacitor in a negative direction, increasing the amplifier gain. R1, R2, and CH determine the release time of this action. Resistor R2 forms a voltage divider with R1, limiting the maximum negative voltage developed on CH. This limit prevents input overload of the VCA810 gain control circuit. Figure 33 shows the AGC response for the values shown in Figure 32. CF VC -VB 0 t VIN -2V Time-Gain Compensated Control Voltage RSSI Port 2mV to 2V 100kHz VO VCA810 VC R3 1kW HP5082 OPA820 Figure 31. Typical Range-Finding Application WIDE-RANGE AGC AMPLIFIER The voltage-controlled gain feature of the VCA810 makes this amplifier ideal for precision AGC applications with control ranges as large as 60dB. The AGC circuit of Figure 32 adds an op amp and diode for amplitude detection, a hold capacitor to store the control voltage and resistors R1 through R3 that determine attack and release times. Resistor R4 and capacitor CC phase-compensate the AGC feedback loop. The op amp compares the positive peaks of output VO with a dc reference voltage, VR. Whenever a VO peak exceeds VR, the OPA820 output swings positive, forward-biasing the diode and 12 R1 50kW R2 50kW R4 100W VR CH 0.1mF CC 47pF 0.1 VDC V- Figure 32. 60dB Input Range AGC 0.15 Output Voltage (50mV/div) The control voltage VC varies the amplifier gain for a basic signal-processing requirement: compensation for distance attenuation effects, sometimes called time-gain compensation (TGC). Time-gain compensation increases the amplifier gain as the signal moves through the air to compensate for signal attenuation. For this purpose, a ramp signal applied to the VCA810 gain control input linearly increases the dB gain of the VCA810 with time. VOUT PEAK = VR 0.10 0.05 VIN = 1VPP VIN = 100mVPP 0 -0.05 -0.10 VIN = 10mVPP -0.15 -0.20 Time (5ms/div) Figure 33. AGC Output Voltage for 100kHz Sinewave at 10mVPP, 100mVPP, and 1VPP Submit Documentation Feedback Copyright © 2003–2010, Texas Instruments Incorporated Product Folder Link(s): VCA810 VCA810 www.ti.com SBOS275F – JUNE 2003 – REVISED DECEMBER 2010 STABILIZED WEIN-BRIDGE OSCILLATOR Adding Wein-bridge feedback to the above AGC amplifier produces an amplitude-stabilized oscillator. As Figure 34 shows, this alternative requires the addition of just two resistors (RW1, RW2) and two capacitors (CW1, CW2). Connecting the feedback network to the amplifier noninverting input introduces positive feedback to induce oscillation. The feedback factor displays a frequency dependence due to the changing impedances of the CW capacitors. As frequency increases, the decreasing impedance of the CW2 capacitor increases the feedback factor. Simultaneously, the decreasing impedance of the CW1 capacitor decreases this factor. Analysis shows 1 fW = 2 p R WCW Hz, that the maximum factor occurs at making this the frequency most conducive to oscillation. At this frequency, the impedance RW2 300W CW1 4700pF magnitude of CW equals RW, and inspection of the circuit shows that this condition produces a feedback factor of 1/3. Thus, self-sustaining oscillation requires a gain of three through the amplifier. The AGC circuitry establishes this gain level. Following initial circuit turn-on, R1 begins charging CH negative, increasing the amplifier gain from its minimum. When this gain reaches three, oscillation begins at fW; the continued charging effect of R1 makes the oscillation amplitude grow. This growth continues until that amplitude reaches a peak value equal to VR. Then, the AGC circuit counteracts the R1 effect, controlling the peak amplitude at VR by holding the amplifier gain at a level of three. Making VR an ac signal, rather than a dc reference, produces amplitude modulation of the oscillator output. CW2 4700pF f = 1/2pRW1CW1 RW1 = RW2 CW1 = CW2 RW1 300W VO VCA810 VC VOPEAK = VR R3 1kW HP5082 OPA820 R1 50kW R2 50kW CH 1mF R4 100W VR 0.1 VDC CC 10pF V- Figure 34. Amplitude-Stabilized Oscillator Submit Documentation Feedback Copyright © 2003–2010, Texas Instruments Incorporated Product Folder Link(s): VCA810 13 VCA810 SBOS275F – JUNE 2003 – REVISED DECEMBER 2010 www.ti.com LOW-DRIFT WIDEBAND LOG AMP The VCA810 can be used to provide a 2.5MHz (–3dB) log amp with low offset voltage and low gain drift. The exponential gain-control characteristic of the VCA810 permits simple generation of a temperature-compensated logarithmic response. Enclosing the exponential function in an op-amp feedback path inverts this function, producing the log response. Figure 35 shows the practical implementation of this technique. A dc reference voltage, VR, sets the VCA810 inverting input voltage. This configuration makes the amplifier output voltage VOA = −GVR, where G = 10 -2 (VC + 1) produces log-ratio operation. Either way, the log term’s argument constrains the polarities of VR and VIN. These two voltages must be of opposite polarities to ensure a positive argument. This polarity combination results when VR connects to the inverting input of the VCA810. Alternately, switching VR to the amplifier noninverting input removes the minus sign of the log term argument. Then, both voltages must be of the same polarity in order to produce a positive argument. In either case, the positive polarity requirement of the argument restricts VIN to a unipolar range. Figure 36 illustrates these constraints. . 5 4 VR -10mV VOA = -GVR 3 VC ( VOL = - 1 + R1 470W R1 R2 R2 330W VOL OPA820 ) 1 + 0.5 Log(-V Output Voltage (V) VCA810 IN/VR) -2 III 0.01 0.1 1 10 100 Figure 36. Test Result for LOG Amp for VR = −100mV At equilibrium: -2 (VC + 1) (1) The op amp forces this equality by supplying the gain R1 · VOL VC = R 1 + R2 . control voltage, Combining the last two expressions and solving for VOL yields the circuit’s logarithmic response: ( · 1 + 0.5·log ( - VV ( IN R (2) An examination of this result illustrates several circuit characteristics. First, the argument of the log term, −VIN/VR, reveals an option and a constraint. In Figure 35, VR represents a dc reference voltage. Optionally, making this voltage a second signal 14 II I VIN/VR Voltage Ratio A second input voltage also influences VOA through control of gain G. The feedback op amp forces VOA to equal the input voltage VIN connected at the op amp inverting input. Any difference between these two signals drops across R3, producing a feedback current that charges CC. The resulting change in VOL adjusts the gain of the VCA810 to change VOA. R2 R1 -1 -5 0.001 Figure 35. Temperature-Compensated Log Response ( 0 -4 CC 50pF VOL = - 1 + 1 -3 R3 100W VIN VOA = VIN = -VR · 10 2 The above VOL expression reflects a circuit gain introduced by the presence of R1 and R2. This feature adds a convenient scaling control to the circuit. However, a practical matter sets a minimum level for this gain. The voltage divider formed by R1 and R2 attenuates the voltage supplied to the VC terminal by the op amp. This attenuation must be great enough to prevent any possibility of an overload voltage at the VC terminal. Such an overload saturates the VCA810 gain-control circuitry, reducing the amplifier’s gain. For the feedback connection of Figure 35, this overload condition permits a circuit latch. To prevent this, choose R1 and R2 to ensure that the op amp cannot possibly deliver a more negative input than −2.5V to the VC terminal. Figure 36 exhibits three zones of operation described below: Zone I: VC > 0V. The VCA810 is operating in full attenuation (−80dB). The noninverting input of the OPA820 will see ∼0V. VOL is going to be the integration of the input signal. Zone II: −2V < VC < 0V. The VCA810 is in its normal operating mode, creating the log relationship in Equation 2. Submit Documentation Feedback Copyright © 2003–2010, Texas Instruments Incorporated Product Folder Link(s): VCA810 VCA810 www.ti.com SBOS275F – JUNE 2003 – REVISED DECEMBER 2010 Zone III: VC < −2V. The VCA810 control pin is out of range, and some measure should be taken so that it does not exceed –2.5V. A limiting action could be achieved by using a voltage limiting amplifier. LOW-DRIFT, WIDEBAND EXPONENTIAL AMP A common use of the log amp above involves signal compounding. The inverse function, signal expanding, requires an exponential transfer function. The VCA810 produces this latter response directly, as shown in Figure 37. DC reference VR again sets the amplifier input voltage, and the input signal VIN now drives the gain control point. Resistors R1 and R2 attenuate this drive to prevent overloading the gain control input. Setting these resistors at the same values as in the preceding log amp produces an exponential amplifier with the inverse function of the log amp. VR -10mV VCA810 VOL = -VR x 10 +0.5V VI R2 330W -2 ( VOLTAGE-CONTROLLED LOW-PASS FILTER In the circuit of Figure 39, the VCA810 serves as the variable-gain element of a voltage-controlled low-pass filter. This section discusses how this implementation expands the circuit voltage swing capability over that normally achieved with the equivalent multiplier implementation. The circuit response pole responds to control voltage VC according to the relationship in Equation 3: G fP = 2pR2C (3) where G = 10 With the components shown, the circuit provides a linear variation of the low-pass cutoff from 300Hz to 1MHz. R2 330W ( R1VIN +1 R1 + R2 VC C 0.047mF R1 330W VI OPA698 R1 470W VL OPA820 -3.4V 500W -2 (VC + 1) 500W VOA VO VCA810 VIN Figure 37. Exponential Amplifier VC Testing the circuit given in Figure 37 gives the exponential response shown in Figure 38. 1 VO = - R 2 · R1 VI fP = 1 1+s R 2C 2 G G 2pR2C -2 (VC + 1) Output Voltage (V) G = 10 0.1 Figure 39. Tunable Low-Pass Filter 0.01 0.001 +3.0 +2.5 +2.0 +1.5 +1.0 +0.5 Input Voltage (V) Figure 38. Exponential Amplifier Response 0 The response control results from amplification of the feedback voltage applied to R2. First, consider the case where the VCA810 produces G = 1. Then, the circuit performs as if this amplifier were replaced by a short circuit. Visually doing so leaves a simple voltage amplifier with a feedback resistor bypassed by a capacitor. This basic circuit produces a response G fP = 2 p R2C . pole at Submit Documentation Feedback Copyright © 2003–2010, Texas Instruments Incorporated Product Folder Link(s): VCA810 15 VCA810 SBOS275F – JUNE 2003 – REVISED DECEMBER 2010 www.ti.com For G > 1, the circuit applies a greater voltage to R2, increasing the feedback current this resistor supplies to the summing junction of the OPA820. The increased feedback current produces the same result as if R2 had been decreased in value in the basic circuit described above. Decreasing the effective R2 resistance moves the circuit pole to a higher G fP = 2 p R2C response frequency, producing the control. Finite loop gain and a signal-swing limitation set performance boundaries for the circuit. Both limitations occur when the VCA810 attenuates, rather than amplifies, the feedback signal. These two limitations reduce the circuit’s utility at the lower extreme of the VCA810 gain range. For −1 ≤ VC ≤ 0, this amplifier produces attenuating gains in the range from 0dB to −40dB. This range directly reduces the net gain in the circuit’s feedback loop, increasing gain error effects. Additionally, this attenuation transfers an output swing limitation from the OPA820 output to the overall circuit’s output. Note that OPA820 output voltage, VOA, relates to VO through the expression, VO = G ● VOA. Thus, a G < 1 limits the maximum VO swing to a value less than the maximum VOA swing. Figure 40 shows the low-pass frequency for different control voltages. 3 0 VC = -2V Gain (dB) -3 VC = -1.4V TUNABLE EQUALIZER A circuit analogous to the above low-pass filter produces a voltage-controlled equalizer response. The gain control provided by the VCA810 of Figure 41 varies this circuit response zero from 1Hz to 10kHz, according to the relationship of Equation 4: G fZ ≈ 2pGR1C (4) To visualize the circuit’s operation, consider a circuit condition and an approximation that permit replacing the VCA810 and R3 with short circuits. First, consider the case where the VCA810 produces G = 1. Replacing this amplifier with a short circuit leaves the operation unchanged. In this shorted state, the circuit is simply a voltage amplifier with an R-C bypass around R1. The resistance of this bypass, R3, serves only to phase-compensate the circuit, and practical factors make R3 << R1. Neglecting R3 for the moment, the circuit becomes just a voltage amplifier with a capacitive bypass of R1. This circuit produces 1 fZ ≈ 2 p R 1C . a response zero at Adding the VCA810 as shown in Figure 41 permits amplification of the signal applied to capacitor C, and produces voltage control of the frequency fZ. Amplified signal voltage on C increases the signal current conducted by the capacitor to the op amp feedback network. The result is the same as if C had been increased in value to GC. Replacing C with this effective capacitance value produces the circuit 1 fZ ≈ 2 p R 1GC . control expression -6 VC = -1.6V VC = -1.8V R1 750W -9 R2 750W OPA820 VI 50W -12 VCA810 -15 10k 100k 1M VOA C 2 mF R3 3W OPA846 10M VO Frequency (Hz) 50W VC Figure 40. Voltage-Controlled Low-Pass Filter Frequency Response fZ ≈ 1 2p(GR1 + R3C) with G = 10 -2 (VC + 1) Figure 41. Tunable Equalizer 16 Submit Documentation Feedback Copyright © 2003–2010, Texas Instruments Incorporated Product Folder Link(s): VCA810 VCA810 www.ti.com SBOS275F – JUNE 2003 – REVISED DECEMBER 2010 Another factor limits the high-frequency performance of the resulting high-pass filter: the finite bandwidth of the op amp. This limits the frequency duration of the equalizer response. Limitations such as bandwidth and stability are clearly shown in Figure 42. 100 AOL 90 G = +40dB 80 Gain (dB) 70 G = +15dB VOLTAGE-CONTROLLED BAND-PASS FILTER The variable gain of the VCA810 also provides voltage control over the center frequency of a band-pass filter. As shown in Figure 43, this filter follows from the state-variable configuration with the VCA810 replacing the inverter common to that configuration. Variation of the VCA810 gain moves the filter’s center frequency through a 100:1 range following the relationship of Equation 5: 60 10-(V + 1) 2pRC C fO = 50 40 G = -15dB 30 20 G = -40dB 10 0 1 10 100 1k 10k 100k 1M 10M 100M Frequency (Hz) Figure 42. Amplifier Noise Gain and AOL for Different Gain Other limitations of this circuit are stability versus VCA810 gain and input signal level for the circuit. Figure 42 also illustrates these two factors. As the VCA810 gain increases, the crossover slope between the AOL curve of the OPA846 and noise gain will be greater than 20dB/decade, rendering the circuit unstable. The signal level for high gain of the VCA810 will meet two limitations: the output voltage swings of both the VCA810 and the OPA846. The expression VOA = GVI relates these two voltages. Thus, an output voltage limit VOAL constrains the input voltage to VI ≤ VOAL/G. With the components shown, BW = 50kHz. This bandwidth provides an integrator response duration of four decades of frequency for fZ = 1Hz, dropping to one decade for fZ = 10kHz. (5) As before, variable gain controls a circuit time constant to vary the filter response. The gain of the VCA810 amplifies or attenuates the signal driving the lower integrator of the circuit. This amplification alters the effective resistance of the integrator time constant, producing the response of Equation 6: - s VO nRC = VI G s s2 + nRC + 2 2 RC (6) Evaluation of this response equation reveals a passband gain of AO = –1, a bandwidth of BW = - (VC + 1) 1/(2pRC), and a selectivity of Q = n · 10 . Note that variation of control voltage VC alters Q but not bandwidth. The gain provided by the VCA810 restricts the output swing of the filter. Output signal VO must be constrained to a level that does not drive the VCA810 output, VOA, into its saturation limit. Note that these two outputs have voltage swings related by VOA = GVO. Thus, a swing limit VOAL imposes a circuit output limit of VOL ≤ VOAL/G. See Figure 44 for the frequency response for two different gain conditions of the schematic shown in Figure 43. In particular, notice the center frequency shift and the selectivity of Q changing as the gain is increased. Submit Documentation Feedback Copyright © 2003–2010, Texas Instruments Incorporated Product Folder Link(s): VCA810 17 VCA810 SBOS275F – JUNE 2003 – REVISED DECEMBER 2010 www.ti.com C 0.047mF nR 5kW nR 5kW VO = VI VI R 330W s nRC G s s2 + nRC + 2 2 RC - 10-(V + 1) 2pRC C 1/2 OPA2822 fO = VO C 0.047mF BW = 50W R 330W 1/2 OPA2822 VOA 1 2pRC Q = n·10 -(VC + 1) VCA810 AO = -1 50W VC Figure 43. Tunable Band-Pass Filter 0 -5 -10 Gain (dB) -15 -20 -25 -30 -35 -40 -45 -50 100 1k 10k 100k Frequency (Hz) Figure 44. Tunable Band-Pass Filter Response 18 Submit Documentation Feedback Copyright © 2003–2010, Texas Instruments Incorporated Product Folder Link(s): VCA810 VCA810 www.ti.com SBOS275F – JUNE 2003 – REVISED DECEMBER 2010 DESIGN-IN TOOLS MACROMODELS AND APPLICATIONS SUPPORT DEMONSTRATION BOARDS A printed circuit board (PCB) is available to assist in the initial evaluation of circuit performance using the VCA810. This evaluation board (EVM) is available free, as an unpopulated PCB delivered with descriptive documentation. The summary information for this board is shown in Table 1. Table 1. EVM Ordering Information PRODUCT PACKAGE BOARD PART NUMBER VCA810ID SO-8 DEM-VCA-SO-1A LITERATURE REQUEST NUMBER SBOU025 Computer simulation of circuit performance using SPICE is often useful when analyzing the performance of analog circuits and systems. This is particularly true for video and RF amplifier circuits where parasitic capacitance and inductance can play a major role in circuit performance. A SPICE model for the VCA810 is available through the TI web page. The applications group is also available for design assistance. The models available from TI predict typical small-signal ac performance, transient steps, dc performance, and noise under a wide variety of operating conditions. The models include the noise terms found in the electrical specifications of the relevant product data sheet. Go to the Texas Instruments website (www.ti.com) to request an evaluation board through the VCA810 product folder. OPERATING SUGGESTIONS INPUT/OUTPUT RANGE The VCA810’s 80dB gain range allows the user to handle an exceptionally wide range of input signal levels. If the input and output voltage range specifications are exceeded, however, signal distortion and amplifier overdrive will occur. The VCA810 maximum input and output voltage range is best illustrated in the Typical Characteristics plot, Input/Output Range vs Gain (Figure 11). This chart plots input and output voltages versus gain in dB. The maximum input voltage range is the largest at full attenuation (−40dB) and decreases as the gain increases. Similarly, the maximum useful output voltage range increases as the input decreases. We can distinguish three overloading issues as a result of the operating mode: high attenuation, mid-range gain-attenuation, and high gain. From –40dB to –10dB, gain overdriving the input stage is the only method to overdrive the VCA810. Preventing this type of overdrive is achieved by limiting the input voltage range. From –10dB to +40dB, overdriving can be prevented by limiting the output voltage range. There are two limiting mechanisms operating in this situation. From –10dB to +10dB, an internal stage is the limiting factor; from +10dB to +40dB, the output stage is the limiting factor. Output overdriving occurs when either the maximum output voltage swing or output current is exceeded. The VCA810 high output current of ±60mA ensures that virtually all output overdrives will be limited by voltage swing rather than by current limiting. Table 2 summarizes these overdrive conditions. Table 2. Output Signal Compression GAIN RANGE LIMITING MECHANISM TO PREVENT, OPERATE DEVICE WITHIN: −40dB < G < −10dB Input Stage Overdrive Input Voltage Range −10dB < G < +10dB Internal Stage Overdrive Output Voltage Range +5dB < G < +40dB Output Stage Overdrive Output Voltage Range OVERDRIVE RECOVERY As shown in the Typical Characteristics plot, Input/Output Range vs Gain (Figure 11), the onset of overdrive occurs whenever the actual output begins to deviate from the ideal expected output. If possible, the user should operate the VCA810 within the linear regions shown in order to minimize signal distortion and overdrive delay time. However, instances of amplifier overdrive are quite common in automatic gain control (AGC) circuits, which involve the application of variable gain to input signals of varying levels. The VCA810 design incorporates circuitry that allows it to recover from most overdrive conditions in 200ns or less. Overdrive recovery time is defined as the time required for the output to return from overdrive to linear operation, following the removal of either an input or gain-control overdrive signal. The overdrive plots for maximum gain and maximum attenuation are shown in the Typical Characteristics. Submit Documentation Feedback Copyright © 2003–2010, Texas Instruments Incorporated Product Folder Link(s): VCA810 19 VCA810 SBOS275F – JUNE 2003 – REVISED DECEMBER 2010 www.ti.com OUTPUT OFFSET ERROR OFFSET ADJUSTMENT Several elements contribute to the output offset voltage error; among them are the input offset voltage, the output offset voltage, the input bias current and the input offset current. To simplify the following analysis, the output offset voltage error is dependent only on the output-offset voltage of the VCA810 and the input offset voltage. The output offset error can then be expressed as Equation 7: Where desired, the offset of the VCA810 can be removed as shown in Figure 46. This circuit simply presents a dc voltage to one of the amplifier inputs to counteract the offset error voltage. For best offset performance, the trim adjustment should be made with the amplifier set at the maximum gain of the intended application. The offset voltage of the VCA810 varies with gain as shown in Figure 45, limiting the complete offset cancellation to one selected gain. Selecting the maximum gain optimizes offset performance for higher gains where high amplification of the offset effects produces the greatest output offset. Two features minimize the offset control circuit noise contribution to the amplifier input circuit. First, making the resistance of R2 a low value minimizes the noise directly introduced by the control circuit. This approach reduces both the thermal noise of the resistor and the noise produced by the resistor with the amplifier input noise current. A second noise reduction results from capacitive bypass of the potentiometer output. This reduction filters out power-supply noise that would otherwise couple to the amplifier input. G ( ( + 10 20 · V dB VOS = VOSO (7) IOS Where: • VOS = Output offset error • VOSO = Output offset voltage • GdB = VCA810 gain in dB • VIOS = Input offset voltage This is shown in Figure 45. 50 Output Offset Error (mV) 40 30 Maximum Error Band 20 10 V+ Typical Devices R1 VIN 10kW 0 RV 100kW -10 -20 -30 V- -40 1 mF VCA810 R2 10W VO VC -50 -40 -30 -20 -10 0 10 20 30 40 Gain (dB) Figure 46. Optional Offset Adjustment Figure 45. Output Offset Error versus Gain The histogram Output Offset Voltage at Maximum Gain (Figure 18) in the Typical Characteristics curves shows the distribution for the output offset voltage at maximum gain. 20 This filtering action diminishes as the wiper position approaches either end of the potentiometer, but practical conditions prevent such settings. Over its full adjustment range, the offset control circuit produces a ±5mV input offset correction for the values shown. However, the VCA810 only requires one-tenth of this range for offset correction, assuring that the potentiometer wiper will always be near the potentiometer center. With this setting, the resistance seen at the wiper remains high, which stabilizes the filtering function. Submit Documentation Feedback Copyright © 2003–2010, Texas Instruments Incorporated Product Folder Link(s): VCA810 VCA810 www.ti.com SBOS275F – JUNE 2003 – REVISED DECEMBER 2010 GAIN CONTROL NOISE PERFORMANCE The VCA810 gain is controlled by means of a unipolar negative voltage applied between ground and the gain control input, pin 3. If use of the output disable feature is required, a ground-referenced bipolar voltage is needed. Output disable occurs for +0.15V ≤ VC ≤ +2V, and produces greater than 80dB of attenuation. The control voltage should be limited to +2V in disable mode, and –2.5V in gain mode in order to prevent saturation of internal circuitry. The VCA810 gain-control input has a –3dB bandwidth of 25MHz and varies with frequency, as shown in the Typical Characteristics curves. This wide bandwidth, although useful for many applications, can allow high-frequency noise to modulate the gain control input. In practice, this can be easily avoided by filtering the control input, as shown in Figure 47. RP should be no greater than 100Ω so as not to introduce gain errors by interacting with the gain control input bias current of 6mA. The VCA810 offers 2.4nV/√Hz input-referred voltage noise and 1.8 pA/√Hz input-referred current noise at a gain of +40dB. The input-referred voltage noise, and the input-referred current noise terms, combine to give low output noise under a wide variety of operating conditions. Figure 48 shows the op amp noise analysis model with all the noise terms included. In this model, all noise terms are taken to be noise voltage or current density terms in either nV/√Hz or pA/√Hz. +5V IBN * RS ERS 4kTRS IBI - * EO VC RT * VO VCA610 VCA810 ENI -5V 4kTRT CP f-3dB = 1 2pRPCP Figure 48. VCA810 Noise Analysis Model RP VC Figure 47. Control Line Filtering GAIN CONTROL AND TEEPLE POINT When the VCA810 control voltage reaches −1.5V, also referred to as the Teeple point, the signal path undergoes major changes. From 0V to the Teeple point, the gain is controlled by one bank of amplifiers: a low-gain VCA. As the Teeple point is passed, the signal path is switched to a higher gain VCA. This gain-stage switching can be seen most clearly in the Noise Density vs Control Voltage Typical Characteristics curve (Figure 13). The output-referred voltage noise density increases proportionally to the control voltage and reaches a maximum value at the Teeple point. As the gain increases and the internal stages switch, the output-referred voltage noise density drops suddenly and restarts its proportional increase with the gain. The total output spot noise voltage can be computed as the square root of the sum of all squared output noise voltage contributors. Equation 8 shows the general form for the output noise voltage using the terms shown in Figure 48. EO = G(V/V)· 2 2 2 ENI + (IBIRT) + (IBNRS) + 4kT(RS + RT) (8) Dividing this expression by the gain will give the equivalent input-referred spot-noise voltage at the noninverting input as shown by Equation 9. EN = 2 ENI2 + (IBIRT)2 + (IBNRS) + 4kT(RS + RT) (9) Evaluating these two equations for the VCA810 circuit and component values shown in Figure 30 (maximizing gain) will give a total output spot-noise voltage of 272.3nV√Hz and a total equivalent input-referred spot-noise voltage of 2.72nV√Hz. This total input-referred spot-noise voltage is higher than the 2.4nV√Hz specification for the VCA810 alone. This reflects the noise added to the output by the input current noise times the input resistance RS and RT. Keeping input impedance low is required to maintain low total equivalent input-referred spot-noise voltage. Submit Documentation Feedback Copyright © 2003–2010, Texas Instruments Incorporated Product Folder Link(s): VCA810 21 VCA810 SBOS275F – JUNE 2003 – REVISED DECEMBER 2010 www.ti.com THERMAL ANALYSIS The VCA810 will not require heatsinking or airflow in most applications. Maximum desired junction temperature would set the maximum allowed internal power dissipation as described in this section. In no case should the maximum junction temperature be allowed to exceed +150°C. Operating junction temperature (TJ) is given by Equation 10: TJ = TA + PD ´ qJA (10) The total internal power dissipation (PD) is the sum of quiescent power (PDQ) and additional power dissipated in the output stage (PDL) to deliver load power. Quiescent power is simply the specified no-load supply current times the total supply voltage across the part. PDL depends on the required output signal and load; for a grounded resistive load, however, it is at a maximum when the output is fixed at a voltage equal to one-half of either supply voltage (for equal bipolar supplies). Under this worst-case condition, PDL = VS.2/(4 ● RL), where RL is the resistive load. Note that it is the power in the output stage and not in the load that determines internal power dissipation. As a worst-case example, compute the maximum TJ using an VCA810ID (SO-8 package) in the circuit of Figure 30 operating at maximum gain and at the maximum specified ambient temperature of +85°C. PD = 10V(24.8mA) + 52/(4 ● 500Ω) = 260.5mW Maximum TJ = +85°C + (0.260W ● +125°C/W) = 117.6°C This maximum operating junction temperature is well below most system level targets. Most applications will be lower since an absolute worst-case output stage power was assumed in this calculation of VS/2 which is beyond the output voltage range for the VCA810. BOARD LAYOUT Achieving optimum performance with a high-frequency amplifier such as the VCA810 requires careful attention to board layout parasitic and external component types. Recommendations that will optimize performance include: a) Minimize parasitic capacitance to any ac ground for all of the signal I/O pins. This includes the ground pin (pin 2). Parasitic capacitance on the output can cause instability: on both the inverting input and the noninverting input, it can react with the source impedance to cause unintentional band limiting. To 22 reduce unwanted capacitance, a window around the signal I/O pins should be opened in all of the ground and power planes around those pins. Otherwise, ground and power planes should be unbroken elsewhere on the board. Place a small series resistance (> 25Ω) with the input pin connected to ground to help decouple package parasitic. b) Minimize the distance (less than 0.25” or 6.35mm) from the power-supply pins to high-frequency 0.1mF decoupling capacitors. At the device pins, the ground and power plane layout should not be in close proximity to the signal I/O pins. Avoid narrow power and ground traces to minimize inductance between the pins and the decoupling capacitors. The power-supply connections should always be decoupled with these capacitors. Larger (2.2mF to 6.8mF) decoupling capacitors, effective at lower frequencies, should also be used on the main supply pins. These capacitors may be placed somewhat farther from the device and may be shared among several devices in the same area of the PCB. c) Careful selection and placement of external components will preserve the high-frequency performance of the VCA810. Resistors should be a very low reactance type. Surface-mount resistors work best and allow a tighter overall layout. Metal-film and carbon composition, axially-leaded resistors can also provide good high-frequency performance. Again, keep the leads and PCB trace length as short as possible. Never use wire-wound type resistors in a high-frequency application. Since the output pin is the most sensitive to parasitic capacitance, always position the series output resistor, if any, as close as possible to the output pin. Other network components, such as inverting or noninverting input termination resistors, should also be placed close to the package. d) Connections to other wideband devices on the board may be made with short direct traces or through onboard transmission lines. For short connections, consider the trace and the input to the next device as a lumped capacitive load. Relatively wide traces (50mils to 100mils, or 1.27mm to 2.54mm) should be used, preferably with ground and power planes opened up around them. e) Socketing a high-speed part like the VCA810 is not recommended. The additional lead length and pin-to-pin capacitance introduced by the socket can create an extremely troublesome parasitic network, which can make it almost impossible to achieve a smooth, stable frequency response. Best results are obtained by soldering the VCA810 onto the board. Submit Documentation Feedback Copyright © 2003–2010, Texas Instruments Incorporated Product Folder Link(s): VCA810 VCA810 www.ti.com SBOS275F – JUNE 2003 – REVISED DECEMBER 2010 INPUT AND ESD PROTECTION The VCA810 is built using a very high-speed complementary bipolar process. The internal junction breakdown voltages are relatively low for these very small geometry devices. These breakdowns are reflected in the Absolute Maximum Ratings table. All pins on the VCA810 are internally protected from ESD by means of a pair of back-to-back, reverse-biased diodes to either power supply, as shown in Figure 49. These diodes begin to conduct when the pin voltage exceeds either power supply by about 0.7V. This situation can occur with loss of the amplifier power supplies while a signal source is still present. The diodes can typically withstand a continuous current of 30mA without destruction. To ensure long-term reliability, however, diode current should be externally limited to 10mA whenever possible. +VS ESD Protection diodes internally connected to all pins. External Pin Internal Circuitry -VS Figure 49. Internal ESD Protection REVISION HISTORY NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision E (August, 2008) to Revision F Page • Updated document format to current standards ................................................................................................................... 1 • Deleted lead temperature specification from Absolute Maximum Ratings table .................................................................. 2 • Corrected typo in Figure 30 ................................................................................................................................................ 11 Changes from Revision D (February, 2006) to Revision E Page • Changed rails quantity from 100 to 75. ................................................................................................................................. 2 • Changed storage temperature minimum value in Absolute Maximum Ratings table from –40°C to –65°C ........................ 2 Submit Documentation Feedback Copyright © 2003–2010, Texas Instruments Incorporated Product Folder Link(s): VCA810 23 PACKAGE OPTION ADDENDUM www.ti.com 28-Sep-2010 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) VCA810AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Request Free Samples VCA810AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Request Free Samples VCA810AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Purchase Samples VCA810AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Purchase Samples VCA810ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Request Free Samples VCA810IDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Request Free Samples VCA810IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Purchase Samples VCA810IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Purchase Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 28-Sep-2010 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant VCA810AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 VCA810IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) VCA810AIDR SOIC D 8 2500 367.0 367.0 35.0 VCA810IDR SOIC D 8 2500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily performed. TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications. In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements. Nonetheless, such components are subject to these terms. No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties have executed a special agreement specifically governing such use. Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI has specifically designated certain components which meet ISO/TS16949 requirements, mainly for automotive use. Components which have not been so designated are neither designed nor intended for automotive use; and TI will not be responsible for any failure of such components to meet such requirements. Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2012, Texas Instruments Incorporated