TPS7A6201-Q1 www.ti.com SLVSAA0B – NOVEMBER 2010 – REVISED MARCH 2012 300-mA 40-V LOW-DROPOUT REGULATOR WITH 25-µA QUIESCENT CURRENT Check for Samples: TPS7A6201-Q1 FEATURES 1 • • • • • • • • DESCRIPTION Low Dropout Voltage – 300mV at IOUT = 150mA 4-V to 40-V Wide Input Voltage Range With up to 45-V Transients 300-mA Maximum Output Current Ultra Low Quiescent Current – IQUIESCENT = 25 µA (Typ) at Light Loads – ISLEEP < 2 µA when EN = Low 2.5-V to 7-V Programmable Output Voltage Low-ESR Ceramic Output Stability Capacitor Integrated Fault Protection – Short-Circuit/Over-Current Protection – Thermal Shutdown Low Input Voltage Tracking Thermally Enhanced Power Package – 5-pin TO-263 (KTT /D2PAK) The TPS7A6201 is a low dropout linear voltage regulator designed for low power consumption and quiescent current less than 25 µA in light load applications. This device features an integrated overcurrent protection, and is designed to achieve stable operation even with low-ESR ceramic output capacitors. The output voltage can be programmed using external resistors. Low voltage tracking feature allows for a smaller input capacitor and can possibly eliminate the need of using a boost converter during cold crank conditions. Because of these features, this device is well suited in power supplies for various automotive applications. TYPICAL REGULATOR STABILITY 10 VIN = 14V COUT = 10µF, 47µF TA = 27°C VOUT = 5V, 3.3V ESR of COUT (Ω) • APPLICATIONS • • • • Qualified for Automotive Applications Infotainment Systems with Sleep Mode Body Control Modules Always ON Battery Applications – Gateway Applications – Remote Keyless Entry Systems – Immobilizers 1 Stable Operation Over Entire Region 0.1 0.01 0.01 0.1 1 10 100 300 IOUT (mA) Figure 1. ESR vs Load Current for TPS7A6201 TYPICAL APPLICATION SCHEMATIC TPS7A6201 VIN VIN VOUT R1 CIN EN VEN VOUT COUT FB R2 GND Figure 2. Application Schematic 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2010–2012, Texas Instruments Incorporated TPS7A6201-Q1 SLVSAA0B – NOVEMBER 2010 – REVISED MARCH 2012 www.ti.com ORDERING INFORMATION (1) PACKAGE 5 pin KTT (1) (2) TOP SIDE MARKING ORDERABLE PART NUMBER (2) 7A6201Q1 TPS7A6201QKTTRQ1 Reel of 500 For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) NO. DESCRIPTION VALUE UNIT -0.3 to 45 V Regulated output 7 V Feedback voltage -0.3 to 7 V Thermal impedance junction to exposed pad KTT (D2PAK) package 10.4 °C/W θJA Thermal impedance junction to ambient KTT (D2PAK) package (3) 30.2 °C/W 1.6 θJA Thermal impedance junction to ambient KTT (D2PAK) package (4) 34.4 °C/W 1.7 ESD Electrostatic discharge (Human Body Model) (5) 2 kV 1.8 TOP Operating ambient temperature -40 to +125 °C 1.9 TS Storage temperature range -65 to +150 °C 1.10 TLEAD Lead temperature (soldering, 10sec) 260 °C 1.1 VIN, VEN Unregulated inputs (2) 1.2 VOUT 1.3 VFB 1.4 θJP 1.5 (1) (2) (3) (4) (5) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to GND. Absolute maximum voltage for duration less than 480ms. The thermal data is based on JEDEC standard high K profile – JESD 51-5. The copper pad is soldered to the thermal land pattern. Also correct attachment procedure needs to be incorporated. The thermal data is based on JEDEC standard low K profile – JESD 51-3. The copper pad is soldered to the thermal land pattern. Also correct attachment procedure needs to be incorporated. Tested in accordance with JEDEC Standard 22, Test Method A114-A (100pF capacitor discharged through a 1.5kΩ resistor into each pin). DISSIPATION RATINGS NO. JEDEC STANDARD PACKAGE TA < 25°C POWER RATING (W) DERATING FACTOR ABOVE TA = 25°C (°C/W) TA = 85°C POWER RATING (W) 2.1 JEDEC Standard PCB - low K, JESD 51-3 5 pin KTT 3.63 34.4 1.89 2.2 JEDEC Standard PCB - high K, JESD 51-5 5 pin KTT 4.14 30.2 2.15 RECOMMENDED OPERATING CONDITIONS NO. 2 DESCRIPTION 3.1 VIN, VEN Unregulated input voltage 3.2 TJ Operating junction temperature range MIN MAX 4 40 UNIT V -40 150 °C Copyright © 2010–2012, Texas Instruments Incorporated TPS7A6201-Q1 www.ti.com SLVSAA0B – NOVEMBER 2010 – REVISED MARCH 2012 ELECTRICAL CHARACTERISTICS VIN = 14V, TJ = -40ºC to 150ºC (unless otherwise noted) NO. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 4. Input Voltage (VIN pin) 4.1 VIN Input voltage 4 40 V 40 µA 3 µA 4.2 IQUIESCENT Quiescent current VIN = 8.2V to 18V, VEN = 5V, IOUT = 0.01mA to 0.75mA 4.3 ISLEEP Sleep/shutdown current VIN = 8.2V to 18V, VEN < 0.8V, IOUT = 0mA (no load), TA = 125°C 4.4 VIN-UVLO Under voltage lock out voltage Ramp VIN down until output is turned OFF 3.16 V 4.5 VIN(POWERUP) Power up voltage Ramp VIN up until output is turned ON 3.45 V 25 5. Enable Input (EN pin) 5.1 VIL Logic input low level 5.2 VIH Logic input high level 0 0.8 V 2.5 40 V -2 2 % VIN = 6V to 28V, IOUT = 10mA, VOUT = 7V 15 mV [VIN = 6V to 28V, IOUT = 10mA, VOUT = 3.3V ] (1) 20 mV IOUT = 10mA to 300mA, VIN= 14V, VOUT = 7V 25 mV [IOUT = 10mA to 300mA,VIN = 14V, VOUT = 3.3V ] (1) 35 mV 6. Regulated Output Voltage (VOUT pin) 6.1 VREF Internal Reference Voltage IOUT = 10mA to 300mA, VIN= VOUT + 1V to 16V 6.2 ∆VLINE-REG Line regulation 6.3 ∆VLOAD-REG Load regulation 6.4 VDROPOUT (2) Dropout voltage (VIN – VOUT) IOUT = 250mA 500 mV IOUT = 150mA 300 mV 6.5 RSW (1) Switch resistance VIN to VOUT resistance 6.6 IOUT Output current VOUT in regulation 6.7 ICL Output current limit VOUT = 0V (VOUT pin is shorted to ground) 6.8 PSRR (1) Power supply ripple rejection 2 Ω 0 300 mA 350 1000 mA VIN-RIPPLE = 0.5 Vpp, IOUT = 300mA, frequency = 100 Hz, VOUT = 5V and VOUT = 3.3V 60 VIN-RIPPLE = 0.5 Vpp, IOUT = 300mA, frequency = 150 kHz, VOUT = 5V and VOUT = 3.3V 30 dB 7. Operating Temperature Range 7.1 TJ Operating junction temperature 7.2 TSHUTDOWN Thermal shutdown trip point 7.3 THYST Thermal shutdown hysteresis (1) (2) -40 150 ºC 165 ºC 10 ºC Specified by design – not tested This test is done with VOUT is in regulation and VIN – VOUT parameter is measured when VOUT (programmned output voltage, ex. 5V or 3.3V) drops by 100mV at specified loads. Copyright © 2010–2012, Texas Instruments Incorporated 3 TPS7A6201-Q1 SLVSAA0B – NOVEMBER 2010 – REVISED MARCH 2012 www.ti.com DEVICE INFORMATION KTT PACKAGE (TOP VIEW) 1 2 3 4 VIN EN GND FB 5 VOUT TERMINAL FUNCTIONS NO. 4 NAME TYPE DESCRIPTION 1 VIN I Input voltage pin: The unregulated input voltage is supplied to this pin. A bypass capacitor shall be connected between VIN pin and GND pin to dampen input line transients. 2 EN I Enable pin: This is a high voltage tolerant input pin with an internal pull down. A high input to this pin activates the device and turns the regulator ON. This input can be connected to VIN terminal for self bias applications. If this pin is not connected, the device will stay disabled. 3 GND I/O 4 FB I Feedback pin: This pin is used to connect external resistors to ground in order to program the output voltage. 5 VOUT O Regulated output voltage pin: This is a regulated output voltage pin with a limitation on maximum output current. An external resistor divider is connected at this pin to program the output voltage. In order to achieve stable operation and prevent oscillation, an external output capacitor (COUT) with low ESR shall be connected between this pin and GND pin. Ground pin: This is signal ground pin of the IC. Copyright © 2010–2012, Texas Instruments Incorporated TPS7A6201-Q1 www.ti.com SLVSAA0B – NOVEMBER 2010 – REVISED MARCH 2012 FUNCTIONAL BLOCK DIAGRAM VIN VIN Band Gap VRef1 Temp. Sensor/ Thermal Shutdown CIN UVLO Comp. with internal reference Q1 VRef1 Logic Control Regulator Error Amp. Control VOUT VEN VOUT EN COUT R1 Over Current Detection FB Charge Pump Oscillator R2 GND Figure 3. TPS7A6201 Functional Block Diagram Copyright © 2010–2012, Texas Instruments Incorporated 5 TPS7A6201-Q1 SLVSAA0B – NOVEMBER 2010 – REVISED MARCH 2012 www.ti.com TYPICAL CHARACTERISTICS Graphs shown in 'Typical Characteristics' section for unreleased devices are for preview only. 10 VIN = 14V COUT = 1µF TA = 27°C VOUT = 5V VIN = 14V COUT = 1µF TA = 27°C VOUT = 3.3V ESR of COUT (Ω) ESR of COUT (Ω) 10 1 Stable Operation 0.1 0.06 1 Stable Operation 0.1 Unstable Operation 0.06 0.03 0.01 0.01 Unstable Operation 0.1 1 IOUT (mA) 10 30 100 0.03 0.01 0.01 300 Figure 4. ESR vs Load Current 0.1 1 IOUT (mA) 10 IOUT = 1mA 50 IQUIESCENT (µA) I QUIESCENT (µA) 40 30 VIN = 14V TA = 25°C VOUT = 5V, 3.3V VOUT = 5V, 3.3V 40 35 30 25 20 15 10 0.1 IOUT (mA) 50 T A (°C) Figure 6. Quiescent Current vs Load Current Figure 7. Quiescent Current vs Ambient Air Temperature 1 10 100 -50 0 100 0.4 700 VOUT = 5V, 3.3V 600 TA= 25°C V OUT = 5V 0.3 500 400 300 150 0.35 VDROP OUT (V) I QUIESCENT (µA) VIN =14V 45 20 IOUT = 100mA 200 T A = 125°C 0.25 T A = 25°C 0.2 T A = -40°C 0.15 0.1 No Load 100 0.05 0 4 14 24 V IN (V) 34 Figure 8. Quiescent Current vs Input Voltage 6 300 55 50 (1) 100 Figure 5. ESR vs Load Current 60 0 30 40 0 50 100 150 IOUT (mA) 200 250 300 Figure 9. Drop Out Voltage (1)vs Load Current Drop out voltage is measured when the output voltage drops by 100mV from the regulated output voltage level. (For example, if output voltage is programmed to be 5V, the drop out voltage is measured when the output voltage drops down to 4.9V from 5V.) Copyright © 2010–2012, Texas Instruments Incorporated TPS7A6201-Q1 www.ti.com SLVSAA0B – NOVEMBER 2010 – REVISED MARCH 2012 TYPICAL CHARACTERISTICS (continued) 5.1 6 VIN = 14V 5.08 IOUT = 1mA TA = 25°C 5 5.06 5.04 4 VOUT (V) 5.02 VOUT (V) IOUT = 100mA 5 4.98 3 2 4.96 4.94 1 4.92 4.9 -50 0 50 TA (°C) 100 0 150 2 0.12 0.1 7 650 TA = 25°C TA = -40°C 600 550 0.02 500 0 0 10 20 30 40 450 -50 50 0 VIN (V) Figure 12. Output Current vs Input Voltage 12 3 10.5 10 9.5 9 150 2 1.5 1 0.5 8.5 8 -50 100 IOUT = 10mA VOUT = 5V, 3.3V VIN step from 8V to 28V 2.5 Line Regulation (mV) 11 50 TA (°C) Figure 13. Output Current Limit vs Ambient Air Temperature VIN = 14V VOUT = 5V, 3.3V IOUT step from 10mA to 300mA 11.5 Load Regulation (mV) 6 VIN = 14V VOUT = 5V, 3.3V 700 ICL (mA) IOUT (A) 750 TA= 125°C 0.04 5 Figure 11. Output Voltage vs Input Voltage (VOUT programmed to 5 V) ILOAD = 100mA VOUT = 5V, 3.3V 0.06 4 V IN (V) Figure 10. Output Voltage vs Ambient Air Temperature (VOUT programmed to 5 V) 0.08 3 0 50 T A (°C) 100 150 Figure 14. Load Regulation vs Ambient Air Temperature Copyright © 2010–2012, Texas Instruments Incorporated 0 -50 0 50 T A (°C) 100 150 Figure 15. Line Regulation vs Ambient Air Temperature 7 TPS7A6201-Q1 SLVSAA0B – NOVEMBER 2010 – REVISED MARCH 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) 120 VIN = 14V IOUT = 250mA TA = 25°C COUT = 10µF VOUT = 5V, 3.3V 80 60 40 60 20 10 100 10k 1k Frequency (Hz) 100k Figure 16. PSRR at Heavy Load Current 8 80 40 20 0 VIN = 14V IOUT = 1mA TA = 25°C COUT = 10µF VOUT = 5V, 3.3V 100 PSRR (dB) PSRR (dB) 100 120 1M 0 10 100 10k 1k Frequency (Hz) 100k 1M Figure 17. PSRR at Light Load Current Copyright © 2010–2012, Texas Instruments Incorporated TPS7A6201-Q1 www.ti.com SLVSAA0B – NOVEMBER 2010 – REVISED MARCH 2012 DETAILED DESCRIPTION TPS7A6201 is a monolithic low dropout linear voltage regulator with programmable output voltage and an integrated fault protection. This voltage regulator is designed for low power consumption and quiescent current less than 25µA in light load applications. This device is available in two 5 pin package options as follows: • KTT/ D2PAK The following section describes the features of TPS7A6201 voltage regulator in detail. VREF = reference voltage (VREF= 1.23 V typically) R1, R2 = feedback resistors (see Figure 3) The overall tolerance of the regulated output voltage depends on the tolerance of internal reference voltage and external feedback resistors, and is given by Equation 2. é R1 ù tolVOUT = tolVREF + ê ú éë tolR1 + tolR2 ùû ë R1 + R2 û (2) Where, Power Up tolVOUT = tolerance of output voltage During power up, the regulator incorporates a protection scheme to limit the current through pass element and output capacitor. When the input voltage exceeds a certain threshold (VIN(POWERUP)) level, the output voltage begins to ramp up as shown in Figure 18. tolVREF = tolerance of internal reference voltage (tolVREF = ± 1.5% typically) VIN tolR1,tolR2 = tolerance of feedback resistors R1, R2 For a tighter tolerance on VOUT, lower-value feedback resistors can be selected. It is recommended to select feedback resistors such that the sum of R1 and R2 is between 20kΩ and 200kΩ. Enable Input This device has a high voltage tolerant EN pin that can be used to enable and disable a device from an external microcontroller or a digital control circuit. A high input to this pin activates the device and turns the regulator on. This input can also be connected to VIN terminal for self bias applications. An internal pull down resistor is connected to this pin, and therefore if this pin is left unconnected, the device will stay disabled. VIN(POWERUP) 0 VOUT 5V or 3.3V 0 Charge Pump Operation Figure 18. Adjustable Output Voltage The regulated output voltage (VOUT) can be programmed by connecting external resistors to FB pin. The feedback resistor values can be calculated using Equation 1. R1 ù é VOUT = VREF ê1 + R2 úû ë This device has an internal charge pump which turns on or off depending on the input voltage and the output current. The charge pump switching circuitry shall not cause conducted emissions to exceed required thresholds on the input voltage line. For a given output current, the charge pump stays on at lower input voltages and turns off at higher input voltages. The charge pump switching thresholds are hysteretic. Figure 19 and Figure 20 shows typical switching thresholds for the charge pump at light (IOUT < ~2mA) and heavy (IOUT > ~2mA) loads respectively. (1) Where, VOUT=desired output voltage Copyright © 2010–2012, Texas Instruments Incorporated 9 TPS7A6201-Q1 SLVSAA0B – NOVEMBER 2010 – REVISED MARCH 2012 www.ti.com Charge Pump State Low Voltage Tracking At low input voltages the regulator drops out of regulation, the output voltage tracks input minus a voltage based on the load current (IOUT) and switch resistance (RSW) as shown in Figure DDD. This allows for a smaller input capacitor and can possibly eliminate the need of using a boost convertor during cold crank conditions. ON Hysteresis OFF 7.8 7.9 VIN (V) Figure 19. Charge Pump Operation at Light Loads VIN-UVLO Charge Pump State VIN 0 ON 5V or 3.3V Hysteresis VOUT 0 OFF Tracking 9.2 9.6 VIN (V) Figure 21. Figure 20. Charge Pump Operation at Heavy Loads Low Power Mode At light loads and high input voltages (VIN>~8V such that charge pump is off) the device operates in Low Power Mode and the quiescent current consumption is reduced to 25µA (typical) as shown in Table 1. Table 1. Typical Quiescent Current Consumption IOUT Charge Pump ON Charge Pump OFF IOUT < ~2mA (Light load) 250 µA 25 µA (Low Power Mode) IOUT > ~2mA (Heavy load) 280 µA 70 µA Under Voltage Shutdown This device has an integrated under voltage lock out (UVLO) circuit to shutdown the output if the input voltage (VIN) falls below an internally fixed UVLO threshold level (VIN-UVLO) as shown in Figure 21. This ensures that the regulator is not latched into an unknown state during low input voltage conditions. The regulator will normally power up when the input voltage exceeds VIN(POWERUP) threshold. 10 Integrated Fault Protection The device features integrated fault protection to make it ideal for use in automotive applications. In order to keep the device in safe area of operation during certain fault conditions, internal current limit protection and current limit fold back are used to limit the maximum output current. This protects the device from excessive power dissipation. For example, during a short circuit condition on the output; current through the pass element is limited to ICL to protect the device from excessive power dissipation. Thermal Shutdown The device incorporates a thermal shutdown (TSD) circuit as a protection from overheating. For continuous normal operation, the junction temperature should not exceed TSD trip point. If the junction temperature exceeds TSD trip point, the output is turned off. When the junction temperature falls below TSD trip point, the output is turned on again. This is shown in Figure 22. Copyright © 2010–2012, Texas Instruments Incorporated TPS7A6201-Q1 www.ti.com SLVSAA0B – NOVEMBER 2010 – REVISED MARCH 2012 Figure 22. Thermal Cycling Waveform for TPS7A6201 (VIN = 24 V, IOUT = 300 mA, VOUT = 5 V) Copyright © 2010–2012, Texas Instruments Incorporated 11 TPS7A6201-Q1 SLVSAA0B – NOVEMBER 2010 – REVISED MARCH 2012 www.ti.com APPLICATION INFORMATION Typical application circuit for TPS7A6201 is shown in Figure 23. Depending upon an end application, different values of external components may be used. In order to program the output voltage, feedback resistors (R1 and R2) should be carefully selected. Using small resistors will result in higher current consumption, where as, using very large resistors will impact the sensitivity of the regulator. Therefore, It is recommended to select feedback resistors such that the sum of R1 and R2 is between 20kΩ and 200kΩ. Also, the overall tolerance of the regulated output voltage depends on the tolerance of internal reference voltage and external feedback resistors. A larger output capacitor may be required during fast load steps to prevent output from temporarily dropping down. A low ESR ceramic capacitor with dielectric of type X5R or X7R is recommended. Additionally, a bypass capacitor can be connected at the output to decouple high frequency noise as per the end application. If the desired regulated output voltage is 5V, upon selecting R2; R1 can be calculated using Equation 1 (and vice versa). Knowing VREF = 1.23V (typical), VOUT = 5V, selecting R2 = 20kΩ, R1 is calculated to be 61.3kΩ. TPS7A6201 VIN VIN VOUT 10µF to 22µF VEN As IQUIESCENT << IOUT, therefore, the IQUIESCENT × VIN in Equation 3 can be ignored. term For device under operation at a given ambient air temperature (TA), the junction temperature (TJ) can be calculated using Equation 4. TJ = TA + (θJA × PD) (4) Where, θJA = junction to ambient air thermal impedance The rise in junction temperature due to power dissipation can be calculated using Equation 5. ΔT = TJ – TA = (θJA × PD) (5) For a given maximum junction temperature (TJ-Max), the maximum ambient air temperature (TA-Max) at which the device can operate can be calculated using Equation 6. TA-Max = TJ-Max – (θJA × PD) (6) Example Example 0.1µF IQUIESCENT = quiescent current VOUT R1 EN 1µF to 10µF 0.1µF FB If IOUT = 100mA, VOUT = 5V, VIN = 14V, IQUIESCENT = 250µA and θJA= 30˚C/W, the continuous power dissipated in the device is 0.9W. The rise in junction temperature due to power dissipation is 27˚C. For a maximum junction temperature of 150˚C, maximum ambient air temperature at which the device can operate is 123˚C. For adequate heat dissipation, it is recommended to solder the thermal pad (exposed heat sink) to thermal land pad on the PCB. Doing this provides a heat conduction path from die to the PCB and reduces overall package thermal resistance. Power derating curves for TPS7A6201 device in the KTT (D2PAK) package is shown in Figure 24. R2 4 GND 3.5 Figure 23. Typical Application Schematic for TPS7A6201 Power Dissipated (W) Power Dissipation and Thermal Considerations Power dissipated in the device can be calculated using Equation 3. PD = IOUT × (VIN - VOUT)) + IQUIESCENT × VIN Where, PD = continuous power dissipation IOUT = output current VIN = input voltage VOUT = output voltage 12 JESD 51-5 (KTT) 3 (3) 2.5 2 JESD 51-3 (KTT) 1.5 1 0.5 0 0 25 50 75 100 125 150 Ambient Air Temperature (°C) Figure 24. Power Derating Curves Copyright © 2010–2012, Texas Instruments Incorporated TPS7A6201-Q1 www.ti.com SLVSAA0B – NOVEMBER 2010 – REVISED MARCH 2012 For optimum thermal performance, it is recommended to use a high K PCB with thermal vias between ground plane and solder pad/ thermal land pad. This is shown in Figure 25 (a) and (b). Further, heat spreading capabilities of a PCB can be considerably improved by using a thicker ground plane and a thermal land pad with a larger surface area. Keeping other factors constant, surface area of the thermal land pad contributes to heat dissipation only to a certain extent. Figure 26 shows variation of θJA with surface area of the thermal land pad (soldered to the exposed pad) for KTT package. 55 50 q JA (°C/W) Exposed Tab Thermal Via Thermal Land Pad 45 40 PCB Ground Plane KTT (D2PAK) (JESD 51-3) (a) Before soldering 35 30 0 200 400 600 800 1000 Thermal Pad Area (sq. mm) Figure 26. θJA vs Thermal Pad Area (b) After soldering Figure 25. Using Multilayer PCB and Thermal Vias For Adequate Heat Dissipation Copyright © 2010–2012, Texas Instruments Incorporated 13 TPS7A6201-Q1 SLVSAA0B – NOVEMBER 2010 – REVISED MARCH 2012 www.ti.com REVISION HISTORY Changes from Revision A (December 2011) to Revision B • 14 Page Added value to test conditions field in Regulated Output Voltage 6.1 (IOUT = 10mA to 300mA, VIN= VOUT + 1V to 16V) ...................................................................................................................................................................................... 3 Copyright © 2010–2012, Texas Instruments Incorporated PACKAGE OPTION ADDENDUM www.ti.com 27-Mar-2012 PACKAGING INFORMATION Orderable Device TPS7A6201QKTTRQ1 Status (1) ACTIVE Package Type Package Drawing DDPAK/ TO-263 KTT Pins Package Qty 5 500 Eco Plan (2) Green (RoHS & no Sb/Br) Lead/ Ball Finish CU SN MSL Peak Temp (3) Samples (Requires Login) Level-3-245C-168 HR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 26-Mar-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device TPS7A6201QKTTRQ1 Package Package Pins Type Drawing SPQ DDPAK/ TO-263 500 KTT 5 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 330.0 24.4 Pack Materials-Page 1 10.6 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 15.8 4.9 16.0 24.0 Q2 PACKAGE MATERIALS INFORMATION www.ti.com 26-Mar-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS7A6201QKTTRQ1 DDPAK/TO-263 KTT 5 500 340.0 340.0 38.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily performed. TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications. In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements. Nonetheless, such components are subject to these terms. No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties have executed a special agreement specifically governing such use. Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI has specifically designated certain components which meet ISO/TS16949 requirements, mainly for automotive use. Components which have not been so designated are neither designed nor intended for automotive use; and TI will not be responsible for any failure of such components to meet such requirements. Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2012, Texas Instruments Incorporated