TRIQUINT AGR09045EU

AGR09045E
45 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Introduction
Table 1. Thermal Characteristics
The AGR09045E is a high-voltage, gold-metalized,
laterally diffused metal oxide semiconductor
(LDMOS) RF power transistor suitable for cellular
band, code-division multiple access (CDMA), global
system for mobile communication (GSM), enhanced
data for global evolution (EDGE), and time-division
multiple access (TDMA) single and multicarrier class
AB wireless base station amplifier applications. This
device is manufactured on an advanced LDMOS
technology, offering state-of-the-art performance,
reliability, and thermal resistance. Packaged in an
industry-standard CuW package capable of delivering a minimum output power of 45 W, it is ideally
suited for today's RF power amplifier applications.
AGR09045EU (unflanged)
AGR09045EF (flanged)
Figure 1. Available Packages
Features
Typical performance ratings are for IS-95 CDMA,
pilot, sync, paging, traffic codes 8—13:
— Output power (POUT): 10 W.
— Power gain: 20 dB.
— Efficiency: 28%.
— Adjacent channel power ratio (ACPR) for
30 kHz bandwidth (BW):
(750 kHz offset: –45 dBc)
(1.98 MHz offset: –60 dBc).
— Input return loss: 10 dB.
High-reliability, gold-metalization process.
High gain, efficiency, and linearity.
Integrated ESD protection.
Si LDMOS.
Industry-standard packages.
45 W minimum output power.
Parameter
Thermal Resistance,
Junction to Case:
AGR09045EU
AGR09045EF
Sym
R
R
JC
JC
Value
Unit
1.2
1.5
°C/W
°C/W
Table 2. Absolute Maximum Ratings*
Parameter
Drain-source Voltage
Gate-source Voltage
Drain Current—Continuous
Total Dissipation at TC = 25 °C:
AGR09045EU
AGR09045EF
Derate Above 25 °C:
AGR09045EU
AGR09045EF
Operating Junction Temperature
Storage Temperature Range
Sym Value
VDSS
65
VGS –0.5, +15
ID
4.25
Unit
Vdc
Vdc
Adc
PD
PD
146
117
W
W
—
—
TJ
0.83
0.67
200
W/°C
W/°C
°C
TSTG –65, +150 °C
* Stresses in excess of the absolute maximum ratings can cause
permanent damage to the device. These are absolute stress ratings only. Functional operation of the device is not implied at
these or any other conditions in excess of those given in the
operational sections of the data sheet. Exposure to absolute
maximum ratings for extended periods can adversely affect
device reliability.
Table 3. ESD Rating*
AGR09045E
HBM
MM
CDM
Minimum (V)
500
50
1500
Class
1B
A
4
* Although electrostatic discharge (ESD) protection circuitry has
been designed into this device, proper precautions must be
taken to avoid exposure to ESD and electrical overstress (EOS)
during all handling, assembly, and test operations. PEAK
Agere Devices
employs a human-body model (HBM), a machine model (MM),
and a charged-device model (CDM) qualification requirement in
order to determine ESD-susceptibility limits and protection
design evaluation. ESD voltage thresholds are dependent on the
circuit parameters used in each of the models, as defined by
JEDEC's JESD22-A114B (HBM), JESD22-A115A (MM), and
JESD22-C101A (CDM) standards.
Caution: MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be
observed.
AGR09045E
45 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Electrical Characteristics
Recommended operating conditions apply unless otherwise specified: TC = 30 °C.
Table 4. dc Characteristics
Parameter
Symbol
Min
Typ
Max
Unit
Off Characteristics
200 µA)
Drain-source Breakdown Voltage (VGS = 0, ID = 100
V(BR)DSS
65
—
—
Vdc
Gate-source Leakage Current (VGS = 5 V, VDS = 0 V)
IGSS
—
—
µAdc
Zero Gate Voltage Drain Leakage Current (VDS = 28 V, VGS = 0 V)
IDSS
—
—
1.3
75
4
µAdc
GFS
—
3
—
S
VGS(TH)
—
—
4.8
Vdc
Gate Quiescent Voltage (VDS = 28 V, IDQ = 450 mA)
VGS(Q)
—
3.5
—
Vdc
Drain-source On-voltage (VGS = 10 V, ID = 1.0 A)
VDS(ON)
—
0.25
—
Vdc
Symbol
Min
Typ
Max
Unit
Input Capacitance
(VDS = 28 Vdc, VGS = 0, f = 1 MHz)
CISS
—
73
—
pF
Output Capacitance
(VDS = 28 Vdc, VGS = 0, f = 1 MHz)
COSS
—
23
—
pF
Reverse Transfer Capacitance
(VDS = 28 Vdc, VGS = 0, f = 1 MHz)
CRSS
—
1.2
—
pF
On Characteristics
Forward Transconductance (VDS = 10 V, ID = 1.0 A)
Gate Threshold Voltage (VDS = 10 V, ID = 400 µA)
Table 5. RF Characteristics
Parameter
Dynamic Characteristics
Test Fixture)
Functional Tests (in Supplied
Agere Systems
Supplied Test Fixture)
(Test frequencies (f) = 865 MHz, 880 MHz, 895 MHz)
Linear Power Gain
(VDS = 28 V, POUT = 6 W, IDQ = 450 mA)
Output Power
(VDS = 28 V, 1 dB compression, IDQ = 450 mA)
GL
19
20
—
dB
P1dB
45
60
—
W
—
59
—
%
Drain Efficiency
(VDS = 28 V, POUT = P1dB, IDQ = 450 mA)
Third-order Intermodulation Distortion
(100 kHz spacing, VDS = 28 V, POUT = 45 WPEP, IDQ = 450 mA)
IMD
—
–31
—
dBc
Input Return Loss
IRL
—
10
—
dB
Ruggedness
(VDS = 28 V, POUT = 45 W, IDQ = 450 mA, f = 880 MHz,
VSWR = 10:1, all angles)
—
No degradation in output power.
AGR09045E
45 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Test Circuit Illustrations for AGR09045E
VDD
+
C19
VGG
C26
C21
C22
C23
C24
C25
FB1
R3
+
C20
Z22
+
C14
Z19
R2
C13
C12
C11
C10
C9
C8
Z20
C18
Z13
Z21
RF OUTPUT
C17
Z1
Z4
Z2
C1
Z5
Z6
Z7
Z8
R1
Z18
RF INPUT
C2
Z3
C27
C16
Z14
Z11
Z12
2
C6
C5
C15
Z15
1
DUT
3
C4
Z16
C3
Z9
Z10
Z17
C7
PINS:
1. DRAIN
2. GATE
3. SOURCE
A. Schematic
Parts List:
Microstrip line: Z1 0.670 in. x 0.066 in.; Z2 0.035 in. x 0.066 in.; Z3 0.297 in. x 0.050 in.; Z4 0.069 in. x 0.066 in.; Z5 0.538 in. x 0.066 in.;
Z6 0.050 in. x 0.150 in.; Z7 0.797 in. x 0.150 in.; Z8 0.050 in. x 0.440 in.; Z9 0.299 in. x 0.440 in.; Z10 0.050 in. x 0.440 in.;
Z11 0.050 in. x 0.440 in.; Z12 0.494 in. x 0.440 in.; Z13 1.024 in. x 0.050 in.; Z14 0.093 in. x 0.300 in.; Z15 0.050 in. x 0.300 in.;
Z16 0.214 in. x 0.300 in.; Z17 0.050 in. x 0.300 in.; Z18 0.396 in. x 0.300 in.; Z19 0.050 x 0.300; Z20 0.808 in. x 0.066 in.;
Z21 0.881 in. x 0.066 in.; Z22 2.048 in. x 0.050 in.
ATC ® chip capacitor: C1, C8, C18, C19: 47 pF, 100B470JW; C2: 3.3 pF, 100B3R3BW; C3: 5.6 pF, 100B5R6BW;
C4, C5, C6, C7: 12 pF, 100B120JW; C9, C16, C20: 10 pF, 100B100JW; C15: 1.8 pF, 100B1R8BW; C17: 6.8 pF, 100B6R8BW;
C27: 8.2 pF, 100A8R2BW.
1206 size 0.25 W, fixed film, chip resistors: R1: 50 , RM73B2B500J; R2: 43 k , RM73B2B433J; R3: 1 k , RM73B2B103J.
Murata ® chip capacitor: C12, C23: 0.01 µF, GRM40X7R103K100AL.
0603 chip capacitor: C10, C21: 220 pF.
Sprague ® tantalum chip capacitor: C14, C25, C26: 22 µF, 35 V.
Kreger® ferrite bead: FB1 2743D19447.
Kemet ® chip capacitor: C13, C24: 0.10 µF, C1206C104KRAC7800.
Vitramon ® chip capacitor: C11, C22: 2200 pF, VJ1206Y222KXA.
Taconic® ORCER RF-35: board material, 1 oz. copper, 30 mil thickness, r = 3.5.
B. Component Layout
Figure 2. AGR09045E Test Circuit
AGR09045E
45 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Typical Performance Characteristics
0. 11
7
0. 0
65
0. 5
0.
06
O
R
PA
CI
TI
SC
90
EP
45
1.0
0.9
1.4
0.8
55
TA
NC
E
0. 2
0.4
(+
T
EN
75
0. 8
TA
NC
80
EC
O
15
0
M
PO
N
0. 6
UCT
IV E
1. 0
RE
AC
1. 0
IN D
0. 6
0. 1
0.4
f1
2.0
1.8
1.6
1.2
1.0
0.9
0.8
0.7
0.6
f1
ZL
0.5
0.4
0.3
0.2
0.1
ZS
0. 2
f3
f3
1.4
0. 0
4
0. 4
6
85
0.2
R E SIST A N C E C OM PON E N T (R / Z o), OR C ON D U C T A N C E C OM PON E N T (G / Y o)
0. 2
0.4
( -jB
CE
8
0.
1. 0
AN
0.2
PT
-85
0.48
)
/ Yo
0. 6
0
865 (f1)
880 (f2)
895 (f3)
70
40
)
/ Yo
( +jB
0. 1
MHz (f)
0.15
0.35
80
0.
8
0.0 —> W A V E L E
0.49
N GTH
S TOW
ARD
0.0
0.49
GEN
L O A D <—
D
R
A
ERA
OW
T
0.48
S
7
180
±
H
.4
TO
GT
170
70
N
R—
-1
E
EL
V
0.47
>
WA
160
-90
90
-160
0. 3
Z0 = 7
0. 14
0. 36
jX
/
Z
70
0.
44
14
0
0. 0
5
0.
4
0. 4
5
,
o)
CA
SU
VE
0.37
0.7
0
12
0. 6 60
2
0. 4
3
0. 4
0
13
110
1
0. 4
0.13
0.38
50
0.4
9
0. 0
8
0. 0
0. 39
100
0.12
1. 2
0.1
ZL
ZS
(Complex Source Impedance) (Complex Optimum Load Impedance)
0.479 + j0.043
3.12 + j0.070
0.529 + j0.072
3.20 + j0.316
0.553 + j0.101
3.32 + j0.590
GATE (2)
ZS
DRAIN (1)
ZL
SOURCE (3)
INPUT MATCH
DUT
OUTPUT MATCH
Figure 3. Series Equivalent Input and Output Impedances
35
AGR09045E
45 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Typical Performance Characteristics (continued)
0
VDD = 28 Vdc, IDQ = 0.45 A, TC = 30 °C,
IS-95 CDMA PILOT, PAGING, SYNC, TRAFFIC CODES 8 THROUGH 13.
OFFSET 1 = 750 kHz, 30 kHz BANDWIDTH. OFFSET 2 = 1.98 MHz, 30 kHz BANDWIDTH.
-10
ACPR (dBc)S
-20
-30
FREQUENCY = 880 MHz
-40
ACP+
ACP-
-50
ACP1+
ACP1-
-60
-70
-80
0
5
10
15
20
25
POUT (W)S
Figure 4. ACPR vs. POUT
POWER GAIN
21
POUT = 10 W
POWER GAIN (dB)S
20
-2
-4
-6
19
POUT = 60 W
18
-8
-10
17
-12
VDD = 28 Vdc, IDQ = 0.45 A, TC = 30 °C
WAVEFORM = CW
16
-14
15
-16
14
-18
13
-20
RETURN LOSS
12
-22
11
10
860
-24
865
870
875
880
885
890
FREQUENCY (MHz)S
Figure 5. Power Gain and Return Loss vs. Frequency
895
-26
900
INPUT RETURN LOSS (dB)S
22
AGR09045E
45 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Typical Performance Characteristics (continued)
24
22
POWER GAIN (dB)S
20
18
895 MHz
865 MHz
880 MHz
16
14
12
10
VDD = 28 Vdc, IDQ = 0.45 A, TC = 30 °C
WAVEFORM = CW
8
6
4
2
0
0
20
40
POUT (W)S
60
80
100
Figure 6. Power Gain vs. Power Out
120
90
VDD = 28 V, IDQ = 0.45 A, TC = 30 °C
WAVEFORM = CW
80
POUT
895 MHz
865 MHz
880 MHz
POUT (W)S
70
60
895 MHz
880 MHz
865 MHz
40
100
90
80
EFFICIENCY
50
110
70
60
30
50
20
40
10
30
0
20
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
PIN (W)S
Figure 7. Power Out and Drain Efficiency vs. Input Power
1.5
1.6
1.7
DRAIN EFFICIENCY (%)S
100
AGR09045E
45 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Package Dimensions
All dimensions are in inches. Tolerances are ±0.005 in. unless specified.
AGR09045EU
PINS:
1. DRAIN
2. GATE
3. SOURCE
1
1
PEAK DEVICES
AGR09045EU
3
3
XXXX
2
2
AGR09045EF
PINS:
1. DRAIN
2. GATE
3. SOURCE
1
PEAK DEVICES
AGR09045EF
3
1
XXXX
2
XXXX - 4 Digit Trace Code
2
3