RFD3055, RFD3055SM
RFP3055
S E M I C O N D U C T O R
12A, 60V, Avalanche Rated, N-Channel
Enhancement-Mode Power MOSFETs (MegaFETs)
February 1994
Features
Packaging
• 12A, 60V
JEDEC TO-220AB
TOP VIEW
DRAIN
(FLANGE)
• rDS(ON) = 0.150Ω
• Temperature Compensating PSPICE Model
• Peak Current vs Pulse Width Curve
SOURCE
DRAIN
GATE
• UIS Rating Curve
• +175oC Operating Temperature
JEDEC TO-251AA
TOP VIEW
DRAIN
(FLANGE)
Description
The RFD3055, RFD3055SM and RFP3055 N-Channel
power MOSFETs are manufactured using the MegaFET process. This process, which uses feature sizes approaching
those of LSI integrated circuits gives optimum utilization of
silicon, resulting in outstanding performance. They were
designed for use in applications such as switching regulators, switching converters, motor drivers, relay drivers and
emitter switches for bipolar transistors. These transistors
can be operated directly from integrated circuits.
use
the
entire
part
number;
DRAIN
GATE
DRAIN
(FLANGE)
JEDEC TO-252AA
TOP VIEW
The RFD3055 is supplied in the JEDEC TO-251AA plastic
package, the RFD3055SM is supplied in the JEDEC
TO-252AA plastic package and the RFP3055 is supplied in the
JEDEC TO-220AB plastic package. Due to space limitations
the RFD3055 and RFD3055SM are branded FD3055.
When ordering
RFD3055SM.
SOURCE
SOURCE
DRAIN
GATE
Symbol
eg.
D
Developmental type TA49082.
G
S
Absolute Maximum Ratings
(TC = +25oC), Unless Otherwise Specified
Drain Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS
Drain Gate Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Gate Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Drain Current
RMS Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Maximum Avalanche Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IAM
Power Dissipation
TC = +25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Derate above +25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PT
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TSTG, TJ
Copyright
© Harris Corporation 1994
RFD3055, RFD3055SM, RFP3055
60
60
±20
UNITS
V
V
V
12
Refer to Peak Current Curve
Refer to UIS Curve
30
A
53
0.357
-55 to +175
W
W/oC
oC
A
File Number
1
3648
Specifications RFD3055, RFD3055SM, RFP3055
Electrical Specifications
TC = +25oC, Unless Otherwise Specified
LIMITS
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Drain-Source Breakdown Voltage
BVDSS
ID = 0.25mA, VGS = 0V
60
-
-
V
Gate Threshold Voltage
VGS(TH)
VGS = VDS, ID = 0.25mA
2
-
4
V
TC = +25oC
-
-
1
µA
TC = +150oC
-
-
50
µA
VGS = ±20V
-
-
100
nA
ID = 12A, VGS = 10V
-
-
0.150
W
VDD = 30V, ID = 12A
RL = 2.5Ω, VGS = +10V
RGS = 10Ω
-
-
40
ns
-
7
-
ns
tR
-
21
-
ns
tD(OFF)
-
16
-
ns
tF
-
10
-
ns
tOFF
-
-
40
ns
-
19
23
nC
-
10
12
nC
Zero Gate Voltage Drain Current
IDSS
Gate-Source Leakage Current
IGSS
On Resistance
rDS(ON)
Turn-On Time
tON
Turn-On Delay Time
tD(ON)
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
Total Gate Charge
VDS = 60V,
VGS = 0V
QG(TOT)
VGS = 0 to 20V
Gate Charge at 10V
QG(10)
VGS = 0 to 10V
Threshold Gate Charge
QG(TH)
VGS = 0 to 2V
-
0.6
0.8
nC
V(PLATEAU)
ID = 12A, VDS = 15V
-
-
7.5
V
Input Capacitance
CISS
VDS = 25V, VGS = 0V
f = 1MHz
-
300
-
pF
Output Capacitance
COSS
-
100
-
pF
Reverse Transfer Capacitance
CRSS
-
30
-
pF
Thermal Resistance Junction to Case
RθJC
-
-
2.8
oC/W
Thermal Resistance Junction to Ambient
RθJA
TO-251 and TO-252 Package
-
-
100
oC/W
TO-220 Package
-
-
80
oC/W
Plateau Voltage
VDD = 48V,
ID = 12A,
RL = 4Ω
Source-Drain Diode Ratings and Characteristics
LIMITS
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Forward Voltage
VSD
ISD = 12A
-
-
1.5
V
Reverse Recovery Time
tRR
ISD = 12A, dISD /dt = 100A/µs
-
-
100
ns
2
RFD3055, RFD3055SM, RFP3055
Typical Performance Curves
TC = +25oC
10
10
NORMALIZED
THERMAL RESPONSE (ZθJC)
ID , DRAIN CURRENT (A)
50
100µs
1ms
10ms
1
DC
OPERATION IN THIS
AREA MAY BE
LIMITED BY rDS(ON)
0.5
10
0.1
0.01
10-5
100
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC + TC
10-4
10-3
10-2
10-1
100
101
FIGURE 2. NORMALIZED MAXIMUM TRANSIENT THERMAL
IMPEDANCE
TC = +25oC
14
200
FOR TEMPERATURES ABOVE +25oC
DERATE PEAK CURRENT
CAPABILITY AS FOLLOWS:
IDM , PEAK CURRENT CAPABILITY (A)
12
100
10
8
6
4
2
0
25
50
75
100
125
150
'I
VGS = 10V
150
10-3
10-2
10-1
100
101
102
103
104
FIGURE 4. PEAK CURRENT CAPABILITY
VDD = 15V
TC = +25oC
24
VGS = 8V
18
VGS = 7V
12
VGS = 6V
6
VGS = 5V
VGS = 4.5V
0
0.0
175 – T
C
* -------------------
t, PULSE WIDTH (ms)
ID(ON) , ON STATE DRAIN CURRENT (A)
PULSE DURATION = 250µs
25
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
FIGURE 3. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE
24
I
VGS = 10V
10
175
=
VGS = 20V
TC , CASE TEMPERATURE (oC)
ID , DRAIN CURRENT (A)
t1
t, RECTANGULAR PULSE DURATION (s)
VDS , DRAIN-TO-SOURCE VOLTAGE (V)
FIGURE 1. SAFE- OPERATING AREA CURVE
ID , DRAIN CURRENT (A)
PDM
0.2
0.1
0.05
0.02
0.01
SINGLE PULSE
VDSS MAX = 60V
0.1
1
1
1.5
3.0
4.5
6.0
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
PULSE TEST
PULSE DURATION = 250µs
+25oC
-55oC
DUTY CYCLE = 0.5% MAX
18
+175oC
12
6
0
7.5
0.0
2.0
4.0
6.0
8.0
10.0
VGS , GATE-TO-SOURCE VOLTAGE (V)
FIGURE 5. TYPICAL SATURATION CHARACTERISTICS
FIGURE 6. TYPICAL TRANSFER CHARACTERISTICS
3
RFD3055, RFD3055SM, RFP3055
Typical Performance Curves
(Continued)
PULSE DURATION = 250µs, VGS = 10V, ID = 12A
VGS = VDS, ID = 250µA
2.0
2.5
1.5
NORMALIZED VGS(TH)
NORMALIZED RDS(ON)
2.0
1.5
1.0
1.0
0.5
0.5
0.0
-40
0
40
80
120
160
TJ, JUNCTION TEMPERATURE (oC)
0.0
-80
200
FIGURE 7. NORMALIZED RDS(ON) vs JUNCTION
TEMPERATURE
POWER DISSIPATION MULTIPLIER
NORMALIZED BVDSS
1.0
0.5
0.8
0.6
0.4
0.2
0
200
50
75
100
125
150
10
VDS, DRAIN SOURCE VOLTAGE (V)
60
CISS
COSS
VDD = BVDSS
VDD = BVDSS
7.5
45
5.0
30
15
0.75 BVDSS
0.75 BVDSS
0.50 BVDSS
0.50 BVDSS
0.25 BVDSS
0.25 BVDSS
2.5
RL = 5Ω
IG(REF) = 0.24mA
VGS = 10V
CRSS
0
0
0
5
10
15
20
VDS , DRAIN-TO-SOURCE VOLTAGE (V)
175
FIGURE 10. NORMALIZED POWER DISSIPATION vs
TEMPERATURE DERATING CURVE
400
200
25
TC , CASE TEMPERATURE (oC)
VGS = 0V, f = 1MHz
600
C, CAPACITANCE (pF)
1.0
0.0
0
80
120
160
-40
40
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 9. NORMALIZED DRAIN SOURCE BREAKDOWN
VOLTAGE vs TEMPERATURE
0
200
1.2
1.5
0.0
-80
0
40
80
120
160
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 8. NORMALIZED GATE THRESHOLD VOLTAGE vs
TEMPERATURE
ID = 250µA
2.0
-40
IG(REF)
25
20
FIGURE 11. TYPICAL CAPACITANCE vs VOLTAGE
IG(ACT)
t, TIME (µs)
IG(REF)
80
IG(ACT)
FIGURE 12. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT. REFER TO
APPLICATION NOTE AN7254 AND AN7260
4
VGS, GATE-SOURCE VOLTAGE (V)
-80
RFD3055, RFD3055SM, RFP3055
Typical Performance Curves
(Continued)
IAS, AVALANCHE CURRENT (A)
50
STARTING TJ = +25oC
10
STARTING TJ = +150oC
If R = 0
tAV = (L) (IAS) / (1.3RATED BVDSS - VDD)
IF R ≠ 0
tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1]
1
0.001
0.01
0.1
1
tAV, TIME IN AVALANCHE (msec)
FIGURE 13. UNCLAMPED INDUCTIVE SWITCHING
Test Circuits
VDS
BVDSS
L
tp
VDS
IAS
VARY tP TO OBTAIN
REQUIRED PEAK IAS
VDD
RG
+
DUT
-
VGS
tP
0V
IL
0.01Ω
tAV
FIGURE 14. UNCLAMPED ENERGY WAVEFORMS
tON
VDD
tOFF
tD(ON)
tD(OFF)
tR
VDS
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
RL
tF
90%
90%
VDS
VGS
10%
DUT
10%
0V
90%
50%
VGS
RGS
50%
PULSE WIDTH
10%
FIGURE 16. RESISTIVE SWITCHING WAVEFORMS
FIGURE 17. RESISTIVE SWITCHING TEST CIRCUIT
5
VDD
RFD3055, RFD3055SM, RFP3055
PSpice Model Listing
Temperature Compensated PSPICE Model for the RFD3055, RFD3055SM, RFP3055
.SUBCKT RFP3055 2 1 3 ;
rev 10/26/93
CA 12 8 0.540e-9
CB 15 14 0.540e-9
CIN 6 8 0.300e-9
DPLCAP
DRAIN
5
10
LDRAIN
2
RSCL1
DBODY 7 5 DBDMOD
DBREAK 5 11 DBKMOD
DPLCAP 10 5 DPLCAPMOD
EBREAK 11 7 17 18 67.9
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1
EVTO 20 6 18 8 1
DBREAK
+ 51
5
ESCL
51
50
RSCL2
GATE
IT 8 17 1
1
RGATE
LGATE
9
RBREAK 17 18 RBKMOD 1
RDRAIN 50 16 RDSMOD 1e-4
RGATE 9 20 7.23
RIN 6 8 1e9
RSCL1 5 51 RSLVCMOD 1e-6
RSCL2 5 50 1e3
RSOURCE 8 7 RDSMOD 108e-3
RVTO 18 19 RVTOMOD 1
16
VTO
EVTO
+ 18
8
+
21
RIN
11 +
17
EBREAK 18
DBODY
MOS2
MOS1
6
LDRAIN 2 5 1e-9
LGATE 1 9 4.61e-9
LSOURCE 3 7 4.61e-9
MOS1 16 6 8 8 MOSMOD M=0.99
MOS2 16 21 8 8 MOSMOD M=0.01
RDRAIN
6
8
+
ESG
CIN
8
LSOURCE
RSOURCE
3
SOURCE
7
S1A
12
S2A
14
13
13
8
S1B
RVTO
CB
+
EGS
18
17
S2B
13
CA
RBREAK
15
+
6
8
EDS
14
IT
5
8
19
VBAT
+
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 8 19 DC 1
VTO 21 6 0.5
ESCL 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/30,6.5))}
.MODEL DBDMOD D (IS=4.33e-14 RS=2.78e-2 TRS1=1.10e-3 TRS2=5.19e-6 CJO=3.94e-10 TT=7.63e-8)
.MODEL DBKMOD D (RS=0.676 TRS1=1.94e-3 TRS2=-1.09e-6)
.MODEL DPLCAPMOD D (CJO=0.238e-9 IS=1e-30 N=10)
.MODEL MOSMOD NMOS (VTO=4.078 KP=12 IS=1e-30 N=10 TOX=1 L=1u W=1u)
.MODEL RBKMOD RES (TC1=1.06e-3 TC2=-1.92e-6)
.MODEL RDSMOD RES (TC1=5.03e-3 TC2=1.53e-5)
.MODEL RSLVCMOD RES (TC1=2.2e-3 TC2=-5e-6)
.MODEL RVTOMOD RES (TC1=-5.02e-3 TC2=-9.16e-6)
.MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-6.5 VOFF=-3.5)
.MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-3.5 VOFF=-6.5)
.MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-2.50 VOFF=2.50)
.MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=2.50 VOFF=-2.50)
.ENDS
NOTE: For further discussion of the PSPICE model consult A New PSPICE Sub-circuit for the Power MOSFet Featuring Global
Temperature Options; authored by William J. Hepp and C. Frank Wheatley.
6
RFD3055, RFD3055SM, RFP3055
Packaging
TO-220AB
3 LEAD JEDEC TO-220AB PLASTIC PACKAGE
A
INCHES
E
ØP
A1
Q
H1
TERM. 4
D
45o
E1
D1
L1
b1
L
b
c
MIN
MAX
MIN
MAX
NOTES
A
0.170
0.180
4.32
4.57
-
A1
0.048
0.052
1.22
1.32
-
b
0.030
0.034
0.77
0.86
3, 4
b1
0.045
0.055
1.15
1.39
2, 3
c
0.014
0.019
0.36
0.48
2, 3, 4
D
0.590
0.610
14.99
15.49
-
D1
-
0.160
E
0.395
0.410
E1
-
0.030
e
60o
1
0.100 TYP
e1
3
2
e
J1
e1
NOTES:
1. These dimensions are within allowable dimensions of Rev. J of
JEDEC TO-220AB outline dated 3-24-87.
2. Lead dimension and finish uncontrolled in L1.
3. Lead dimension (without solder).
4. Add typically 0.002 inches (0.05mm) for solder coating.
5. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D.
MILLIMETERS
SYMBOL
0.200 BSC
H1
0.235
0.255
J1
0.100
0.110
L
0.530
0.550
10.04
4.06
-
10.41
-
-
0.76
-
2.54 TYP
5
5.08 BSC
5
5.97
6.47
-
2.54
2.79
6
13.47
13.97
-
L1
0.130
0.150
3.31
3.81
2
ØP
0.149
0.153
3.79
3.88
-
Q
0.102
0.112
2.60
2.84
-
7. Controlling dimension: Inch.
8. Revision 1 dated 1-93.
6. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D.
TO-251AA
E
b2
H1
3 LEAD JEDEC TO-251AA PLASTIC PACKAGE
A
INCHES
A1
D
TERM. 4
SYMBOL
MIN
MAX
MIN
MAX
NOTES
SEATING
PLANE
A
0.086
0.094
2.19
2.38
-
A1
0.018
0.022
0.46
0.55
3, 4
b
0.028
0.032
0.72
0.81
3, 4
b1
0.033
0.040
0.84
1.01
3
b2
0.205
0.215
5.21
5.46
3, 4
b1
L1
L
c
b
c
0.018
0.022
0.46
0.55
3, 4
D
0.270
0.290
6.86
7.36
-
E
0.250
0.265
6.35
6.73
e
1
2
3
e
MILLIMETERS
e1
J1
e1
NOTES:
1. These dimensions are within allowable dimensions of Rev. C of
JEDEC TO-251AA outline dated 9-88.
0.090 TYP
0.180 BSC
-
2.28 TYP
5
4.57 BSC
5
H1
0.035
0.045
0.89
1.14
-
J1
0.040
0.045
1.02
1.14
6
L
0.355
0.375
9.02
9.52
-
L1
0.075
0.090
1.91
2.28
2
tom of dimension D.
2. Solder finish uncontrolled.
4. Add typically 0.0006 inches (0.015mm) for solder coating.
6. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D.
5. Position of lead to be measured 0.250 inches (6.35mm) from bot-
7. Controlling dimension: Inch.
3. Dimension (without solder).
8. Revision 1 dated 1-93.
7
RFD3055, RFD3055SM, RFP3055
Packaging (Continued)
TO-252AA
2 LEAD JEDEC TO-252AA PLASTIC PACKAGE
A
E
INCHES
A1
b2
H1
SEATING
PLANE
D
L2
L1
1
L
3
b1
b
L3
e
c
e1
J1
b3
L4
MIN
MAX
MIN
MAX
A
0.086
0.094
2.19
2.38
-
0.018
0.022
0.46
0.55
4, 5
b
0.028
0.032
0.72
0.81
4, 5
b1
0.033
0.040
0.84
1.01
4
b2
0.205
0.215
5.21
5.46
4, 5
b3
0.190
-
4.83
-
2
c
0.018
0.022
0.46
0.55
4, 5
D
0.270
0.290
6.86
7.36
-
E
0.250
0.265
6.35
6.73
e1
0.265 (6.7)
0.070 (1.8)
0.118 (3.0)
BACK VIEW
NOTES
A1
e
0.265
(6.7)
TERM. 4
MILLIMETERS
SYMBOL
0.090 TYP
0.180 BSC
-
2.28 TYP
7
4.57 BSC
7
H1
0.035
0.045
0.89
1.14
-
J1
0.040
0.045
1.02
1.14
-
L
0.100
0.115
2.54
2.92
-
L1
0.075
0.090
1.91
2.28
3
L2
0.025
0.040
0.64
1.01
-
L3
0.020
-
0.51
-
4, 6
L4
0.170
-
4.32
-
2
NOTES:
0.063 (1.6)
1. These dimensions are within allowable dimensions of Rev. B of
JEDEC TO-252AA outline dated 9-88.
0.063 (1.6)
0.090 (2.3)
2. L4 and b3 dimensions establish a minimum mounting surface for
terminal 4.
0.090 (2.3)
MINIMUM PAD SIZE RECOMMENDED FOR
SURFACE-MOUNTED APPLICATIONS
3. Solder finish uncontrolled.
4. Dimension (without solder).
5. Add typically 0.0006 inches (0.015mm) for solder coating.
6. L3 is the terminal length for soldering.
7. Position of lead to be measured 0.090 inches (2.28mm) from bottom
of dimension D.
8. Controlling dimension: Inch.
9. Revision 2 dated 6-93.
Harris Semiconductor products are sold by description only. Harris Semiconductor reserves the right to make changes in circuit design and/or specifications at
any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Harris is
believed to be accurate and reliable. However, no responsibility is assumed by Harris or its subsidiaries for its use; nor for any infringements of patents or other
rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Harris or its subsidiaries.
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TEL: (32) 2-724-2111
SOUTH ASIA
Harris Semiconductor H.K. Ltd.
13/F Fourseas Building
208-212 Nathan Road
Tsimshatsui, Kowloon
Hong Kong
TEL: (852) 723-6339
S E M I C O N D U C T O R
8
NORTH ASIA
Harris K.K.
Kojimachi-Nakata Bldg. 4F
5-3-5 Kojimachi
Chiyoda-ku, Tokyo 102 Japan
TEL: (81) 3-3265-7571
TEL: (81) 3-3265-7572 (Sales)