S POD80A SP 80-Channels Dot Matrix Column/Row OLED Driver JUN. 29, 2001 Version 1.0 SUNPLUS TECHNOLOGY CO. reserves the right to change this documentation without prior notice. Information provided by SUNPLUS TECHNOLOGY CO. is believed to be accurate and reliable. However, SUNPLUS TECHNOLOGY CO. makes no warranty for any errors which may appear in this document. Contact SUNPLUS TECHNOLOGY CO. to obtain the latest version of device specifications before placing your order. No responsibility is assumed by SUNPLUS TECHNOLOGY CO. for any infringement of patent or other rights of third parties which may result from its use. In addition, SUNPLUS products are not authorized for use as critical components in life support devices/ systems or aviation devices/systems, where a malfunction or failure of the product may reasonably be expected to result in significant injury to the user, without the express written approval of Sunplus. SPOD80A Table of Contents PAGE 1. GENERAL DESCRIPTION.......................................................................................................................................................................... 3 2. FEATURES.................................................................................................................................................................................................. 3 3. PACKAGE ................................................................................................................................................................................................... 3 4. BLOCK DIAGRAM ...................................................................................................................................................................................... 3 5. SIGNAL DESCRIPTIONS ........................................................................................................................................................................... 4 6. FUNCTIONAL DESCRIPTIONS.................................................................................................................................................................. 6 6.1. 12 TYPES OF DRIVING CONFIGURATIONS ................................................................................................................................................ 6 6.2. CURRENT/VOLTAGE DRIVING MODE........................................................................................................................................................ 6 6.3. RELATIONSHIP BETWEEN THE DISPLAY DATA AND DRIVER OUTPUT PINS .................................................................................................. 6 6.4. BRIGHTNESS CONTROL .......................................................................................................................................................................... 7 6.5. INTERNAL DISCHARGE FUNCTION ........................................................................................................................................................... 8 7. ELECTRICAL SPECIFICATIONS ............................................................................................................................................................... 9 7.1. ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................................... 9 7.2. RECOMMENDED OPERATING CONDITIONS ............................................................................................................................................... 9 7.3. DC CHARACTERISTICS........................................................................................................................................................................... 9 7.4. AC CHARACTERISTIC ............................................................................................................................................................................11 8. APPLICATION CIRCUIT ........................................................................................................................................................................... 12 9. PACKAGE/PAD LOCATIONS ................................................................................................................................................................... 13 9.1. PAD ASSIGNMENT ............................................................................................................................................................................... 13 9.2. ORDERING INFORMATION ..................................................................................................................................................................... 13 9.3. PAD LOCATIONS .................................................................................................................................................................................. 14 10. DISCLAIMER............................................................................................................................................................................................. 16 11. REVISION HISTORY ................................................................................................................................................................................. 17 © Sunplus Technology Co., Ltd. Proprietary & Confidential 2 JUN. 29, 2001 Version: 1.0 SPOD80A 80-CHANNELS DOT MATRIX COLUMN/ROW OLED DRIVER 1. GENERAL DESCRIPTION 4. BLOCK DIAGRAM The SPOD80A, an 80-channels dot matrix column/row OLED driver, is fabricated by low power CMOS technology. By VDD VSS incorporating an 80-bit shift register, an 80-bit data latch, and an DIO1C DIO1R L/R CP COL/ROW 80-bit driver, the SPOD80A can drive constant current/voltage to 80 column/row lines simultaneously according to the selection DIO2C DIO2R CV Mode1 Mode2 DISPOFF 80-Bits Shift Register mode and input data. 80-Bits Latch LD 2. FEATURES FLT DIS2 DIS3 DIS4 Floating & Discharge Controller ! Shift Clock frequency: 5.0MHz (Max.) (VDD = 2.4V - 5.5V) VLED ! Serial data input VSS2 ! Current/Voltage driving modes are selectable with CV pin Level Shifter (for column driver only) Reference Generator BTV BTR RB1 ! Supply voltage for OLED driver: 9.0V - 16V ! Internal discharge circuit Driver X 80 (Column / Row) ! Cascade function ! Built-in display off function ! 12 types of driving configurations O1 ............... O80 3. PACKAGE ! Bare chip © Sunplus Technology Co., Ltd. Proprietary & Confidential 3 JUN. 29, 2001 Version: 1.0 SPOD80A 5. SIGNAL DESCRIPTIONS PIN No. Type O17 - O1 Mnemonic 1 - 17 O O40 - O18 80 -102 O63 - O61 55 - 77 O80 - O64 32 - 48 CP 24 I Description Column/Row output Data shift clock. The data is shifted to 80 bits shift register at the falling edge of ‘CP’ when used as column driver. LD 23 I Data load pulse. When used as a column driver, a row of display data is latched at the falling edge of ‘LD’. When used as a row driver, ‘LD’ is the shift clock input. DIO1C 25 DIO2C 19 1). When ‘L/R’ = 1, ‘DIO1C’ and ‘DIO1R’ are series data inputs of column driver and row driver DIO1R 26 respectively. ‘DIO2C’ and ‘DIO2R’ are series data outputs of column driver and row driver DIO2R 20 respectively. I/O Series data input/output of column/row driver. 2). When ‘L/R’ = 0, ‘DIO2C’ and ‘DIO2R’ are series data inputs of column driver and row driver respectively. ‘DIO1C’ and ‘DIO1R’ are series data outputs of column driver and row driver respectively. 3). When ‘MODE1’⊕’Mode2’ = 0, ‘COL/ROW’ = 1, SPOD80A is used as dedicated column driver, series data input of row driver, ‘DIO1R’ or ‘DIO2R’ depending on ‘L/R’, should be connected to VSS or float. 4). When ‘MODE1’⊕’Mode2’ = 0, ‘COL/ROW’ = 0, SPOD80A is used as dedicated row driver, series data input of column driver, ‘DIO1C’ or ‘DIO2C’ depending on ‘L/R’, should be connected to VSS or float. COL/ROW 51 I Column driver/Row driver selection VDD 27 - Power supply of digital circuit VSS 18 - GND of digital circuit VLED 54 - Power supply of OLED driving buffer - GND of OLED driving buffer Selection of data shift direction 79 108 VSS2 49 78 103 L/R 50 I MODE1 53 I MODE2 52 CV 22 Mode selection. There are 12 modes can be selected when combine ‘MODE1’, ‘MODE2’ with ‘COL/ROW’ and ‘L/R’. I Selection of driving method, default is ‘H’. CV = 1, current driving mode CV = 0, voltage driving mode This mode selection is valid when used as column driver only. BTV 28 I Brightness control input. By adjusting an external voltage (VBT) and resistor (RBT), the output BTR 29 I current in O[1:80] can be adjusted, see function description. This adjustment is valid when used as column driver and CV = 1 only. RB1 31 - Internal/external resistor selection. Connect this pin to ground while using internal resistor, or float it when using external resistor © Sunplus Technology Co., Ltd. Proprietary & Confidential 4 JUN. 29, 2001 Version: 1.0 SPOD80A Mnemonic PIN No. Type Description DIS2 106 I DIS3 105 By setting DIS2 - DIS4, the pulse width of internal discharge can be set to be 0, 2, 4, 6, 8, 10, DIS4 104 12, 14 TWCP. Where DIS4 is MSB; DIS2 is LSB. FLT 107 Pulse width control of internal discharge The default value of DIS4, 3, 2 is 010. I Output voltage control. While set to ‘H’, the driver will be float when input data is ‘0’. While set to ‘L’, the driver outputs deselect level (VSS2) when input data is ‘0’. This mode selection is valid only when used as column driver. The default value is ‘H’. DISPOFF 21 I Control for output deselect level 1). While set to ‘L’, the driver outputs deselect level (VSS2). 2). While set to ‘H’, the driver outputs constant current/voltage depending on mode selection. VBS 30 - Bypass capacitor A 0.1µF capacitor connecting to VSS2 is necessary © Sunplus Technology Co., Ltd. Proprietary & Confidential 5 JUN. 29, 2001 Version: 1.0 SPOD80A 6. FUNCTIONAL DESCRIPTIONS 6.1. 12 Types of Driving Configurations COL/ROW Mode1 Mode2 L/R O[1:16] O[17:32] O[33:48] O[49:64] O[65:80] 1 0/1 0/1 1 COL COL COL COL COL 1 0/1 0/1 0 COL COL COL COL COL 1 0 1 1 COL COL COL COL ROW 1 0 1 0 ROW COL COL COL COL 1 1 0 1 COL COL COL ROW ROW 1 1 0 0 ROW ROW COL COL COL 0 1 0 1 COL COL ROW ROW ROW 0 1 0 0 ROW ROW ROW COL COL 0 0 1 1 COL ROW ROW ROW ROW 0 0 1 0 ROW ROW ROW ROW COL 0 0/1 0/1 1 ROW ROW ROW ROW ROW 0 0/1 0/1 0 ROW ROW ROW ROW ROW Note: When ‘Mode1’⊕’Mode2’ = 0, SPOD80A is used as dedicated column driver or row driver. When ‘Mode1’⊕’Mode2’ = 1, SPOD80A is used as column/row driver. 6.2. Current/Voltage Driving Mode SPOD80A provides two kinds of driving methods, current driving By setting CV = ’L’, outputs programmed to be column driver will and voltage driving. By setting CV = ’H’, outputs programmed to output select level (VLED) when input data is ‘H’ ; and will be high be column driver will source a constant current when input data is impedance or deselect level (VSS2) when input data is ‘L’. ‘H’ ; and will be high impedance or deselect level (VSS2) when input data is ‘L’. 6.3. Relationship between the Display Data and Driver Output PINs 6.3.1. Column driver COL/ROW 1 1 1 1 1 1 0 0 0 0 Mode1 0/1 0/1 0 0 1 1 1 1 0 0 Mode2 0/1 0/1 1 1 0 0 0 0 1 1 1 0 1 0 1 0 1 0 1 0 Data In DIO1C DIO2C DIO1C DIO2C DIO1C DIO2C DIO1C DIO2C DIO1C DIO2C Data Out DIO2C DIO1C DIO2C DIO1C DIO2C DIO1C DIO2C DIO1C DIO2C DIO1C 1st O[80] O[1] O[64] O[17] O[48] O[33] O[32] O[49] O[16] O[65] | | | | | | | | | | | 16th O[65] O[16] O[49] O[32] O[33] O[48] O[17] O[64] O[1] O[80] L/R 17th O[64] O[17] O[48] O[33] O[32] O[49] O[16] O[65] NA NA Figure of | | | | | | | | | NA NA Clock 32nd O[49] O[32] O[33] O[48] O[17] O[64] O[1] O[80] NA NA 33rd O[48] O[33] O[32] O[49] O[16] O[65] NA NA NA NA | | | | | | | NA NA NA NA 48th O[33] O[48] O[17] O[64] O[1] O[80] NA NA NA NA 49th O[32] O[49] O[16] O[65] NA NA NA NA NA NA | | | | | NA NA NA NA NA NA Figure of 64th O[17] O[64] O[1] O[80] NA NA NA NA NA NA Clock 65th O[16] O[65] NA NA NA NA NA NA NA NA | | | NA NA NA NA NA NA NA NA 80th O[1] O[80] NA NA NA NA NA NA NA NA © Sunplus Technology Co., Ltd. Proprietary & Confidential 6 JUN. 29, 2001 Version: 1.0 SPOD80A 6.3.2. Row driver COL/ROW 0 0 0 0 0 0 1 1 1 1 Mode1 0/1 0/1 0 0 1 1 1 1 0 0 Mode2 0/1 0/1 1 1 0 0 0 0 1 1 L/R 1 0 1 0 1 0 1 0 1 0 Data In DIO1R DIO2R DIO1R DIO2R DIO1R DIO2R DIO1R DIO2R DIO1R DIO2R Data Out DIO2R DIO1R DIO2R DIO1R DIO2R DIO1R DIO2R DIO1R DIO2R DIO1R 1st O[1] O[80] O[17] O[64] O[33] O[48] O[49] O[32] O[65] O[16] | | | | | | | | | | | 16th O[16] O[65] O[32] O[49] O[48] O[33] O[64] O[17] O[80] O[1] 17th O[17] O[64] O[33] O[48] O[49] O[32] O[65] O[16] NA NA Figure of Clock | | | | | | | | | NA NA 32nd O[32] O[49] O[48] O[33] O[64] O[17] O[80] O[1] NA NA 33rd O[33] O[48] O[49] O[32] O[65] O[16] NA NA NA NA | | | | | | | NA NA NA NA 48th O[48] O[33] O[64] O[17] O[80] O[1] NA NA NA NA 49th O[49] O[32] O[65] O[16] NA NA NA NA NA NA | | | | | NA NA NA NA NA NA 64th O[64] O[17] O[80] O[1] NA NA NA NA NA NA 65th O[65] O[16] NA NA NA NA NA NA NA NA | | | NA NA NA NA NA NA NA NA 80th O[80] O[1] NA NA NA NA NA NA NA NA 6.4. Brightness Control 6.4.1. Using internal resistor 6.4.2. Using external resistor VBT VBT ICH = VBT/20K Operation Condition VBT = 1 ~ 5V BTV ICH = VBT/Rext BTV ICH 250 RB1 BTR 50 1 5 VBT RB1 BTR Rext © Sunplus Technology Co., Ltd. Proprietary & Confidential 7 JUN. 29, 2001 Version: 1.0 SPOD80A 6.5. Internal Discharge Function SPOD80A supports internal discharge function. An internal can set discharge pulse width to be 0, 2, 4, 6, 8, 10, 12, 14 TWCP, discharge pulse will be active at the rising edge of ‘LD’, and be period of shift clock CP. The default value of DIS4 - DIS2 is 010, inactive at the falling edge of ‘CP’, the duration of the internal where DIS2 is LSB; DIS4 is MSB. This function is only valid when discharge pulse is programmable. By setting DIS2 - DIS4, user used as column driver. LD TWC P CP 1 2 3 4 ... 14 ... 1 DIS Row N Row N+1 © Sunplus Technology Co., Ltd. Proprietary & Confidential 8 JUN. 29, 2001 Version: 1.0 SPOD80A 7. ELECTRICAL SPECIFICATIONS 7.1. Absolute Maximum Ratings Parameter Symbol Rating Unit Supply voltage (Logic) VDD -0.5 ~ 7.0 V Supply voltage (Driving buffer) VLED -0.5 ~ 18.0 V Input voltage range VIN -0.5 ~ VDD+0.5 V Output voltage range VOUT -0.5 ~ VDD+0.5 V Storage temperature TSTG -45.0 to 125.0 ℃ Note: Stresses beyond those given in the Absolute Maximum Rating table may cause operational errors or damage to the device. For normal operational conditions see AC/DC Electrical Characteristics. 7.2. Recommended Operating Conditions Parameter Symbol Min. Typ. Max. Unit Supply voltage (Logic) VDD 2.4 - 5.5 V Supply voltage (Driving buffer) VLED 9.0 - 16.0 V TOPR -20.0 - 70.0 ℃ Operating temperature 7.3. DC Characteristics 7.3.1. Column mode (VSS = VSS2 = 0V；VDD = 2.4V - 5.5V; VLED = 16.0V; TOPR = -20℃ ~ 70℃) Parameter Symbol VIH Conditions VDD = 3.3V Applicable pin DIO1C, L/R, DIO2C, CP, Min. Typ. Max. Unit 2.0 - - V - - 0.8 V DIO1R, CV, DIO2R, LD, Input voltage VIL VDD = 3.3V MODE1, FLT, MODE2, COL/ROW, DIS2, DIS3, DIS4, DISPOFF Output voltage (1) Input leakage current (1) Input leakage current (2) Input leakage current (3) I/O leakage current VOH1 IOH = -0.2mA DIO1C, DIO2C, DIO1R, VDD-0.2 - - V VOL1 IOL = 0.2mA DIO2R - - 0.2 V IHIL1 VIN = VDD L/R, CP, LD, COL/ROW, - - 1.0 µA MODE1, MODE2, DISPOFF -1.0 - - µA - - 1.0 µA -40 - - µA - - 40 µA -1.0 - - µA - - 2.0 µA -2.0 - - µA -200 -250 -300 µA -1.0 - - µA VLED-0.3V - - V ILIL1 VIN = VSS IHIL2 VIN = VDD ILIL2 VIN = VSS IHIL3 VIN = VDD ILIL3 VIN = VSS VIN = VDD DIO1C, DIO2C, DIO1R, ILIOL VIN = VSS DIO2R ICH VBTV = 5.0V, CV = ’H’ Column OFF output current ICL CV = ’H’, FLT = ’H’ Column On output voltage VCH CV = ’L’, ICH = -0.2mA VCL CV = ’L’, ICL = 0.2mA Supply current Display OFF current © Sunplus Technology Co., Ltd. Proprietary & Confidential DIS2, DIS4 IHIOL Column ON output current Column OFF output voltage CV, DIS3, FLT ICVDD ICVLED ICOFF1 ICOFF2 *2 *3 *1 *1 - - 0.3 V VDD - - 1.0 mA VLED - - 200 µA VDD - - 1.0 mA VLED - - 1.0 µA 9 JUN. 29, 2001 Version: 1.0 SPOD80A 7.3.2. Row mode (VSS = VSS2 = 0V；VDD = 2.4V - 5.5V; VLED = 16.0V; TOPR = -20℃ ~ 70℃) Parameter Symbol Conditions VIH VDD = 3.3V Applicable pin DIO1C, L/R, DIO2C, CP, Min. Typ. Max. Unit 2.0 - - V - - 0.8 V DIO1R, CV, DIO2R, LD, Input voltage VDD = 3.3V VIL MODE1, FLT, MODE2, COL/ROW, DIS2, DIS3, DIS4, DISPOFF Output voltage Input leakage current Input leakage current (2) Input leakage current (3) I/O leakage current VOH IOH = -0.2mA DIO1C, DIO2C, DIO1R, VDD-0.2 - - V VOL IOL = 0.2mA DIO2R, - - 0.2 V IHIL1 VIN = VDD L/R, CP, LD, COL/ROW, - - 1.0 µA MODE1, MODE2, DISPOFF -1.0 - - µA - - 1.0 µA -40 - - µA ILIL1 VIN = VSS IHIL2 VIN = VDD ILIL2 VIN = VSS IHIL3 VIN = VDD ILIL3 VIN = VSS IHIOL VIN = VDD ILIOL VIN = VSS Row OFF output voltage VRH IRH = -0.2mA Row ON output voltage VRL IRL = 48mA (*5) IRVDD Supply current *2 IRVLED IROFF1 Display OFF current *3 IROFF2 CV, DIS3, FLT DIS2, DIS4 DIO1C, DIO2C, DIO1R, DIO2R - - 40 µA -1.0 - - µA - - 2.0 µA -2.0 - - µA VLED-0.3 - - V - - 1.92 V VDD - - 1.0 mA *4 VLED - - 150 µA VDD - - 1.0 mA VLED - - 1.0 µA Note*1: Depending on the selected mode, the applicable pins will be Note*4: Depending on the selected mode, the applicable pins will be COL/ROW Mode1 Mode2 L/R Applicable Pins COL/ROW Mode1 Mode2 L/R Applicable Pins 1 0/1 0/1 1 O[1:80] 1 0 1 1 O[65:80] 1 0/1 0/1 0 O[1:80] 1 0 1 0 O[1:16] 1 0 1 1 O[1:64] 1 1 0 1 O[49:80] 1 0 1 0 O[17:80] 1 1 0 0 O[1:32] 1 1 0 1 O[1:48] 0 1 0 1 O[33:80] 1 1 0 0 O[33:80] 0 1 0 0 O[1:48] 0 1 0 1 O[1:32] 0 0 1 1 O[17:80] 0 1 0 0 O[49:80] 0 0 1 0 O[1:64] 0 0 1 1 O[1:16] 0 0/1 0/1 1 O[1:80] 0 0 1 0 O[65:80] 0 0/1 0/1 0 O[1:80] Note*2: VDD = 3.0V, fCP = 2.08MHz, fLD=12.8KHz, No load. The input data Note*5: Because of the row driving capability of SPOD80A, the maximum is turned over by CP. column lines that SPOD80A can drive are 160. That is, there are Note*3: VDD = 3.0V, fCP = 5.0MHz, No load. The input data is turned over only 2 SPOD80As can cascade as column drivers when using by CP. DISPOFF set to ‘L’. © Sunplus Technology Co., Ltd. Proprietary & Confidential SPOD80A as row driver. 10 JUN. 29, 2001 Version: 1.0 SPOD80A 7.4. AC Characteristic (VSS = VSS2 = 0V; VDD = 2.4V - 5.5V; VLED = 16.0V; TOPR = -20℃ ~ 70℃) Parameter Min. Typ. Max. Unit TWCP 200 - - ns Data latch in setup time TDS 40 - - ns Data latch in hold time TDH 40 - - ns CP low to LD high TCLLH 20 - - ns LD low to CP low TLLCL 20 - - ns LD ‘H’ pulse width TWLD 100 - - ns LD low to Row output TLROW Load = 0.6nF - - 9.0 µs LD high to column output TLCOL *6 - - - ns Output delay time TDDO CL = 15pF 40 - 100 ns Shift clock period Symbol Condition T CLLH T LLCL T WLD LD T WCP CP T DS T DH DIO1/ DIO2 O[1:80] Row T LROW O[1:80] Column Discharge X T LCOL CP T DH T DH DI DO T DDO Note*6: Depending on loading, please refer to DC characteristics. © Sunplus Technology Co., Ltd. Proprietary & Confidential 11 JUN. 29, 2001 Version: 1.0 SPOD80A 8. APPLICATION CIRCUIT VLED 0.1µF ... SPOD80A O80 O1 ... DIO2C L/R Col/Row Mode1/2 CV O80 O80 DIO2R L/R Col/Row Mode1/2 CV SPOD80A O1 DIO1R LD CP DISPOFF 0.1µF SPOD80A OLED PANEL 160X160 VDD DIO2R L/R Col/Row Mode1/2 CV ... VBS BTV BTR RB1 SPOD80A DIO1R LD CP DISPOFF VDD 0.1µF DIO1C LD CP DISPOFF VDD ... VBS BTV BTR RB1 DIO2C L/R Col/Row Mode1/2 CV VBS RB1 BTR BTV O1 VBS RB1 BTR BTV DIO1C LD CP DISPOFF DIP/DL3 LP CP FP LCDENP/LCDEN SPL512A/ SPL130A 0.1µF VDD © Sunplus Technology Co., Ltd. Proprietary & Confidential 12 JUN. 29, 2001 Version: 1.0 SPOD80A 9. PACKAGE/PAD LOCATIONS O16 O15 O14 O13 O12 O11 O10 O9 O8 O7 O6 O5 O4 O3 O2 O1 VSS1 DIO2C DIO2R DISPOFF CV LD CP DIO1C DIO1R VDD1 BTV BTR VBS O17 108 VLED 107 FLT 106 DIS2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 O79 O78 O77 O76 O75 O74 O73 O72 O71 O70 O69 O68 O80 RB1 31 32 33 34 35 36 37 38 39 40 41 42 43 O66 O65 O67 44 50 45 L/R 46 49 48 VSS2 47 O64 9.1. PAD Assignment Y COL/ROW 51 X (0,0) O18 102 101 O19 100 O20 99 O21 98 O22 97 O23 96 O24 95 O25 94 93 O27 O26 92 O28 91 O29 90 O30 89 O31 88 O32 87 O33 86 O34 85 O35 84 O36 83 82 O38 O37 81 O39 80 O40 79 VLED 78 VSS2 77 O41 76 O42 75 73 74 O44 O43 O45 72 O46 71 O47 70 O48 69 O49 68 O50 67 O51 66 O52 65 O53 O54 O55 O56 O57 O58 O59 O60 O61 O62 O63 64 VSS2 63 VLED 103 62 DIS4 54 61 104 60 53 59 MODE1 58 DIS3 57 105 56 52 55 MODE2 Chip Size: 7960µm x 1470µm PAD Size: 100µm x 100µm This IC substrate should be connected to VSS Note1: Chip size included scribe line. Note2: To ensure that the IC function properly, bond all VDD and VSS pins. Note3: The 0.1µF capacitor between VDD and VSS should be placed to IC as close as possible. 9.2. Ordering Information Product Number Package Type SPOD80A-nnnnV-C Chip form Note1: Code number (nnnnV) is assigned for customer. Note2: Code number (nnnn = 0000 - 9999); version (V = A - Z). © Sunplus Technology Co., Ltd. Proprietary & Confidential 13 JUN. 29, 2001 Version: 1.0 SPOD80A 9.3. PAD Locations PAD No. PAD Name X Y PAD No. PAD Name X Y 1 O17 3329 598 45 O67 -2871 598 2 O16 3169 598 46 O66 -3021 598 3 O15 3019 598 47 O65 -3171 598 4 O14 2869 598 48 O64 -3331 598 5 O13 2729 598 49 VSS2 -3833 586 6 O12 2589 598 50 L/R -3833 383 7 O11 2449 598 51 COL/ROW -3833 127 8 O10 2309 598 52 MODE2 -3833 -128 9 O9 2169 598 53 MODE1 -3833 -384 10 O8 2029 598 54 VLED -3833 -588 11 O7 1889 598 55 O63 -3331 -600 12 O6 1749 598 56 O62 -3171 -600 13 O5 1609 598 57 O61 -3021 -600 14 O4 1469 598 58 O60 -2871 -600 15 O3 1329 598 59 O59 -2731 -600 16 O2 1189 598 60 O58 -2591 -600 17 O1 1049 598 61 O57 -2451 -600 18 VSS1 909 598 62 O56 -2311 -600 19 DIO2C 769 598 63 O55 -2171 -600 20 DIO2R 629 598 64 O54 -2031 -600 21 DISPOFF 489 598 65 O53 -1891 -600 22 CV 349 598 66 O52 -1751 -600 23 LD 209 598 67 O51 -1611 -600 24 CP 69 598 68 O50 -1471 -600 25 DIO1C -71 598 69 O49 -1331 -600 26 DIO1R -211 598 70 O48 -1191 -600 27 VDD1 -351 598 71 O47 -1051 -600 28 BTV -491 598 72 O46 -911 -600 29 BTR -631 598 73 O45 -771 -600 30 VBS -771 598 74 O44 -631 -600 31 RB1 -911 598 75 O43 -491 -600 32 O80 -1051 598 76 O42 -351 -600 33 O79 -1191 598 77 O41 -211 -600 34 O78 -1331 598 78 VSS2 -71 -600 35 O77 -1471 598 79 VLED 69 -600 36 O76 -1611 598 80 O40 209 -600 37 O75 -1751 598 81 O39 349 -600 38 O74 -1891 598 82 O38 489 -600 39 O73 -2031 598 83 O37 629 -600 40 O72 -2171 598 84 O36 769 -600 41 O71 -2311 598 85 O35 909 -600 42 O70 -2451 598 86 O34 1049 -600 43 O69 -2591 598 87 O33 1189 -600 44 O68 -2731 598 88 O32 1329 -600 © Sunplus Technology Co., Ltd. Proprietary & Confidential 14 JUN. 29, 2001 Version: 1.0 SPOD80A PAD No. PAD Name X Y PAD No. PAD Name X Y 89 O31 1469 -600 99 O21 2869 -600 90 O30 1609 -600 100 O20 3019 -600 91 O29 1749 -600 101 O19 3169 -600 92 O28 1889 -600 102 O18 3329 -600 93 O27 2029 -600 103 VSS2 3832 -588 94 O26 2169 -600 104 DIS4 3832 -384 95 O25 2309 -600 105 DIS3 3832 -128 96 O24 2449 -600 106 DIS2 3832 127 97 O23 2589 -600 107 FLT 3832 383 98 O22 2729 -600 108 VLED 3832 586 © Sunplus Technology Co., Ltd. Proprietary & Confidential 15 JUN. 29, 2001 Version: 1.0 SPOD80A 10. DISCLAIMER The information appearing in this publication is believed to be accurate. Integrated circuits sold by Sunplus Technology are covered by the warranty and patent indemnification provisions stipulated in the terms of sale only. SUNPLUS makes no warranty, express, statutory implied or by description regarding the information in this publication or regarding the freedom of the described chip(s) from patent infringement. MERCHANTABILITY OR FITNESS FOR ANY PURPOSE. prices at any time without notice. FURTHERMORE, SUNPLUS MAKES NO WARRANTY OF SUNPLUS reserves the right to halt production or alter the specifications and Accordingly, the reader is cautioned to verify that the data sheets and other information in this publication are current before placing orders. Products described herein are intended for use in normal commercial applications. Applications involving unusual environmental or reliability requirements, e.g. military equipment or medical life support equipment, are specifically not recommended without additional processing by SUNPLUS for such applications. Please note that application circuits illustrated in this document are for reference purposes only. © Sunplus Technology Co., Ltd. Proprietary & Confidential 16 JUN. 29, 2001 Version: 1.0 SPOD80A 11. REVISION HISTORY Date Revision # Description APR. 30, 2001 0.1 Original JUN. 29, 2001 1.0 1. Delete “PRELIMINARY” Page 11 2. Correct PACKAGE description in the “3. PACKAGE” 1 3. Correct chip size 13 4. Add Note1 to Note3 in the “9.1 PAD Assignment” 13 5. Renew to a new document format © Sunplus Technology Co., Ltd. Proprietary & Confidential 17 JUN. 29, 2001 Version: 1.0