Advance Technical Information IXTH 88N15 IXTT 88N15 High Current Power MOSFET V DSS I D25 = = = RDS(on) 150 V 88 A Ω 22 mΩ N-Channel Enhancement Mode Symbol Test Conditions V DSS V DGR TJ = 25°C to 150°C TJ = 25°C to 150°C; RGS = 1 MΩ 150 150 V V VGS VGSM Continuous Transient ±20 ±30 V V I D25 TC = 25°C 88 A I DM TC = 25°C, pulse width limited by TJM 352 A I AR TC = 25°C 88 A EAR TC = 25°C 50 mJ EAS TC = 25°C 1.5 J dv/dt Maximum Ratings IS ≤ IDM, di/dt ≤ 100 A/µs, VDD ≤ VDSS, 5 V/ns 400 W -55 ... +150 150 -55 ... +150 °C °C °C 300 °C TJ ≤ 150°C, RG = 2 Ω PD TC = 25°C TJ TJM Tstg TL 1.6 mm (0.062 in.) from case for 10 s Md Mounting torque Weight TO-247 AD TO-268 1.13/10 Nm/lb.in. 6 4 g g TO-247 AD (IXTH) (TAB) TO-268 (IXTT) Case Style G G = Gate S = Source Features z z z z z Symbol Test Conditions (TJ = 25°C, unless otherwise specified) Characteristic Values Min. Typ. Max. V DSS VGS = 0 V, ID = 250 µA 150 VGS(th) V DS = VGS, ID = 250µA 2.0 IGSS VGS = ±20 VDC, VDS = 0 IDSS VDS = VDSS VGS = 0 V R DS(on) V 4.0 V ±100 nA TJ = 25°C TJ = 125°C 25 1 µA mA VGS = 10 V, ID = 0.5 ID25 Pulse test, t ≤ 300 µs, duty cycle d ≤ 2 % 22 mΩ © 2003 IXYS All rights reserved (TAB) S D = Drain TAB = Drain International standard packages Low RDS (on) HDMOSTM process Rugged polysilicon gate cell structure Unclamped Inductive Switching (UIS) rated Low package inductance - easy to drive and to protect Advantages z z z Easy to mount Space savings High power density DS99034(04/03) IXTH 88N15 IXTT 88N15 Symbol Test Conditions Characteristic Values (TJ = 25°C, unless otherwise specified) Min. Typ. Max. g fs VDS = 10 V; ID = 0.5 ID25, pulse test 48 S 4000 pF 1150 pF C rss 440 pF td(on) 24 ns Ciss C oss VGS = 0 V, VDS = 25 V, f = 1 MHz 35 tr VGS = 10 V, VDS = 0.5 VDSS, ID = 0.5 ID25 33 ns td(off) RG = 2 Ω (External) 80 ns 18 ns 170 nC tf Qg(on) Qgs VGS = 10 V, VDS = 0.5 VDSS, ID = 0.5 ID25 Qgd 40 nC 105 nC RthJC RthCK 0.31 (TO-247) Source-Drain Diode 0.25 K/W Characteristic Values (TJ = 25°C, unless otherwise specified) min. typ. max. Symbol Test Conditions IS VGS = 0 V I SM Repetitive VSD IF = IS, VGS = 0 V, Pulse test, t ≤ 300 µs, duty cycle d ≤ 2 % Trr IF = 25A -di/dt = 100 A/µs VR = 100V QRM K/W 88 A 352 A 1.5 V 150 ns 2.5 µC TO-247 AD Outline 1 2 3 Terminals: 1 - Gate 3 - Source Dim. 2 - Drain Tab - Drain Millimeter Min. Max. A 4.7 5.3 A1 2.2 2.54 A2 2.2 2.6 b 1.0 1.4 b1 1.65 2.13 b2 2.87 3.12 C .4 .8 D 20.80 21.46 E 15.75 16.26 e 5.20 5.72 L 19.81 20.32 L1 4.50 ∅P 3.55 3.65 Q 5.89 6.40 R 4.32 5.49 S 6.15 BSC Inches Min. Max. .185 .209 .087 .102 .059 .098 .040 .055 .065 .084 .113 .123 .016 .031 .819 .845 .610 .640 0.205 0.225 .780 .800 .177 .140 .144 0.232 0.252 .170 .216 242 BSC TO-268 Outline Terminals: 1 - Gate 3 - Source 2 - Drain Tab - Drain Min Recommended Footprint IXYS reserves the right to change limits, test conditions, and dimensions. IXYS MOSFETs and IGBTs are covered by one or more of the following U.S. patents: 4,835,592 4,881,106 5,017,508 5,049,961 5,187,117 5,486,715 6,306,728B1 6,259,123B1 6,306,728B1 4,850,072 4,931,844 5,034,796 5,063,307 5,237,481 5,381,025 6,404,065B1 6,162,665 6,534,343