MegaMOSTMFET IXTH 30N50 N-Channel Enhancement Mode Symbol Test Conditions Maximum Ratings V DSS TJ = 25°C to 150°C 500 V V DGR TJ = 25°C to 150°C; RGS = 1 MΩ 500 V VGS Continuous ±20 V VGSM Transient ±30 V ID25 TC = 25°C 30 A IDM TC = 25°C, pulse width limited by TJM 120 A PD TC = 25°C 360 W -55 ... +150 °C TJ TJM 150 °C Tstg -55 ... +150 °C 300 °C TL 1.6 mm (0.063 in) from case for 10 s Md Mounting torque 1.13/10 Nm/lb.in. Weight Symbol V DSS VGS(th) 6 Test Conditions g Characteristic Values (TJ = 25°C, unless otherwise specified) min. typ. max. VGS = 0 V, ID = 5 mA BVDSS temperature coefficient 500 VDS = VGS, ID = 250 µA VGS(th) temperature coefficient 2 IGSS VGS = ±20 VDC, VDS = 0 IDSS VDS = 0.8 • VDSS VGS = 0 V R DS(on) VGS = 10 V, ID = 0.5 • ID25 30N50 Pulse test, t ≤ 300 µs, duty cycle d ≤ 2 % TJ = 25°C TJ = 125°C V %/k .087 4 V %/k ±100 nA 200 3 µA mA 0.17 Ω -0.25 VDSS = 500 V 30 A ID (cont) = RDS(on) = 0.17 Ω TO-247 AD D (TAB) G = Gate, S = Source, Features z International standard package JEDEC TO-247 AD z Low RDS (on) HDMOSTM process z Rugged polysilicon gate cell structure z Fast switching times Applications z z z z Switch-mode and resonant-mode power supplies Motor controls Uninterruptible Power Supplies (UPS) DC choppers Advantages z z z © 2002 IXYS All rights reserved D = Drain, TAB = Drain Easy to mount with 1 screw (TO-247) (isolated mounting screw hole) Space savings High power density 94569-E (8/02) IXTH 30N50 Symbol Test Conditions Characteristic Values (TJ = 25°C, unless otherwise specified) min. typ. max. gfs VDS = 10 V; ID = 0.5 • ID25, pulse test 28 S 5680 pF 635 pF Crss 240 pF td(on) 35 ns 42 ns 110 ns 26 ns 227 nC 29 nC 110 nC Ciss Coss VGS = 0 V, VDS = 25 V, f = 1 MHz tr VGS = 10 V, VDS = 0.5 • VDSS, ID = 0.5 ID25 td(off) RG = 1 Ω, (External) 18 tf Qg(on) Qgs VGS = 10 V, VDS = 0.5 • VDSS, ID = 0.5 ID25 Qgd 0.35 RthJC RthCK 0.15 Source-Drain Diode K/W K/W Characteristic Values (TJ = 25°C, unless otherwise specified) min. typ. max. Symbol Test Conditions IS VGS = 0 V ISM Repetitive; pulse width limited by TJM VSD IF = IS, VGS = 0 V, Pulse test, t ≤ 300 µs, duty cycle d ≤ 2 % trr IF = IS, -di/dt = 100 A/µs, VR = 100 V 30 A 120 A 1.5 V 850 TO-247 AD Outline 1 2 3 Terminals: 1 - Gate 3 - Source Dim. 2 - Drain Tab - Drain Millimeter Min. Max. A 4.7 5.3 A1 2.2 2.54 A2 2.2 2.6 b 1.0 1.4 b1 1.65 2.13 b2 2.87 3.12 C .4 .8 D 20.80 21.46 E 15.75 16.26 e 5.20 5.72 L 19.81 20.32 L1 4.50 ∅P 3.55 3.65 Q 5.89 6.40 R 4.32 5.49 S 6.15 BSC Inches Min. Max. .185 .209 .087 .102 .059 .098 .040 .055 .065 .084 .113 .123 .016 .031 .819 .845 .610 .640 0.205 0.225 .780 .800 .177 .140 .144 0.232 0.252 .170 .216 242 BSC ns IXYS reserves the right to change limits, test conditions, and dimensions. IXYS MOSFETs and IGBTs are covered by one or more of the following U.S. patents: 4,835,592 4,850,072 4,881,106 4,931,844 5,017,508 5,034,796 5,049,961 5,063,307 5,187,117 5,237,481 5,486,715 5,381,025 6,306,728B1