DATA SHEET MOS FIELD EFFECT TRANSISTOR μ PA2650T1E DUAL N-CHANNEL MOSFET FOR SWITCHING PIN CONNECTION (Top View) DESCRIPTION The μ PA2650T1E is a switching device, which can be driven directly by a 4.5 V power source. 1 6 2 5 3 4 MOSFET2 The μ PA2650T1E contains dual MOSFET which features a low on-state resistance and excellent switching characteristics, MOSFET1 and is suitable for applications such as DC/DC converter of portable machine and so on. FEATURES • 4.5 V drive available MOSFET • Low on-state resistance MOSFET MOSFET1 RDS(on)1 = 48 mΩ TYP. (VGS = 10 V, ID = 3.0 A) RDS(on)2 = 55 mΩ TYP. (VGS = 4.5 V, ID = 3.0 A) MOSFET2 RDS(on)1 = 50 mΩ TYP. (VGS = 10 V, ID = 3.0 A) 1: Gate1 2: Drain1/Source2 (Heat sink2) 3: Gate2 4: Drain2 (Heat sink1) 5: Drain1/Source2 (Heat sink2) 6: Source1 RDS(on)2 = 57 mΩ TYP. (VGS = 4.5 V, ID = 3.0 A) ORDERING INFORMATION PART NUMBER PACKAGE μ PA2650T1E 6LD3x3MLP Marking: A2650 Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. Caution This product is electrostatic-sensitive device due to low ESD capability and should be handled with caution for electrostatic discharge. VESD = ±150 V TYP. (C = 200 pF, R = 0 Ω, Single Pulse) The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. G18749EJ1V0DS00 (1st edition) Date Published May 2007 NS CP(K) Printed in Japan 2007 μ PA2650T1E ABSOLUTE MAXIMUM RATINGS (TA = 25°C) MOSFET1, MOSFET2 Drain to Source Voltage (VGS = 0 V) VDSS 20 V Gate to Source Voltage (VDS = 0 V) VGSS ±12 V ID(DC) ±3.8 A ID(pulse) ±15.2 A PT 1.1 W Channel Temperature Tch 150 °C Storage Temperature Tstg −55 to +150 °C Drain Current (DC) Note1 Drain Current (pulse) Note2 Total Power Dissipation Note1 2 Notes 1. Mounted on a 1 in pad of 2 oz copper, 1.5" x 1.5" x 0.062" thick FR-4 board 2 2 (Cu pad: 322 mm x 70 μm, FR-4: 1452 mm x 1.6 mmt) 2. PW ≤ 10 μs, Duty Cycle ≤ 1% 2 FET side: 97°C/W when mounted on a 1 in pad of 2 oz copper 2 Data Sheet G18749EJ1V0DS μ PA2650T1E ELECTRICAL CHARACTERISTICS (TA = 25°C) MOSFET1, MOSFET2 CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Zero Gate Voltage Drain Current IDSS VDS = 20 V, VGS = 0 V 1 μA Gate Leakage Current IGSS VGS = ±12 V, VDS = 0 V ±10 μA VGS(th) VDS = VGS, ID = 0.25 mA 0.6 2.0 V | yfs | VDS = 10 V, ID = 1.5 A 1.0 Gate to Source Threshold Voltage Forward Transfer Admittance Note Drain to Source On-state Resistance Note RDS(on)1 RDS(on)2 3.6 S VGS = 10 V, MOSFET1 48 65 mΩ ID = 3.0 A MOSFET2 50 65 mΩ VGS = 4.5 V, MOSFET1 55 75 mΩ ID = 3.0 A MOSFET2 57 75 mΩ Input Capacitance Ciss VDS = 10 V, 220 pF Output Capacitance Coss VGS = 0 V, 100 pF Reverse Transfer Capacitance Crss f = 1.0 MHz 40 pF Turn-on Delay Time td(on) VDD = 10 V, ID = 1.5 A, 8.4 ns Rise Time tr VGS = 4.5 V, 7.3 ns Turn-off Delay Time td(off) RG = 10 Ω 15 ns Fall Time tf 3.4 ns Total Gate Charge QG VDD = 16 V, 2.9 nC Gate to Source Charge QGS VGS = 4.5 V, 0.6 nC QGD ID = 3.0 A 1.0 nC VF(S-D) IF = 3.0 A, VGS = 0 V 0.89 V Gate to Drain Charge Body Diode Forward Voltage Note Note Pulsed: PW ≤ 350 μs, Duty Cycle ≤ 2% TEST CIRCUIT 1 SWITCHING TIME TEST CIRCUIT 2 GATE CHARGE D.U.T. RL RG PG. VGS VGS Wave Form 0 VGS 10% IG = 2 mA RL 50 Ω VDD VDD 90% ID 90% ID VGS 0 D.U.T. 90% ID 0 10% PG. 10% Wave Form τ τ = 1 μs Duty Cycle ≤ 1% td(on) tr ton td(off) tf toff Data Sheet G18749EJ1V0DS 3 μ PA2650T1E MOSFET TYPICAL CHARACTERISTICS (TA = 25°C) DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE 1.6 Mounted on FR-4 board of 1452 mm2 x 1.6 mmt PT - Total Power Dissipation - W dT - Percentage of Rated Power - % 120 100 80 60 40 20 1.2 0.8 0.4 0 0 0 25 50 75 100 125 150 175 0 25 TA - Ambient Temperature - °C 50 75 100 ID - Drain Current - A 100 R (o DS n) G (V S ID(pulse) d it e Lim V ) 5 . =4 PW i m s i 1i 0 1 =1 m s i ID(DC) DC 0.1 Single Pulse Mounted on FR-4 board of 0.01 1452 mm2 x 1.6 mmt 0.1 1 10 100 VDS - Drain to Source Voltage - V rth(ch-A) - Transient Thermal Resistance - °C/W TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 100 10 MOSFET1, 2 Single Pulse 2 Mounted on FR-4 board of 1452 mm x 1.6 mmt 2 2 Cu pad of 645 mm x 70 μm (1 in ) 1 0.1 100 μ 1m 10 m 100 m 1 PW - Pulse Width - s 4 150 TA - Ambient Temperature - °C FORWARD BIAS SAFE OPERATING AREA 10 125 Data Sheet G18749EJ1V0DS 10 100 1000 175 μ PA2650T1E DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS 15 100 ID - Drain Current - A ID - Drain Current - A VGS = 10 V 4.5 V 10 2.5 V 5 10 TA = −25°C 25°C 75°C 125°C 1 0.1 VDS = 10 V Pulsed Pulsed 0 0.01 0 0.5 1 0 0.5 VDS - Drain to Source Voltage - V | yfs | - Forward Transfer Admittance - S VDS = VGS ID = 0.25 mA 1 0.5 0 25 50 75 2 2.5 3 FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 100 125 150 10 TA = −25°C 25°C 75°C 125°C 1 VDS = 10 V Pulsed 0.1 0.01 0.1 1 10 Tch - Channel Temperature - °C ID - Drain Current - A DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 100 80 60 4.5 V 40 10 V 20 0 0.01 MOSFET1 Pulsed 0.1 1 10 100 RDS(on) - Drain to Source On-state Resistance - mΩ VGS(th) - Gate to Source Threshold Voltage - V RDS(on) - Drain to Source On-state Resistance - mΩ 1.5 0 1.5 VGS - Gate to Source Voltage - V GATE TO SOURCE THRESHOLD VOLTAGE vs. CHANNEL TEMPERATURE -50 -25 1 100 80 4.5 V 60 10 V 40 20 0 0.01 ID - Drain Current - A MOSFET2 Pulsed 0.1 1 10 100 ID - Drain Current - A Data Sheet G18749EJ1V0DS 5 μ PA2650T1E 120 ID = 3.0 A 100 80 1.5 A 60 40 MOSFET1 Pulsed 20 0 0 2 4 6 8 10 RDS(on) - Drain to Source On-state Resistance - mΩ 140 DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 120 80 1.5 A 60 40 MOSFET2 Pulsed 20 0 0 2 4 6 8 10 DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 140 120 100 VGS = 4.5 V 80 60 10 V 40 MOSFET1 ID = 3.0 A Pulsed 20 0 -50 -25 0 25 50 75 100 125 150 140 120 100 VGS = 4.5 V 80 60 10 V 40 MOSFET2 ID = 3.0 A Pulsed 20 0 -50 -25 0 25 50 75 100 125 150 Tch - Channel Temperature - °C Tch - Channel Temperature - °C CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE SWITCHING CHARACTERISTICS td(on), tr, td(off), tf - Switching Time - ns 100 Ciss 100 Coss Crss VGS = 0 V f = 1.0 MHz 10 0.01 VDD = 10 V VGS = 4.5 V RG = 10 Ω td(off) td(on) 10 tr tf 1 0.1 1 10 100 0.1 VDS - Drain to Source Voltage - V 6 ID = 3.0 A 100 VGS - Gate to Source Voltage - V 1000 Ciss, Coss, Crss - Capacitance - pF 140 VGS - Gate to Source Voltage - V RDS(on) - Drain to Source On-state Resistance - mΩ RDS(on) - Drain to Source On-state Resistance - mΩ RDS(on) - Drain to Source On-state Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 1 10 ID - Drain Current - A Data Sheet G18749EJ1V0DS 100 μ PA2650T1E SOURCE TO DRAIN DIODE FORWARD VOLTAGE DYNAMIC INPUT CHARACTERISTICS 6 MOSFET1, 2 VGS = 0 V Pulsed 10 VGS - Gate to Source Voltage - V IF - Diode Forward Current - A 100 1 0.1 VDD = 16 V 10 V 4V 4 2 ID = 3.0 A 0 0.01 0 0.2 0.4 0.6 0.8 1 1.2 1.4 0 0.5 1 1.5 2 2.5 3 QG - Gate Charge - nC VF(S-D) - Source to Drain Voltage - V Data Sheet G18749EJ1V0DS 7 μ PA2650T1E PACKAGE DRAWING (Unit: mm) 3 0.2 RFE 3 A B +0.03 0.02 −0.02 2x 0.15 C C 0.15 C 2 x 0.1 2 0.95 PIN CONNECTION 0.75 0.4 5 1 0.95 0.05 6 1.1 6x 0.2 MIN. 0.08 C 0.4 ±0.05 0.1 C Heat sink 2 0.9 ±0.1 0.4 ±0.05 4 8 3 1.6 ±0.05 Heat sink 1 Data Sheet G18749EJ1V0DS 1: Gate1 2: Drain1/Source2 (Heat sink2) 3: Gate2 4: Drain2 (Heat sink1) 5: Drain1/Source2 (Heat sink2) 6: Source1 μ PA2650T1E • The information in this document is current as of May, 2007. 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