AO4801 30V P-Channel MOSFET General Description Product Summary The AO4801 uses advanced trench technology to provide excellent RDS(ON), low gate charge and operation with gate voltages as low as 2.5V. This device is suitable for use as a load switch or in PWM applications. It may be used in a common drain arrangement to form a bidirectional blocking switch. VDS ID (at VGS=-10V) -30V -5A RDS(ON) (at VGS=-10V) < 48mΩ RDS(ON) (at VGS =-4.5V) < 57mΩ RDS(ON) (at VGS =-2.5V) < 80mΩ 100% UIS Tested 100% Rg Tested SOIC-8 Top View D2 D1 Bottom View SOIC-8 Top View S2 G2 S1 G1 1 2 3 4 8 7 6 5 D2 D2 D1 D1 G2 G1 S1 S2 Pin1 Absolute Maximum Ratings TA=25°C unless otherwise noted Symbol Parameter Drain-Source Voltage VDS Gate-Source Voltage Continuous Drain Current VGS TA=25°C Units V ±12 V -5 ID TA=70°C Maximum -30 A -4 Pulsed Drain Current C IDM Avalanche Current C IAS, IAR 11 A Avalanche energy L=0.3mH C TA=25°C EAS, EAR 18 mJ Power Dissipation B Junction and Storage Temperature Range Rev 4: Feb. 2011 2 PD TA=70°C Thermal Characteristics Parameter Maximum Junction-to-Ambient A Maximum Junction-to-Ambient A D Maximum Junction-to-Lead -28 TJ, TSTG Symbol t ≤ 10s Steady-State Steady-State W 1.3 RθJA RθJL www.aosmd.com -55 to 150 Typ 48 74 32 °C Max 62.5 90 40 Units °C/W °C/W °C/W Page 1 of 5 AO4801 Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol Parameter STATIC PARAMETERS Drain-Source Breakdown Voltage BVDSS Conditions Min ID=-250µA, VGS=0V -30 Typ -1 Zero Gate Voltage Drain Current IGSS VGS(th) Gate-Body leakage current VDS=0V, VGS= ±12V Gate Threshold Voltage VDS=VGS ID=-250µA -0.5 ID(ON) On state drain current VGS=-4.5V, VDS=-5V -28 TJ=55°C ±100 nA -0.9 -1.3 V 40 48 48 60 VGS=-4.5V, ID=-3.5A 45 57 mΩ 80 mΩ TJ=125°C A RDS(ON) Static Drain-Source On-Resistance VGS=-2.5V, ID=-2.5A 60 gFS Forward Transconductance VDS=-5V, ID=-5A 18 VSD Diode Forward Voltage IS=-1A,VGS=0V -0.7 IS Maximum Body-Diode Continuous Current DYNAMIC PARAMETERS Ciss Input Capacitance Output Capacitance Reverse Transfer Capacitance Rg Gate resistance VGS=0V, VDS=-15V, f=1MHz Gate Source Charge Qgd Gate Drain Charge tD(on) Turn-On DelayTime tr Turn-On Rise Time tD(off) Turn-Off DelayTime tf trr Body Diode Reverse Recovery Time Qrr mΩ S -1 V -2.5 A 645 pF 80 pF 55 VGS=0V, VDS=0V, f=1MHz SWITCHING PARAMETERS Qg(4.5V) Total Gate Charge Qgs µA -5 VGS=-10V, ID=-5A Crss Units V VDS=-30V, VGS=0V IDSS Coss Max VGS=-4.5V, VDS=-15V, ID=-5A 4 7.8 pF Ω 12 7 nC 1.5 nC 2.5 nC 6.5 ns VGS=-10V, VDS=-15V, RL=3Ω, RGEN=6Ω 3.5 ns 41 ns 9 ns IF=-5A, dI/dt=100A/µs 11 Body Diode Reverse Recovery Charge IF=-5A, dI/dt=100A/µs 3.5 ns nC Turn-Off Fall Time A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The value in any given application depends on the user's specific board design. B. The power dissipation PD is based on TJ(MAX)=150°C, using ≤ 10s junction-to-ambient thermal resistance. C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep initialTJ=25°C. D. The RθJA is the sum of the thermal impedence from junction to lead RθJL and lead to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max. F. These curves are based on the junction-to-ambient thermal impedence which is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse ratin g. THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE. Rev 4: Feb. 2011 www.aosmd.com Page 2 of 5 AO4801 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 30 20 -10V VDS=-5V 25 -4.5V 15 -3V -ID(A) -ID (A) 20 15 -2.5V 125°C 10 10 25°C 5 5 VGS=-2V 0 0 0 1 2 3 4 0 5 0.5 90 1.5 2 2.5 3 Normalized On-Resistance 1.8 VGS=-2.5V 70 RDS(ON) (mΩ ) 1 -VGS(Volts) Figure 2: Transfer Characteristics (Note E) -VDS (Volts) Fig 1: On-Region Characteristics (Note E) VGS=-4.5V 50 30 VGS=-10V VGS=-4.5V ID=-3.5A 1.6 VGS=-10V ID=-5A 1.4 VGS17 =-2.5V 5 ID=-2.5A 1.2 2 10 1 0.8 10 0 2 4 6 8 0 10 -ID (A) Figure 3: On-Resistance vs. Drain Current and Gate Voltage (Note E) 25 50 75 100 125 150 175 Temperature (°C) 0 Figure 4: On-Resistance vs. Junction Temperature 18 (Note E) 100 1.0E+01 ID=-5A 1.0E+00 40 80 125°C 1.0E-01 -IS (A) RDS(ON) (mΩ ) 125°C 60 1.0E-02 25°C 1.0E-03 40 25°C 1.0E-04 1.0E-05 20 0 2 4 6 8 10 -VGS (Volts) Figure 5: On-Resistance vs. Gate-Source Voltage (Note E) Rev 4: Feb. 2011 www.aosmd.com 0.0 0.2 0.4 0.6 0.8 1.0 1.2 -VSD (Volts) Figure 6: Body-Diode Characteristics (Note E) Page 3 of 5 AO4801 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 1200 5 VDS=-15V ID=-5A 1000 Ciss Capacitance (pF) -VGS (Volts) 4 3 2 800 600 400 Coss 1 0 0 0 3 6 9 Qg (nC) Figure 7: Gate-Charge Characteristics 12 0 100.0 5 10 15 20 25 -VDS (Volts) Figure 8: Capacitance Characteristics 30 10000 RDS(ON) limited 10.0 TJ(Max)=150°C TA=25°C 10µs 1000 100µs 1.0 Power (W) -ID (Amps) Crss 200 1ms 10ms TJ(Max)=150°C TA=25°C 0.1 10 1s 10s DC 1 0.00001 0.0 0.1 1 10 100 100 -VDS (Volts) 0.001 0.1 10 1000 Pulse Width (s) Figure 10: Single Pulse Power Rating Junction-toAmbient (Note F) Figure 9: Maximum Forward Biased Safe Operating Area (Note F) Zθ JA Normalized Transient Thermal Resistance 10 D=Ton/T TJ,PK=TA+PDM.ZθJA.RθJA RθJA=90°C/W In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 1 0.1 PD Ton Single Pulse 0.01 0.00001 0.0001 0.001 0.01 0.1 1 T 10 100 1000 Pulse Width (s) Figure 11: Normalized Maximum Transient Thermal Impedance (Note F) Rev 4: Feb. 2011 www.aosmd.com Page 4 of 5 AO4801 Gate Charge Test Circuit & Waveform Vgs Qg -10V - - VDC + VDC Qgd Qgs Vds + DUT Vgs Ig Charge Resistive Switching Test Circuit & Waveforms RL Vds toff ton Vgs - DUT Vgs VDC td(on) t d(off) tr tf 90% Vdd + Rg Vgs 10% Vds Unclamped Inductive Switching (UIS) Test Circuit & Waveforms 2 L E AR= 1/2 LIAR Vds Vds Id - Vgs Vgs VDC + Rg BVDSS Vdd Id I AR DUT Vgs Vgs Diode Recovery Test Circuit & Waveforms Q rr = - Idt Vds + DUT Vgs Vds Isd Vgs Ig Rev 4: Feb. 2011 L -Isd + Vdd t rr dI/dt -I RM Vdd VDC - -I F -Vds www.aosmd.com Page 5 of 5