NL17SZ125 Non−Inverting 3−State Buffer The NL17SZ125 is a high performance noninverting buffer operating from a 1.65 V to 5.5 V supply. • • • • • • • • • • Extremely High Speed: tPD 2.6 ns (typical) at VCC = 5.0 V Designed for 1.65 V to 5.5 V VCC Operation Over Voltage Tolerant Inputs and Outputs LVTTL Compatible − Interface Capability With 5.0 V TTL Logic with VCC = 3.0 V LVCMOS Compatible 24 mA Balanced Output Sink and Source Capability Near Zero Static Supply Current Substantially Reduces System Power Requirements 3−State OE Input is Active−Low Replacement for NC7SZ125 Chip Complexity = 36 FETs http://onsemi.com MARKING DIAGRAM 5 5 M0d 1 SC70−5/SC−88A/SOT−353 DF SUFFIX CASE 419A 1 d = Date Code PIN ASSIGNMENT OE 1 IN A 2 GND 3 VCC 5 1 OE 2 IN A 3 GND 4 OUT Y 5 VCC FUNCTION TABLE 4 OUT Y Figure 1. Pinout (Top View) OE Input A Input Y Output L L H L H X L H Z X = Don’t Care OE EN IN A ORDERING INFORMATION OUT Y See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. Figure 2. Logic Symbol Semiconductor Components Industries, LLC, 2004 March, 2004 − Rev. 2 1 Publication Order Number: NL17SZ125/D NL17SZ125 MAXIMUM RATINGS Symbol Parameter Value Unit VCC DC Supply Voltage 0.5 to 7.0 V VIN DC Input Voltage 0.5 to 7.0 V VOUT DC Output Voltage 0.5 to 7.0 V IIK DC Input Diode Current 50 mA IOK DC Output Diode Current 50 mA IOUT DC Output Sink Current 50 mA ICC DC Supply Current per Supply Pin 100 mA TSTG Storage Temperature Range 65 to 150 °C TL Lead Temperature, 1 mm from Case for 10 Seconds 260 °C TJ Junction Temperature Under Bias 150 °C JA Thermal Resistance (Note 1) 350 °C/W PD Power Dissipation in Still Air at 85°C 150 mW MSL Moisture Sensitivity FR Flammability Rating VESD ESD Withstand Voltage Level 1 Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in 2000 200 N/A Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) V Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum−rated conditions is not implied. Functional operation should be restricted to the Recommended Operating Conditions. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace with no air flow. 2. Tested to EIA/JESD22−A114−A. 3. Tested to EIA/JESD22−A115−A. 4. Tested to JESD22−C101−A. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit 1.65 5.5 V VCC DC Supply Voltage VIN DC Input Voltage 0 5.5 V VOUT DC Output Voltage 0 5.5 V TA Operating Temperature Range 40 85 °C tr, tf Input Rise and Fall Time 0 0 0 0 20 20 10 5.0 ns/V VCC = 1.8 V 0.15 V VCC = 2.5 V 0.2 V VCC = 3.0 V 0.3 V VCC = 5.0 V 0.5 V 47.9 100 178,700 20.4 110 79,600 9.4 120 37,000 4.2 130 17,800 2.0 140 8,900 1.0 TJ = 80°C 117.8 419,300 TJ = 90°C 1,032,200 90 TJ = 100°C 80 TJ = 110°C Time, Years TJ = 120°C Time, Hours FAILURE RATE OF PLASTIC = CERAMIC UNTIL INTERMETALLICS OCCUR TJ = 130°C Junction Temperature °C NORMALIZED FAILURE RATE DEVICE JUNCTION TEMPERATURE VERSUS TIME TO 0.1% BOND FAILURES 1 1 10 100 1000 TIME, YEARS Figure 3. Failure Rate vs. Time Junction Temperature http://onsemi.com 2 NL17SZ125 DC ELECTRICAL CHARACTERISTICS Symbol Parameter Min 0.75 VCC 0.7 VCC VIH High−Level Input Voltage 1.65 to 1.95 2.3 to 5.5 VIL Low−Level Input Voltage 1.65 to 1.95 2.3 to 5.5 VOH High−Level Output Voltage VIN = VIH VOL Low−Level Output Voltage VIN = VIL IIN Input Leakage Current IOZ 3−State Output Leakage IOFF Power Off Leakage Current ICC Quiescent Supply Current 40C TA 85C TA = 25C VCC (V) Typ Max Min Max 0.75 VCC 0.7 VCC 0.25 VCC 0.3 VCC Unit Condition V 0.25 VCC 0.3 VCC V 1.65 1.8 2.3 3.0 4.5 1.55 1.7 2.2 2.9 4.4 1.65 1.8 2.3 3.0 4.5 1.55 1.7 2.2 2.9 4.4 V IOH = −100 A 1.65 2.3 3.0 3.0 4.5 1.29 1.9 2.4 2.3 3.8 1.52 2.15 2.80 2.68 4.20 1.29 1.9 2.4 2.3 3.8 V IOH = −4 mA IOH = −8 mA IOH = −16 mA IOH = −24 mA IOH = −32 mA 1.65 1.8 2.3 3.0 4.5 0.0 0.0 0.0 0.0 0.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 V IOL = 100 A 1.65 2.3 3.0 3.0 4.5 0.08 0.10 0.15 0.22 0.22 0.24 0.30 0.40 0.55 0.55 0.24 0.30 0.40 0.55 0.55 V IOL = 4 mA IOL = 8 mA IOL = 16 mA IOL = 24 mA IOL = 32 mA 0 to 5.5 1.0 1.0 A 0 V VIN 5.5 V 1.65 to 5.5 0.5 5.0 A VIN = VIH or VIL 0 V VOUT 5.5 V 0.0 1.0 10 A VIN or VOUT = 5.5 V 1.65 to 5.5 1.0 10 A VIN = 5.5 V, GND AC ELECTRICAL CHARACTERISTICS (tR = tF = 3.0 ns) Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ Parameter Propagation g Delay y AN to t YN (Figures 4 and 5, Table 1) Output Enable Time (Fi (Figures 6, 6 7and 7 d 8, 8 Table T bl 1) Output Disable Time (Fig res 6, 6 7and 8, 8 Table 1) (Figures VCC (V) 40C TA 85C TA = 25C Min Typ Max Min Max Unit RL = 1 M CL = 15 pF 1.8 0.15 2.0 9.0 10 2.0 10.5 ns RL = 1 M CL = 15 pF 2.5 0.2 1.0 7.5 1.0 8.0 RL = 1 M RL = 500 CL = 15 pF F CL = 50 pF 3.3 0.3 0.8 1.2 5.2 5.7 0.8 1.2 5.5 6.0 RL = 1 M RL = 500 CL = 15 5 pF F CL = 50 pF 5.0 0.5 5 00 5 0.5 0 5 0.8 4.5 5 5.0 0.5 0 5 0.8 4.8 8 5.3 RL = 250 CL = 50 pF 1.8 0.15 2.0 9.5 2.0 10 2.5 0.2 1.8 8.5 1.8 9.0 3.3 0.3 1.2 6.2 1.2 6.5 5.0 0.5 0.8 5.5 0.8 5.8 1.8 0.15 2.0 10 2.0 10.5 2.5 0.2 1.5 8.0 1.5 8.5 3.3 0.3 0.8 5.7 0.8 6.0 5.0 0.5 0.3 4.7 0.3 5.0 Condition RL and R1= 500 CL = 50 pF http://onsemi.com 3 7.6 8.0 ns ns NL17SZ125 CAPACITIVE CHARACTERISTICS Symbol Parameter Condition Typical Unit CIN Input Capacitance VCC = 5.5 V, VI = 0 V or VCC 2.5 pF COUT Output Capacitance VCC = 5.5 V, VI = 0 V or VCC 2.5 pF CPD Dissipation Capacitance Power Dissi ation Ca acitance (Note 5) 10 MHz, VCC = 3.3 V, VI = 0 V or VCC 10 MHz, VCC = 5.5 V, VI = 0 V or VCC 9 11 pF F 5. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. http://onsemi.com 4 NL17SZ125 tf = 3 ns tf = 3 ns 90% INPUT A and B OE = GND VCC 90% Vmi INPUT Vmi 10% 10% tPHL OUTPUT CL * GND RL tPLH VOH Vmo OUTPUT Y Vmo *Includes all probe and jig capacitance. A 1 MHz square input wave is recommended for propagation delay tests. VOL Figure 4. Switching Waveform Figure 5. TPLH or TPHL 2 VCC INPUT INPUT R1 = 500 VCC OUTPUT CL = 50 pF OUTPUT RL = 500 CL = 50 pF RL = 250 A 1 MHz square input wave is recommended for propagation delay tests. A 1 MHz square input wave is recommended for propagation delay tests. Figure 6. TPZL or TPL Figure 7. TPZH or TPHZ 2.7 V Vmi Vmi OE 0V tPZH tPHZ VCC VOH − 0.3 V Vmo On ≈0V tPZL tPLZ ≈ 3.0 V Vmo On VOL + 0.3 V GND Figure 8. AC Output Enable and Disable Waveform Table 1. Output Enable and Disable Times tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns VCC Symbol 3.3 V 0.3 V 2.7 V 2.5 V 0.2 V Vmi 1.5 V 1.5 V VCC/2 Vmo 1.5 V 1.5 V VCC/2 http://onsemi.com 5 NL17SZ125 DEVICE ORDERING INFORMATION Device Nomenclature Device Order Number Logic Circuit Indicator No. of Gates per Package Temp Range Identifier NL17SZ125 NL 1 7 Technology Device Function Package Suffix Tape and Reel Suffix Package Type Tape and Reel Size SZ 125 DF T2 SC70−5/SC−88A/ SOT−353 178 mm (7″), 3000 Units http://onsemi.com 6 NL17SZ125 PACKAGE DIMENSIONS SC70−5/SC−88A/SOT−353 DF SUFFIX 5−LEAD PACKAGE CASE 419A−02 ISSUE G A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A−01 OBSOLETE. NEW STANDARD 419A−02. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. G 5 4 −B− S 1 2 3 D 5 PL 0.2 (0.008) M B DIM A B C D G H J K N S M N J C INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC −−− 0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 K H SOLDERING FOOTPRINT* 0.50 0.0197 0.65 0.025 0.65 0.025 0.40 0.0157 1.9 0.0748 SCALE 20:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 7 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC −−− 0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 NL17SZ125 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 8 For additional information, please contact your local Sales Representative. NL17SZ125/D