ETC TPS72116

TPS72101, TPS72115
TPS72116, TPS72118
Actual Size
(3,00 mm x 3,00 mm)
www.ti.com
SLVS352B – DECEMBER 2001 – REVISED MAY 2002
LOW INPUT VOLTAGE, CAP FREE 150-mA
LOW-DROPOUT LINEAR REGULATORS
FEATURES
D 150-mA LDO
D Available in 1.5-V, 1.6-V, 1.8-V Fixed-Output
and Adjustable Versions
D Low Input Voltage Requirement
(Down to 1.8 V)
D Small Output Capacitor, 0.1-µF
D Dropout Voltage Typically 200 mV at 150 mA
D Less Than 1 µA Quiescent Current in
Shutdown Mode
D Thermal Protection
D Over Current Limitation
D 5-Pin SOT-23 (DBV) Package
APPLICATIONS
D
D
D
D
D
D
D
D
D
Portable Communication Devices
Battery Powered Equipment
PCMCIA Cards
Personal Digital Assistants
Modems
voltage (150 mV at full load). Therefore, compared to
many other regulators that require 2.5-V or higher input
voltages for operation, these regulators can be
operated directly from two AAA batteries. Also, the
typical quiescent current (ground pin current) is low,
starting at 85 µA during normal operation and 1 µA in
shutdown mode. These regulators can be operated
very efficiently and, in a battery-powered application,
help extend the longevity of the device.
Similar LDO regulators require 1-µF or larger output
capacitors for stability. However, this regulator uses an
internal compensation scheme that stabilizes the
feedback loop over the full range of input voltages and
load currents with output capacitances as low as
0.1-µF. Ceramic capacitors of this size are relatively
inexpensive and available in small footprints.
This family of regulators is particularly suited as a
portable power supply solution due to its minimal board
space requirement and 1.8-V minimum input voltage.
Being able to use two off-the-shelf, AAA, batteries
makes system design easier and also reduces
component cost. Moreover, the solution will be more
efficient than if a regulator with a higher input voltage is
used.
Bar Code Scanners
DBV PACKAGE
(TOP VIEW)
Backup Power Supplies
SMPS Post Regulation
IN
1
GND
2
EN
3
5
OUT
4
NC/FB
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DESCRIPTION
The TPS721xx family of LDO regulators is available in
fixed voltage options that are commonly used to power
the latest DSP’s and microcontrollers with an adjustable
option ranging from 1.22 V to 2.5 V. These regulators
can be used in a wide variety of applications ranging
from portable, battery-powered equipment to PC
peripherals. The family features operation over a wide
range of input voltages (1.8 V to 5.5 V) and low dropout
1.8 V
TPS72115
IN
EN
0.1 µF
1.5 V
OUT
GND
0.1 µF
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Copyright  2002, Texas Instruments Incorporated
TPS72101, TPS72115
TPS72116, TPS72118
www.ti.com
SLVS352B – DECEMBER 2001 – REVISED MAY 2002
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during
storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
TJ
VOLTAGE
PACKAGE
Adjustable
1.5 V
–40°C
40°C to 125°C
SOT 23
SOT-23
(DBV)
1.6 V
1.8 V
(1) The DBVT indicates tape and reel of 250 parts.
(2) The DBVR indicates tape and reel of 3000 parts.
PART NUMBER
TPS72101DBVT(1)
TPS72101DBVR(2)
(1)
TPS72115DBVT
TPS72115DBVR(2)
TPS72116DBVT(1)
TPS72118DBVT(1)
SYMBOL
PEKI
PEII
TPS72116DBVR(2)
TPS72118DBVR(2)
PHFI
PEJI
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1)
TPS72101, TPS72115
TPS72116, TPS72118
Input voltage range(2)
– 0.3 V to 7 V
Voltage range at EN
–0.3 V to 7 V
Voltage on OUT, FB, NC
–0.3 V to VI + 0.3 V
Peak output current
Internally limited
ESD rating, HBM
3 kV
Continuous total power dissipation
See Dissipation Rating Table
Operating virtual junction temperature range, TJ
– 40°C to 150°C
Storage temperature range, Tstg
– 65°C to 150°C
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
PACKAGE DISSIPATION RATING
BOARD
PACKAGE
RθJC
RθJA
DERATING FACTOR
ABOVE TA = 25°C
TA ≤ 25°C
POWER RATING
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
Low K(1)
High K(2)
DBV
65.8 °C/W
259 °C/W
3.9 mW/°C
386 mW
212 mW
154 mW
DBV
65.8 °C/W
180 °C/W
5.6 mW/°C
555 mW
305 mW
222 mW
(1) The JEDEC Low K (1s) board design used to derive this data was a 3 inch x 3 inch, two-layer board with 2 ounce copper traces on top of the board.
(2) The JEDEC High K (2s2p) board design used to derive this data was a 3 inch x 3 inch, multilayer board with 1 ounce internal power and ground
planes and 2 ounce copper traces on top and bottom of the board.
2
TPS72101, TPS72115
TPS72116, TPS72118
www.ti.com
SLVS352B – DECEMBER 2001 – REVISED MAY 2002
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range VI = VO(typ) + 1 V, IO= 1 mA, EN = VI, Co = 1 µF (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VI
IO
Input voltage(1)
TJ
Operating junction temperature
VO
MIN
Output
Out
ut voltage
0 µA< IO < 150 mA,(1)
1.8 V ≤ VO ≤ 2.5 V
TPS72115
TJ = 25°C
0 µA< IO < 150 mA,
2.5 V ≤ VI ≤ 5.5 V
TPS72116
TJ = 25°C
0 µA< IO < 150 mA,
TPS72118
TJ = 25°C
0 µA< IO < 150 mA,
MAX
V
0
150
mA
–40
125
°C
0.97 VO
1.03 VO
1.5
1.455
1.545
1.6
2.6 V ≤ VI ≤ 5.5 V
1.552
V
1.648
1.8
2.8 V ≤ VI ≤ 5.5 V
1.746
TJ = 25°C
1.854
85
120
I(Q)
Quiescent current (GND current)
Standby current
Vn
Output noise voltage
Vref
Reference voltage
PSRR
IO = 150 mA,
IO = 150 mA
TJ = 25°C
570
EN < 0.5 V,
TJ = 25°C
0.01
Ripple rejection
Current limit
Co = 1 µF
f = 100 Hz, Co = 10 µF,
IO = 150 mA,
See Note 2
TJ = 25°C,
See Note 1
55V
VO + 1 V < VI ≤ 5.5
Output voltage load
regulation
0 < IO < 150 mA,
TPS72118
1
BW = 200 Hz to 100 kHz,
TJ = 25°C,
TJ = 25°C
Out ut voltage line regulation
Output
(∆VO/VO)(3)
V
48
dB
525
0.03
TJ = 25°C
0.5
1.4
EN low level input
–0.2
II
EN iinputt currentt
VDO
(4)
D
Dropout
t voltage
lt
In
Feedback input current
–0.01
EN = IN
–0.01
IO = 150 mA,
IO = 150 mA,
TJ = 25°C
1.2 V ≤ VO ≤ 5.2 V
%/V
mV
0.4
EN = 0 V
mA
0.09
0.1
EN high level input
TPS72101
1.225
175
TJ = 25°C
µA
A
µV
90
VIH
VIL
TPS72118
µA
A
850
EN < 0.5 V
TPS72115
UNIT
5.5
Continuous output current
TPS72101
TYP
1.8
V
µA
A
150
240
TPS72101
1
mV
V
µA
1
Thermal shutdown temperature
Thermal shutdown hysteresis
(1) Minimum IN operating voltage is 1.8 V or VO(max) + VDO (max load), whichever is greater.
(2) Test condition includes, output voltage VO=1 V and pulse duration = 10 mS.
(3) VImin = (VO + 1) or 1.8 V whichever is greater.
Line regulation (mV) + ǒ%ńVǓ
V
ǒ5.5 V * V IminǓ
O
100
170
°C
20
°C
1000
(4) Dropout voltage is defined as the differential voltage between VO and VI when VO drops 100 mV below the value measured with VI = VO + 1 V.
3
TPS72101, TPS72115
TPS72116, TPS72118
www.ti.com
SLVS352B – DECEMBER 2001 – REVISED MAY 2002
FUNCTIONAL BLOCK DIAGRAM—ADJUSTABLE VERSION
TPS72101
OUT
IN
EN
Current Limit
/ Thermal
Protection
Vref
FB
GND
FUNCTIONAL BLOCK DIAGRAM—FIXED VERSION
TPS72115/16/18
OUT
IN
EN
Current Limit
/ Thermal
Protection
Vref
GND
NC (see Note 1)
(1) This pin must be left floating and not connected to GND.
Terminal Functions
TERMINAL
NAME
NO.
I/O
DESCRIPTION
GND
2
EN
3
I
Enable input
IN
1
I
Input supply voltage
NC/FB
4
I
NC = Not connected (see Note 6); FB = Feedback (adjustable option TPS72101)
OUT
5
O
Regulated output voltage
4
Ground
TPS72101, TPS72115
TPS72116, TPS72118
www.ti.com
SLVS352B – DECEMBER 2001 – REVISED MAY 2002
TYPICAL CHARACTERISTICS
TPS72118
TPS72118
TPS72118
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT VOLTAGE
vs
JUNCTION TEMPERATURE
GROUND CURRENT
vs
JUNCTION TEMPERATURE
1.8040
VI = 2.8 V
Co = 1 µF
TJ = 25° C
1.8020
V O – Output Voltage – V
1.8000
1.7999
1.7998
1.7997
1.7996
30
60
90
120
IO – Output Current – mA
1.8000
IO = 1 mA
1.7980
IO = 150 mA
1.7960
200
1.7920
100
IO = 1 mA
Figure 2
OUTPUT IMPEDANCE
vs
FREQUENCY
400
300
TJ = 25° C
200
TJ = –40° C
60
90
1k
VI = 2.8 V
Co = 1 µF
µ V/
TJ = 125° C
500
30
2.5
120
1.5
IO = 150 mA
1
10
IO = 1 mA
1
0.1
IO = 150 mA
0.5
0.01
IO = 1 mA
0
100
150
VI = 2.8 V
Co = 1 µF
100
2
Output Impedance – Ω
Hz
TPS72118
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
Output Spectral Noise Density –
Ground Current – µ A
Figure 3
GROUND CURRENT
vs
OUTPUT CURRENT
100
1k
IO – Output Current – mA
10 k
0.001
100 k
1
f – Frequency – Hz
10
100 1 k 10 k 100 k 1 M
f – Frequency – Hz
Figure 5
Figure 4
10 M
Figure 6
TPS72118
TPS72118
TPS72118
DROPOUT VOLTAGE
vs
JUNCTION TEMPERATURE
POWER SUPPLY RIPPLE REJECTION
vs
FREQUENCY
OUTPUT VOLTAGE, ENABLE VOLTAGE
vs
TIME (START-UP)
70
VI = 2.8 V
Co = 1 µF
200
IO = 150 mA
150
100
50
IO = 10 mA
0
–40 –25 –10 5
20 35 50 65 80 95 110 125
TJ – Junction Temperature – °C
Figure 7
Power Supply Ripple Rejection – dB
250
V DO – Dropout Voltage – mV
20 35 50 65 80 95 110 125
TJ – Junction Temperature – °C
TPS72118
VI = 2.8 V
Co = 1 µF
0
0
–40 –25 –10 5
TPS72118
700
0
300
1.7940
Figure 1
600
IO = 150 mA
400
1.7900
–40 –25 –10 5 20 35 50 65 80 95 110 125
TJ – Junction Temperature – °C
150
VI = 2.8 V
Co = 1 µF
500
VI = 2.8 V
Co = 1 µF
IO = 150 mA
60
50
40
Enable Voltage – V
1.7995
0
600
VEN
3
2
1
0
30
20
10
0
1
10
100
1k
10 k
f – Frequency – Hz
Figure 8
100 k 1 M
V – Output Voltage – V
O
V O – Output Voltage – V
1.8001
700
VI = 2.8 V
Co = 1 µF
Ground Current – µ A
1.8002
2
1
VO
0
0
VI = 2.8 V
VO = 1.8 V
IO = 150 mA
Co = 1 µF
50 100 150 200 200 300 350 400 450 500
t – Time – µs
Figure 9
5
TPS72101, TPS72115
TPS72116, TPS72118
www.ti.com
SLVS352B – DECEMBER 2001 – REVISED MAY 2002
TPS72118
LOAD TRANSIENT RESPONSE
IO = 150 mA
Co = 1 µF
VI
3.8
2.8
dV I
1
dt
VO
+
0.4 V
µs
POWER UP / POWER DOWN
6
VI = 2.8 V
Co = 1 µF
100
5
Power Up / Power Down – V
∆ V O – Change In
Output Voltage – mV
TPS72118
LINE TRANSIENT RESPONSE
0
–100
dI
I O – Output Current – mA
V O – Output Voltage –V
V I – Input Voltage – V
TYPICAL CHARACTERISTICS
O
0.1A
+
µs
dt
150
0
100
-1
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
t – Time – ms
VI
4
3
2
VO
1
Co = 1 µF
Ci = 1 µF
RL = 12 Ω
0
50
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
0
1
10
20 30 40
90 100
Figure 12
Figure 11
Figure 10
50 60 70 80
t – Time – ms
t – Time – ms
TPS72101
DC DROPOUT VOLTAGE
vs
OUTPUT CURRENT
DROPOUT VOLTAGE
vs
INPUT VOLTAGE
250
MINIMUM REQUIRED INPUT VOLTAGE
vs
OUTPUT VOLTAGE
250
TJ = 125°C
150
TJ = 25°C
100
TJ = –40°C
50
0
0
15 30 45 60 75 90 105 120 135 150
IO – Output Current – mA
Figure 13
6
V DO – Dropout Voltage – mV
DC Dropout Voltage – mV
200
200
TJ = 125°C
150
TJ = 25°C
100
TJ = –40°C
50
0
1.8
2.5
3.3
4
VI – Input Voltage – V
Figure 14
4.8
5.5
V I – Minimum Required Input Voltage – V
5.5
IO = 150 mA
IO = 150 mA
5
TJ = 125°C
4.5
TJ = 25°C
4
3.5
3
TJ = –40°C
2.5
2
1.5
1
1
1.5
2
2.5
3
3.5
4
4.5
VO – Output Voltage – V
Figure 15
5
5.5
TPS72101, TPS72115
TPS72116, TPS72118
www.ti.com
SLVS352B – DECEMBER 2001 – REVISED MAY 2002
APPLICATION INFORMATION
The TPS721xx family of low-dropout (LDO) regulators functions with a very low input voltage (>1.8 V). The dropout voltage
is typically 150 mV at full load. Typical quiescent current (ground pin current) is only 85 µA and drops to 1 µA in the shutdown
mode.
DEVICE OPERATION
The TPS721xx family can be operated at low input voltages due to low voltage circuit design techniques and a PMOS pass
element that exhibits low dropout.
A logic low on the enable input, EN, shuts off the output and reduces the supply current to less than 1 µA. EN may be tied
to VIN in applications where the shutdown feature is not used.
Current limiting and thermal protection prevent damage by excessive output current and/or power dissipation. The device
switches into a constant-current mode at approximately 350 mA; further load reduces the output voltage instead of
increasing the output current. The thermal protection shuts the regulator off if the junction temperature rises above 170°C.
Recovery is automatic when the junction temperature drops approximately 20°C below the high temperature trip point. The
PMOS pass element includes a back diode that safely conducts reverse current when the input voltage level drops below
the output voltage level.
A typical application circuit is shown in Figure 16.
TPS721xx
VI
1
IN
OUT 5
VO
0.1 µF
NC
3
4
EN
+
GND
0.1 µF
2
Figure 16. Typical Application Circuit
DUAL SUPPLY APPLICATION
In portable, battery-powered electronics, separate power rails for the DSP or microcontroller core voltage (VCORE) and I/O
peripherals (VIO) are usually necessary. The TPS721xx family of LDO linear regulators is ideal for providing V(CORE) for
the DSP or microcontroller. As shown in Figure 17, two AAA batteries provide an input voltage to a boost converter and
the TPS72115 LDO linear regulator. The batteries combine input voltage ranges from 3.0 V down to 1.8 V near the end
of their useful lives. Therefore, a boost converter is necessary to provide the typical 3.3 V needed for VIO, and the TPS72115
linear regulator provides a regulated V(CORE) voltage, which in this example is 1.5 V. Although there is no explicit circuitry
to perform power-up sequencing of first V(CORE) then VIO, the output of the linear regulator reaches its regulated voltage
much faster (<400 µs) than the output of any switching type boost converter due to the inherent slow start up of those types
of converters. Assuming a boost converter with minimum VI of 1.8 V is appropriately chosen, this power supply solution
can be used over the entire life of the two off-the-shelf AAA batteries. Thus, this solution is very efficient and the design
time and overall cost of the solution is minimized.
7
TPS72101, TPS72115
TPS72116, TPS72118
www.ti.com
SLVS352B – DECEMBER 2001 – REVISED MAY 2002
1.8 V – 3 V
3.3 V
VIO
Boost Converter
DSP or
Controller
1.8 V
1.5 V
TPS72115
VCORE
Two AAA
Batteries
Figure 17. Dual Supply Application Circuit
EXTERNAL CAPACITOR REQUIREMENTS
A 0.1-µF ceramic bypass capacitor is required on both the input and output for stability. Larger capacitors improve transient
response, noise rejection, and ripple rejection. A higher value electrolytic input capacitor may be necessary if large, fast
rise time load transient are anticipated, and/or there is significant input resistance from the device to the input power supply.
POWER DISSIPATION AND JUNCTION TEMPERATURE
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature allowable
without damaging the device is 150°C. This restriction limits the power dissipation the regulator can handle in any given
application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation,
PD(max), and the actual dissipation, PD, which must be less than or equal to PD(max).
The maximum-power-dissipation limit is determined using the following equation:
P
T max * T
A
+ J
D(max)
R
qJA
Where:
TJmax is the maximum allowable junction temperature.
RθJA is the thermal resistance junction-to-ambient for the package, see the power dissipation rating
table.
TA is the ambient temperature.
The regulator dissipation is calculated using:
P
D
ǒ
+ V *V
I
O
Ǔ
I
O
Power dissipation resulting from quiescent current is negligible.
8
TPS72101, TPS72115
TPS72116, TPS72118
www.ti.com
SLVS352B – DECEMBER 2001 – REVISED MAY 2002
PROGRAMMING THE TPS72101 ADJUSTABLE LDO REGULATOR
The output voltage of the TPS72101 adjustable regulator is programmed using an external resistor divider as shown in
Figure 18. The output voltage is calculated using:
V
O
+V
ǒ1 ) R1
Ǔ
R2
ref
(1)
Where:
Vref = 1.225 V typ (the internal reference voltage)
Resistors R1 and R2 should be chosen for approximately 10-µA divider current. Lower value resistors can be used but offer
no inherent advantage and waste more power. Higher values should be avoided, as leakage currents at FB increase the
output
voltage
error.
The
recommended
design
procedure
is
to
choose
R2 = 121 kΩ to set the divider current at 10 µA and then calculate R1 using:
R1 +
ǒ
Ǔ
V
V
O *1
ref
R2
(2)
Where:
Vref = 1.225 V
TPS72101
OUTPUT VOLTAGE
PROGRAMMING GUIDE
OUTPUT
VOLTAGE
(V)
DIVIDER RESISTANCE
(kΩ)†
R1
R2
2.5
127
121
3.3
205
121
† 1% values shown.
1
VI
IN
0.1 µF
OUT
≥ 1.7 V
3
5
VO
R1
EN
≤ 0.9 V
FB
GND
2
4
R2
0.1 µF
Figure 18. TPS72101 Adjustable LDO Regulator Programming
REGULATOR PROTECTION
The TPS721xx pass element has a built-in back diode that safely conducts reverse current when the input voltage drops
below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally
limited. If extended reverse voltage is anticipated, external limiting might be appropriate.
The TPS721xx also features internal current limiting and thermal protection. During normal operation, the TPS721xx limits
output current to approximately 350 mA. When current limiting engages, the output voltage scales back linearly until the
overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to
exceed the power dissipation ratings of the package. If the temperature of the device exceeds 170°C, thermal-protection
circuitry shuts it down. Once the device has cooled down to below 150°C, regulator operation resumes.
9
TPS72101, TPS72115
TPS72116, TPS72118
www.ti.com
SLVS352B – DECEMBER 2001 – REVISED MAY 2002
MECHANICAL DATA
DBV (R-PDSO-G5)
PLASTIC SMALL-OUTLINE
0,50
0,30
0,95
5
0,20 M
4
1,70
1,50
1
0,15 NOM
3,00
2,60
3
Gage Plane
3,00
2,80
0,25
0°–8°
0,55
0,35
Seating Plane
1,45
0,95
0,05 MIN
0,10
4073253-4/F 10/00
NOTES:A.
B.
C.
D.
10
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion.
Falls within JEDEC MO-178
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