2SK2940(L),2SK2940(S) Silicon N Channel MOS FET High Speed Power Switching ADE-208-563B (Z) 3rd. Edition Jul. 1998 Features • Low on-resistance R DS =0.010 Ω typ. • High speed switching • 4V gate drive device can be driven from 5V source Outline LDPAK 4 D 4 1 G 1 S 2 3 2 3 1. Gate 2. Drain 3. Source 4. Drain 2SK2940(L),2SK2940(S) Absolute Maximum Ratings (Ta = 25°C) Item Symbol Ratings Unit Drain to source voltage VDSS 60 V Gate to source voltage VGSS ±20 V Drain current ID 45 A 180 A 45 A 45 A 173 mJ 75 W Drain peak current I D(pulse) Body-drain diode reverse drain current I DR Avalanche current Avalanche energy I AP Note1 Note3 EAR Note3 Note2 Channel dissipation Pch Channel temperature Tch 150 °C Storage temperature Tstg –55 to +150 °C Note: 2 1. PW ≤ 10µs, duty cycle ≤ 1 % 2. Value at Tc = 25°C 3. Value at Tch = 25°C, Rg ≥ 50Ω 2SK2940(L),2SK2940(S) Electrical Characteristics (Ta = 25°C) Item Symbol Min Typ Max Unit Test Conditions Drain to source breakdown voltage V(BR)DSS 60 — — V I D = 10mA, VGS = 0 Gate to source breakdown voltage V(BR)GSS ±20 — — V I G = ±100µA, VDS = 0 Gate to source leak current I GSS — — ±10 µA VGS = ±16V, VDS = 0 Zero gate voltege drain current I DSS — — 10 µA VDS = 60 V, VGS = 0 Gate to source cutoff voltage VGS(off) 1.5 — 2.5 V I D = 1mA, VDS = 10V Static drain to source on state RDS(on) — 0.010 0.013 Ω I D = 20A, VGS = 10VNote4 resistance RDS(on) — 0.015 0.025 Ω I D = 20A, VGS = 4V Note4 Forward transfer admittance |yfs| 24 40 — S I D = 20A, VDS = 10V Note4 Input capacitance Ciss — 2200 — pF VDS = 10V Output capacitance Coss — 1050 — pF VGS = 0 Reverse transfer capacitance Crss — 320 — pF f = 1MHz Turn-on delay time t d(on) — 25 — ns I D = 20A, VGS = 10V Rise time tr — 200 — ns RL = 1.5Ω Turn-off delay time t d(off) — 320 — ns Fall time tf — 240 — ns Body–drain diode forward voltage VDF — 0.95 — V I F = 45A, VGS = 0 Body–drain diode reverse recovery time t rr — 60 — ns I F = 45A, VGS = 0 diF/ dt =50A/µs Note: 4. Pulse test 3 2SK2940(L),2SK2940(S) Main Characteristics Power vs. Temperature Derating Maximum Safe Operation Area 1000 100 I D (A) 75 Drain Current Channel Dissipation Pch (W) 300 50 25 100 PW DC 30 10 3 1 10 µs 0µ 1m s s 10 =1 0m s( Op era 1s ho t) Operation in Tc =2 this area is 5° limited by R DS(on) C) tio n( 0.3 0 50 100 150 0.1 0.1 200 Case Temperature Tc (°C) Ta = 25 °C 3 0.3 1 10 Drain to Source Voltage V 30 100 (V) DS Typical Output Characteristics I D (A) Drain Current 4V V DS = 10 V Pulse Test Pulse Test 30 3.5 V I D (A) 5V 40 Typical Transfer Characteristics 50 3V Drain Current 50 10 V 6 V 20 10 40 30 20 25°C Tc = 75°C 10 –25°C VGS = 2.5 V 0 4 2 4 6 Drain to Source Voltage V 8 DS(V) 10 0 1 2 3 Gate to Source Voltage V 4 (V) GS 5 2SK2940(L),2SK2940(S) Pulse Test 0.4 0.3 I D = 20 A 0.2 10 A 0.1 5A Static Drain to Source on State Resistance R DS(on) (mW) 0 12 4 8 Gate to Source Voltage Static Drain to Source on State Resistance vs. Temperature 40 Pulse Test 32 I D = 20 A 10 A 24 5A V GS = 4 V 16 5, 10, 20 A 8 10 V 0 –40 Static Drain to Source on State Resistance vs. Drain Current 100 Pulse Test 50 20 0 40 80 120 160 Case Temperature Tc (°C) VGS = 4 V 10 10 V 5 2 1 16 20 V GS (V) 1 2 5 10 20 50 Drain Current I D (A) 100 Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |y fs | (S) Drain to Source Saturation Voltage V DS(on) (V) 0.5 Drain to Source On State Resistance R DS(on) (mW) Drain to Source Saturation Voltage vs. Gate to Source Voltage 500 200 V DS = 10 V Pulse Test 100 50 Tc = –25 °C 20 25 °C 10 5 75 °C 2 1 0.5 0.1 0.3 1 3 10 30 Drain Current I D (A) 100 5 2SK2940(L),2SK2940(S) Body–Drain Diode Reverse Recovery Time Typical Capacitance vs. Drain to Source Voltage 10000 5000 Capacitance C (pF) Reverse Recovery Time trr (ns) 100 50 20 10 0.1 di / dt = 50 A / µs V GS = 0, Ta = 25 °C 1000 Coss 500 200 0 V DS 12 8 20 4 V DD = 50 V 25 V 10 V 40 80 120 160 Qg (nc) 20 30 40 50 0 200 1000 500 Switching Time t (ns) V DD = 10 V 25 V 50 V V GS (V) V GS Gate Charge 6 16 Gate to Source Voltage V DS (V) Drain to Source Voltage I D = 45 A 10 Drain to Source Voltage V DS (V) Switching Characteristics 20 40 0 VGS = 0 f = 1 MHz 50 0.3 1 3 10 30 100 Reverse Drain Current I DR (A) 80 60 Crss 100 Dynamic Input Characteristics 100 Ciss 2000 t d(off) tf 200 100 tr 50 t d(on) 20 V GS = 10 V, V DD = 30 V PW = 10 µs, duty < 1 % 10 0.1 0.2 0.5 1 2 5 10 20 Drain Current I D (A) 50 100 2SK2940(L),2SK2940(S) Maximum Avalanche Energy vs. Channel Temperature Derating Reverse Drain Current vs. Source to Drain Voltage Repetitive Avalanche Energy E AR (mJ) Reverse Drain Current I DR (A) 50 40 30 10 V V GS = 0, –5 V 5V 20 10 Pulse Test 0 0.4 0.8 1.2 Source to Drain Voltage 1.6 2.0 200 I AP = 45 A V DD = 25 V duty < 0.1 % Rg > 50 W 160 120 80 40 0 25 V SD (V) 50 75 100 125 150 Channel Temperature Tch (°C) Avalanche Test Circuit V DS Monitor Avalanche Waveform EAR = L 1 2 • L • I AP • 2 I AP Monitor VDSS VDSS – V DD V (BR)DSS I AP Rg D. U. T V DS VDD ID Vin 15 V 50W 0 VDD 7 2SK2940(L),2SK2940(S) Normalized Transient Thermal Impedance vs. Pulse Width Normalized Transient Thermal Impedance g s (t) 3 Tc = 25°C 1 D=1 0.5 0.3 0.2 0.1 q ch – c(t) = g s (t) • q ch – c q ch – c = 1.67 °C/W, Tc = 25 °C 0.1 0.05 PDM 0.02 1 lse 0.0 t pu o h 1s 0.03 0.01 10 µ D= PW T PW T 100 µ 1m 100 m 10 m Pulse Width PW (S) 1 Switching Time Test Circuit 10 Waveform Vout Monitor Vin Monitor 90% D.U.T. RL Vin Vin 10 V 50W V DD = 30 V Vout 10% 10% 90% td(on) 8 tr 10% 90% td(off) tf 2SK2940(L),2SK2940(S) Package Dimensions As of January, 2001 Unit: mm 2.54 ± 0.5 (1.4) 2.54 ± 0.5 11.3 ± 0.5 10.0 1.27 ± 0.2 0.2 0.86 +– 0.1 0.76 ± 0.1 11.0 ± 0.5 1.2 ± 0.2 4.44 ± 0.2 1.3 ± 0.15 + 0.3 – 0.5 8.6 ± 0.3 10.2 ± 0.3 2.59 ± 0.2 0.4 ± 0.1 Hitachi Code JEDEC EIAJ Mass (reference value) LDPAK (L) — — 1.4 g 9 2SK2940(L),2SK2940(S) As of January, 2001 Unit: mm 2.54 ± 0.5 0.2 0.86 +– 0.1 2.54 ± 0.5 0.3 3.0 +– 0.5 1.27 ± 0.2 1.2 ± 0.2 7.8 7.0 (1.5) 0.2 0.1 +– 0.1 2.2 0.4 ± 0.1 Hitachi Code JEDEC EIAJ Mass (reference value) 10 1.7 7.8 6.6 1.3 ± 0.15 0.3 10.0 +– 0.5 8.6 ± 0.3 (1.5) (1.4) 4.44 ± 0.2 10.2 ± 0.3 LDPAK (S)-(1) — — 1.3 g 2SK2940(L),2SK2940(S) As of January, 2001 Unit: mm (1.5) 7.8 7.0 1.7 7.8 6.6 1.3 ± 0.2 0.3 10.0 +– 0.5 8.6 ± 0.3 (1.5) (1.4) 4.44 ± 0.2 10.2 ± 0.3 0.2 0.1 +– 0.1 2.2 1.2 ± 0.2 2.54 ± 0.5 0.2 0.86 +– 0.1 2.54 ± 0.5 0.3 5.0 +– 0.5 1.27 ± 0.2 0.4 ± 0.1 Hitachi Code JEDEC EIAJ Mass (reference value) LDPAK (S)-(2) — — 1.35 g 11 2SK2940(L),2SK2940(S) Cautions 1. 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Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products. Hitachi, Ltd. Semiconductor & Integrated Circuits. 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(Taipei Branch Office) 4/F, No. 167, Tun Hwa North Road, Hung-Kuo Building, Taipei (105), Taiwan Tel : <886>-(2)-2718-3666 Fax : <886>-(2)-2718-8180 Telex : 23222 HAS-TP URL : http://www.hitachi.com.tw Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower, World Finance Centre, Harbour City, Canton Road Tsim Sha Tsui, Kowloon, Hong Kong Tel : <852>-(2)-735-9218 Fax : <852>-(2)-730-0281 URL : http://www.hitachi.com.hk Copyright Hitachi, Ltd., 2000. All rights reserved. Printed in Japan. Colophon 2.0 12