H5N2004DL, H5N2004DS Silicon N Channel MOS FET High Speed Power Switching ADE-208-1372 (Z) 1st. Edition Mar. 2001 Features • • • • • Low on-resistance: R DS(on) = 0.38 typ. Low leakage current: IDSS = 1 µA max (at VDS = 200 V) High speed switching: tf = 10 ns typ (at VGS = 10 V, VDD = 100 V, ID = 4 A) Low gate charge: Qg = 14 nC typ (at VDD = 160 V, VGS = 10 V, ID = 8 A) Avalanche ratings Outline DPAK-2 4 4 D 1 2 3 G H5N2004DS S 1 2 3 H5N2004DL 1. Gate 2. Drain 3. Source 4. Drain H5N2004DL, H5N2004DS Absolute Maximum Ratings (Ta = 25°C) Item Symbol Value Unit Drain to source voltage VDSS 200 V Gate to source voltage VGSS ±30 V Drain current ID 8 A 32 A 8 A 32 A 7 A 30 W Note 1 Drain peak current ID Body-drain diode reverse drain current I DR Body-drain diode reverse drain peak current I DR Avalanche current I AP (pulse) Note 1 (pulse) Note 3 Note 2 Channel dissipation Pch Channel to case thermal Impedance θ ch-c 4.17 °C/W Channel temperature Tch 150 °C Storage temperature Tstg –55 to +150 °C Notes: 1. PW 10 µs, duty cycle 1% 2. Value at Tc = 25°C 3. Tch 150°C 2 H5N2004DL, H5N2004DS Electrical Characteristics (Ta = 25°C) Item Symbol Min Typ Max Unit Test Conditions Drain to source breakdown voltage V(BR)DSS 200 — — V I D = 10 mA, VGS = 0 Gate to source leak current I GSS — — ±0.1 µA VGS = ±30 V, VDS = 0 Zero gate voltage drain current I DSS — — 1 µA VDS = 200 V, VGS = 0 Gate to source cutoff voltage VGS(off) 3.0 — 4.5 V VDS = 10 V, ID = 1 mA Static drain to source on state resistance RDS(on) — 0.38 0.48 Forward transfer admittance |yfs| 3.3 5.5 — S I D = 4 A, VDS = 10 V Note 4 Input capacitance Ciss — 450 — pF VDS = 25 V Output capacitance Coss — 65 — pF VGS = 0 Reverse transfer capacitance Crss — 13 — pF f = 1 MHz Turn-on delay time td(on) — 19 — ns ID = 4 A Rise time tr — 32 — ns VGS = 10 V Turn-off delay time td(off) — 47 — ns RL = 25 Fall time tf — 10 — ns Rg = 10 Total gate charge Qg — 14 — nC VDD = 160 V Gate to source charge Qgs — 2.5 — nC VGS = 10 V Gate to drain charge Qgd — 7.5 — nC ID = 4 A Body-drain diode forward voltage VDF — 0.9 1.4 V I F = 8 A, VGS = 0 Body-drain diode reverse recovery time trr — 100 — ns I F = 8 A, VGS = 0 Body-drain diode reverse recovery charge Qrr — 0.4 — µC diF/dt = 50 A/µs Note: I D = 4 A, VGS = 10 V Note 4 4. Pulse test 3 H5N2004DL, H5N2004DS Main Characteristics Maximum Safe Operation Area Power vs. Temperature Derating 100 ID (A) 30 30 20 10 PW 10 DC 3 Drain Current Channel Dissipation Pch (W) 40 150 Tc (°C) 1 200 1 25 °C ) 30 3 10 100 Drain to Source Voltage 300 1000 VDS (V) Typical Transfer Characteristics 6.5 V V DS = 10 V Pulse Test 6V 4 5.5 V 2 ID (A) 8V Drain Current ID (A) Drain Current ot) Ta = 25°C 8 4 8 12 16 20 Drain to Source Voltage VDS (V) Pulse Test 6 4 25°C Tc = 75°C 2 VGS = 5 V 4 sh (T Operation in this area is limited by RDS(on) 0.1 (1 10 10 V 0 ion 0.3 Typical Output Characteristics 6 ms c= 10 8 10 at 0.01 50 100 Case Temperature Op er 0.03 0 = 10 µs 10 1m 0 s µs 0 –25°C 2 4 6 Gate to Source Voltage 8 10 VGS (V) H5N2004DL, H5N2004DS Pulse Test 8 6 ID=8A 4 5A 2 1 12 4 8 Gate to Source Voltage 0.1 0.2 16 20 VGS (V) Static Drain to Source on State Resistance vs. Temperature 2.0 Pulse Test 1.6 V GS = 10 V 1.2 ID=8A 0.8 5A 0.4 2A 0 –40 0 40 80 120 Case Temperature Tc (°C) V GS = 10 , 15 V 0.2 2A 0 Static Drain to Source on State Resistance RDS(on) (Ω) Static Drain to Source on State Resistance vs. Drain Current 2 Pulse Test 0.5 160 0.5 1 2 Drain Current 5 10 ID (A) 20 Forward Transfer Admittance vs. Drain Current Forward transfer admittance |yfs| (S) Drain to Source Saturation Voltage VDS(on) (V) 10 Drain to Source on State Resistance RDS(on) (Ω) Drain to Source Saturation Voltage vs. Gate to Source Voltage 10 5 2 Tc = –25°C 25°C 1 0.5 0.2 75°C 0.1 V DS = 10 V Pulse Test 0.05 0.02 0.02 0.05 0.1 0.2 0.5 1 Drain Current 2 5 10 ID (A) 5 H5N2004DL, H5N2004DS Body-Drain Diode Reverse Recovery Time 5000 di / dt = 100 A / µs V GS = 0, Ta = 25°C 500 200 100 50 20 200 100 Coss 50 20 Crss 0 10 Dynamic Input Characteristics VGS 400 V DD = 50 V 100 V 160 V 300 200 12 8 VDS 100 0 16 4 V DD = 160 V 100 V 50 V 4 8 Gate Charge 12 16 Qg (nC) 0 20 Switching Time t (ns) I D= 4 A 1000 VGS (V) 20 Gate to Source Voltage VDS (V) Ciss 500 5 0.2 0.5 1 2 5 Reverse Drain Current IDR (A) 500 Drain to Source Voltage 1000 10 10 0.1 6 VGS = 0 f = 1 MHz 2000 Capacitance C (pF) Reverse Recovery Time trr (ns) 1000 Typical Capacitance vs. Drain to Source Voltage 20 40 60 Drain to Source Voltage 80 100 VDS (V) Switching Characteristics V GS = 10 V, V DD = 100 V PW = 10 µs, duty < 1 % R G =10W 100 10 t d(off) t d(on) tf tr 1 0.1 0.2 0.5 1 Drain Current 2 5 ID (A) 10 Reverse Drain Current vs. Source to Drain Voltage Reverse Drain Current IDR (A) 10 8 6 4 10 V 2 V GS = 0 V 5V Pulse Test 0 0.6 0.8 1.2 Source to Drain Voltage 1.6 2.0 Gate to Source Cutoff Voltage VGS(off) (V) H5N2004DL, H5N2004DS Gate to Source Cutoff Voltage vs. Case Temperature 5 I D = 10mA 4 1mA 3 0.1mA 2 1 V DS = 10 V 0 -50 VSD (V) 0 50 100 150 Case Temperature Tc (°C) Switching Time Test Circuit Waveform Vout Monitor Vin Monitor 200 90% D.U.T. RL Vin 10Ω Vin 10 V V DD = 100 V Vout 10% 10% 90% td(on) tr 10% 90% td(off) tf 7 H5N2004DL, H5N2004DS Normalized Transient Thermal Impedance γ s (t) Normalized Transient Thermal Impedance vs. Pulse Width 3 Tc = 25°C 1 D=1 0.5 0.3 0.2 0.1 0.05 0.03 0.02 0.01 ulse ot p h s 1 0.01 10 µ 8 θ ch – c(t) = γ s (t) • θ ch – c θ ch – c = 4.17°C/W, Tc = 25°C 0.1 100 µ PDM D= PW T PW T 1m 10 m 100 m Pulse Width PW (s) 1 10 H5N2004DL, H5N2004DS Package Dimensions As of January, 2001 1.7 ± 0.5 Unit: mm 2.3 ± 0.2 0.55 ± 0.1 4.7 ± 0.5 1.2 ± 0.3 16.2 ± 0.5 1.15 ± 0.1 0.8 ± 0.1 (0.7) 3.1 ± 0.5 5.5 ± 0.5 6.5 ± 0.5 5.4 ± 0.5 0.55 ± 0.1 0.55 ± 0.1 2.29 ± 0.5 2.29 ± 0.5 Hitachi Code JEDEC EIAJ Mass (reference value) DPAK (L)-(2) — — 0.42 g 9 H5N2004DL, H5N2004DS As of January, 2001 2.3 ± 0.2 0.55 ± 0.1 (4.9) (5.3) 6.5 ± 0.5 5.4 ± 0.5 1.2 Max 5.5 ± 0.5 1.7 ± 0.5 Unit: mm 0 – 0.25 2.5 ± 0.5 1.15 ± 0.1 0.8 ± 0.1 2.29 ± 0.5 0.55 ± 0.1 2.29 ± 0.5 Hitachi Code JEDEC EIAJ Mass (reference value) 10 DPAK (S)-(1),(2) — Conforms 0.28 g H5N2004DL, H5N2004DS As of January, 2001 (0.1) 2.3 ± 0.2 0.55 ± 0.1 (5.1) (5.1) (0.1) 6.5 ± 0.5 5.4 ± 0.5 1.2 Max 5.5 ± 0.5 1.5 ± 0.5 Unit: mm 0 – 0.25 2.5 ± 0.5 1.15 ± 0.1 0.8 ± 0.1 2.29 ± 0.5 0.55 ± 0.1 2.29 ± 0.5 Hitachi Code JEDEC EIAJ Mass (reference value) DPAK (S)-(3) — Conforms 0.28 g 11 H5N2004DL, H5N2004DS Cautions 1. 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Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products. Hitachi, Ltd. Semiconductor & Integrated Circuits. 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(Taipei Branch Office) 4/F, No. 167, Tun Hwa North Road, Hung-Kuo Building, Taipei (105), Taiwan Tel : <886>-(2)-2718-3666 Fax : <886>-(2)-2718-8180 Telex : 23222 HAS-TP URL : http://www.hitachi.com.tw Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower, World Finance Centre, Harbour City, Canton Road Tsim Sha Tsui, Kowloon, Hong Kong Tel : <852>-(2)-735-9218 Fax : <852>-(2)-730-0281 URL : http://www.hitachi.com.hk Copyright Hitachi, Ltd., 2000. All rights reserved. Printed in Japan. Colophon 2.0 12