ISL9G2060EG3, ISL9G2060EP3, ISL9G2060ES3 Data Sheet [ /Title (ISL9 G2060 EG3, ISL9G 2060E P3, ISL9G 2060E S3) /Subjec t (600V, SMPS II LGC Series NChann el IGBT) /Autho r () /Keyw ords (Intersi l Corpor ation, Semico nducto r 600V, SMPS II LGC Series NChann el IGBT) /Creato January 2001 File Number 600V, SMPS II LGC Series N-Channel IGBT Features The ISL9G2060EG3, ISL9G2060EP3, and ISLPG2060ES3 are a Low Gate Charge (LGC) SMPS II IGBT combine the fast switching speed of the SMPS IGBTs along with lower gate charge and avalanche capability (UIS). These LGC devices shorten delay times, and reduce the power requirement of the gate drive. These devices are ideally suited for high voltage switched mode power supply applications where low conduction loss, fast switching times and UIS capability are essential. SMPS II LGC devices have been specially designed for: • Power Factor Correction (PFC) Circuits • Full Bridge Topologies • Half Bridge Topologies • Push-Pull Circuits • Uninterruptible Power Supplies • Zero Voltage and Zero Current Switching Circuits • >100kHz Operation at 390V, 20A 5021 • 200kHz Operation at 390V, 9A • 600V Switching SOA Capability • Typical Fall Time. . . . . . . . . . . . . . . . . .75ns at TJ = 125oC • Low Gate Charge . . . . . . . . . . . . . . . . .37nC at VGE = 15V • UIS Rated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .260mJ • Low Conduction Loss Symbol C G Formerly Developmental Type TA49438. Ordering Information PART NUMBER E PACKAGE BRAND ISL9G2060ES3 TO-263AB G2060ES3 ISL9G2060EG3 TO-247 G2060EG3 ISL9G2060EP3 TO-220AB G2060EP3 NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-263AB variant in tape and reel, e.g., ISL9G1260ES3S9A. Packaging JEDEC STYLE TO-247 JEDEC TO-220AB E E C C G COLLECTOR (FLANGE) G COLLECTOR (FLANGE) JEDEC TO-263AB G E COLLECTOR (FLANGE) INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS 4,364,073 4,598,461 4,682,195 4,803,533 4,888,627 4,417,385 4,605,948 4,684,413 4,809,045 4,890,143 ©2001 Fairchild Semiconductor Corporation 4,430,792 4,620,211 4,694,313 4,809,047 4,901,127 4,443,931 4,631,564 4,717,679 4,810,665 4,904,609 4,466,176 4,639,754 4,743,952 4,823,176 4,933,740 4,516,143 4,639,762 4,783,690 4,837,606 4,963,951 4,532,534 4,641,162 4,794,432 4,860,080 4,969,027 4,587,713 4,644,637 4,801,986 4,883,767 ISL9G2060EG3, ISL9G2060EP3, ISL9G2060ES3 Rev. A ISL9G2060EG3, ISL9G2060EP3, ISL9G2060ES3 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .BVCES Collector Current Continuous At TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC25 At TC = 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC110 600 UNITS V 75 35 A A Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ICM Gate to Emitter Voltage Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGES Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGEM Switching Safe Operating Area at TJ = 150oC, Figure 2 . . . . . . . . . . . . . . . . . . . . . . . . SSOA Single Pulse Avalanche Energy at TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS 180 ±20 ±30 100A at 600V 260mJ at 20A A V V Reverse Voltage Avalanche Energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAVR Power Dissipation Total at TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Power Dissipation Derating TC > 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Lead Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Tech Brief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TPKG 100mJ at 20A 290 2.33 -55 to 150 W W/oC oC 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. Pulse width limited by maximum junction temperature. Electrical Specifications TJ = 25oC, Unless Otherwise Specified PARAMETER SYMBOL Collector to Emitter Breakdown Voltage BVCES Emitter to Collector Breakdown Voltage BVECS Collector to Emitter Leakage Current Collector to Emitter Saturation Voltage Gate to Emitter Threshold Voltage ICES VCE(SAT) VGE(TH) MIN TYP MAX UNITS IC = 250µA, VGE = 0V TEST CONDITIONS 600 - - V IC = 10mA, VGE = 0V 20 - - V - - 100 µA VCE = 600V IC = 20A, VGE = 15V TJ = 25oC TJ = 125oC - - 2.0 mA TJ = 25oC - 1.9 2.7 V TJ = 125oC IC = 250µA, VCE = 600V - 1.7 2.0 V 4.5 6.6 7.0 V Gate to Emitter Leakage Current IGES VGE = ±20V - - ±250 nA Switching SOA SSOA TJ = 150oC, RG = 3Ω, VGE = 15V L = 100µH, VCE = 600V 100 - - A EAS ICE = 20A, L = 2.1mH, VDD = 50V 260 - - mJ Pulsed Avalanche Energy Gate to Emitter Plateau Voltage VGEP IC = 20A, VCE = 300V - 9.3 - V On-State Gate Charge Qg(ON) IC = 20A, VCE = 300V VGE = 15V - 37 46 nC VGE = 20V - 46 58 nC Current Turn-On Delay Time td(ON)I IGBT and Diode at TJ = 25oC ICE = 20A VCE = 390V VGE = 15V RG = 3 Ω L = 200µH Test Circuit - Figure 20 - 10 - ns - 17 - ns - 39 - ns Current Rise Time Current Turn-Off Delay Time Current Fall Time trI td(OFF)I - 49 - ns - 105 - µJ EON2 - 200 - µJ EOFF - 210 - µJ tfI Turn-On Energy (Note 2) EON1 Turn-On Energy (Note 2) Turn-Off Energy (Note 3) ©2001 Fairchild Semiconductor Corporation ISL9G2060EG3, ISL9G2060EP3, ISL9G2060ES3 Rev. A ISL9G2060EG3, ISL9G2060EP3, ISL9G2060ES3 Electrical Specifications TJ = 25oC, Unless Otherwise Specified (Continued) PARAMETER SYMBOL Current Turn-On Delay Time td(ON)I Current Rise Time trI Current Turn-Off Delay Time td(OFF)I MIN TYP MAX UNITS - 12 - ns - 15 - ns - 65 100 ns - 75 85 ns - 115 - µJ EON2 - 360 430 µJ EOFF - 300 490 µJ 0.43 oC/W Current Fall Time tfI Turn-On Energy (Note 2) EON1 Turn-On Energy (Note 2) Turn-Off Energy (Note 3) Thermal Resistance Junction To Case TEST CONDITIONS IGBT and Diode at TJ = 125oC ICE = 20A VCE = 390V VGE = 15V RG = 3 Ω L = 200µH Test Circuit - Figure 20 - RθJC - NOTES: 2. Values for two Turn-On loss conditions are shown for the convenience of the circuit designer. E ON1 is the turn-on loss of the IGBT only. EON2 is the turn-on loss when a typical diode is used in the test circuit and the diode is at the same T J as the IGBT. The diode type is specified in Figure 20. 3. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (ICE = 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss. Unless Otherwise Specified PACKAGE LIMITED 75A VGE = 15V TJ = 150oC 70 60 50 40 30 20 10 0 25 50 75 100 125 150 125 TJ = 150oC, RG = 3Ω, VGE = 15V 100 75 50 25 0 0 TC , CASE TEMPERATURE (oC) tSC , SHORT CIRCUIT WITHSTAND TIME (µs) fMAX, OPERATING FREQUENCY (kHz) 75oC 12V TC VGE 75oC 15V 100 fMAX1 = 0.05 / (td(OFF)I + td(ON)I) fMAX2 = (PD - PC) / (EON2 + EOFF) PC = CONDUCTION DISSIPATION (DUTY FACTOR = 50%) RØJC = 0.43oC/W, SEE NOTES 10 TJ = 125oC, RG = 3Ω, L = 200µH, V CE = 390V 1 1 10 20 30 50 ICE, COLLECTOR TO EMITTER CURRENT (A) 70 FIGURE 3. OPERATING FREQUENCY vs COLLECTOR TO EMITTER CURRENT ©2001 Fairchild Semiconductor Corporation 300 400 500 600 700 FIGURE 2. MINIMUM SWITCHING SAFE OPERATING AREA 1000 VGE 200 VCE, COLLECTOR TO EMITTER VOLTAGE (V) FIGURE 1. DC COLLECTOR CURRENT vs CASE TEMPERATURE TC 100 9.5 275 VCE = 390V, RG = 3Ω, TJ = 125oC 9.0 250 ISC 8.5 225 tSC 8.0 200 175 7.5 7.0 10 11 12 13 14 150 15 ISC, PEAK SHORT CIRCUIT CURRENT (A) ICE , DC COLLECTOR CURRENT (A) 80 ICE, COLLECTOR TO EMITTER CURRENT (A) Typical Performance Curves VGE , GATE TO EMITTER VOLTAGE (V) FIGURE 4. SHORT CIRCUIT WITHSTAND TIME ISL9G2060EG3, ISL9G2060EP3, ISL9G2060ES3 Rev. A ISL9G2060EG3, ISL9G2060EP3, ISL9G2060ES3 Unless Otherwise Specified (Continued) ICE, COLLECTOR TO EMITTER CURRENT (A) ICE, COLLECTOR TO EMITTER CURRENT (A) Typical Performance Curves 40 DUTY CYCLE < 0.5%, VGE = 12V PULSE DURATION = 250µs 35 30 25 TJ = 150oC 20 15 TJ = 125oC 10 TJ = 25oC 5 0 0.8 0.4 0 1.2 1.6 2.0 40 DUTY CYCLE < 0.5%, VGE = 15V PULSE DURATION = 250µs 35 30 25 TJ = 150oC 20 15 TJ = 125oC 10 5 TJ = 25oC 0 0 2.4 0.2 VCE, COLLECTOR TO EMITTER VOLTAGE (V) FIGURE 5. COLLECTOR TO EMITTER ON-STATE VOLTAGE 1000 EOFF , TURN-OFF ENERGY LOSS (µJ) EON2 , TURN-ON ENERGY LOSS (µJ) RG = 3Ω, VCE = 390V 1400 1200 1000 TJ = 125oC, VGE = 15V 600 TJ = 125oC, VGE = 12V 400 TJ = 25oC, VGE = 15V 200 0 TJ = 25oC, VGE = 12V 0 5 10 15 20 25 30 800 2.0 2.2 TJ = 125oC, VGE = 12V OR 15V 500 400 300 200 TJ = 25oC, VGE = 12V OR 15V 100 0 5 10 15 20 25 30 35 40 RG = 3Ω, VCE = 390V 60 trI , RISE TIME (ns) td(ON)I, TURN-ON DELAY TIME (ns) 1.8 70 TJ = 125oC, TJ = 25oC, VGE = 12V 14 12 10 50 40 20 0 6 15 20 25 30 35 ICE , COLLECTOR TO EMITTER CURRENT (A) FIGURE 9. TURN-ON DELAY TIME vs COLLECTOR TO EMITTER CURRENT ©2001 Fairchild Semiconductor Corporation TJ = 25oC OR TJ = 125oC, VGE = 12V 30 10 TJ = 125oC, TJ = 25oC, VGE = 15V 10 1.6 FIGURE 8. TURN-OFF ENERGY LOSS vs COLLECTOR TO EMITTER CURRENT RG = 3Ω, VCE = 390V 5 1.4 ICE , COLLECTOR TO EMITTER CURRENT (A) 18 0 1.2 600 40 FIGURE 7. TURN-ON ENERGY LOSS vs COLLECTOR TO EMITTER CURRENT 8 1.0 700 ICE , COLLECTOR TO EMITTER CURRENT (A) 16 0.8 RG = 3Ω, VCE = 390V 900 0 35 0.6 FIGURE 6. COLLECTOR TO EMITTER ON-STATE VOLTAGE 1600 800 0.4 VCE, COLLECTOR TO EMITTER VOLTAGE (V) 40 TJ = 25oC OR TJ = 125oC, VGE = 15V 0 5 10 15 20 25 30 35 40 ICE , COLLECTOR TO EMITTER CURRENT (A) FIGURE 10. TURN-ON RISE TIME vs COLLECTOR TO EMITTER CURRENT ISL9G2060EG3, ISL9G2060EP3, ISL9G2060ES3 Rev. A ISL9G2060EG3, ISL9G2060EP3, ISL9G2060ES3 Typical Performance Curves Unless Otherwise Specified (Continued) 90 RG = 3Ω, VCE = 390V RG = 3Ω, VCE = 390V 65 80 60 tfI , FALL TIME (ns) td(OFF)I , TURN-OFF DELAY TIME (ns) 70 55 TJ = 125oC, VGE = 15V, VGE = 12V 50 45 TJ = 25oC, VGE = 15V, VGE = 12V 40 TJ = 125oC, VGE = 12V OR 15V 60 50 TJ = 25oC, VGE = 12V OR 15V 40 30 35 30 70 20 0 5 10 15 20 25 30 35 40 0 ICE , COLLECTOR TO EMITTER CURRENT (A) VGE, GATE TO EMITTER VOLTAGE (V) ICE, COLLECTOR TO EMITTER CURRENT (A) 16 125 100 75 TJ = 125oC 50 TJ = 25oC 0 TJ = -40oC 5 7 6 8 9 10 11 12 15 14 ETOTAL = EON2 + EOFF VCE = 400V VCE = 600V 8 6 4 2 0 5 10 15 1600 1400 1200 1000 ICE = 20A 600 400 ICE = 10A 200 0 25 50 75 100 125 TC , CASE TEMPERATURE (oC) FIGURE 15. TOTAL SWITCHING LOSS vs CASE TEMPERATURE ©2001 Fairchild Semiconductor Corporation 20 25 30 35 40 FIGURE 14. GATE CHARGE WAVEFORMS ICE = 40A 800 40 QG , GATE CHARGE (nC) 150 ETOTAL, TOTAL SWITCHING ENERGY LOSS (mJ) ETOTAL, TOTAL SWITCHING ENERGY LOSS (µJ) 2000 35 10 0 13 2400 1800 30 VCE = 200V 12 FIGURE 13. TRANSFER CHARACTERISTIC RG = 3Ω, VCE = 390V, VGE = 15V 25 IG(REF) = 1mA, RL = 15Ω, TJ = 25oC VGE, GATE TO EMITTER VOLTAGE (V) 2200 20 FIGURE 12. FALL TIME vs COLLECTOR TO EMITTER CURRENT DUTY CYCLE < 0.5%, VCE = 10V PULSE DURATION = 250µs 25 10 ICE , COLLECTOR TO EMITTER CURRENT (A) FIGURE 11. TURN-OFF DELAY TIME vs COLLECTOR TO EMITTER CURRENT 150 5 100 TJ = 125oC, VCE = 390V, VGE = 15V ETOTAL = EON2 + EOFF 10 ICE = 40A ICE = 20A 1 ICE = 10A 0.1 1 10 100 1000 RG, GATE RESISTANCE (Ω) FIGURE 16. TOTAL SWITCHING LOSS vs GATE RESISTANCE ISL9G2060EG3, ISL9G2060EP3, ISL9G2060ES3 Rev. A ISL9G2060EG3, ISL9G2060EP3, ISL9G2060ES3 Unless Otherwise Specified (Continued) VCE, COLLECTOR TO EMITTER VOLTAGE (V) Typical Performance Curves 2.25 FREQUENCY = 1MHz C, CAPACITANCE (nF) 2.00 1.75 CIES 1.50 1.25 1.00 COES 0.75 0.50 CRES 0.25 0 0 20 10 30 40 50 60 70 80 90 100 3.6 DUTY CYCLE < 0.5%, VGE = 15V PULSE DURATION = 250µs, TJ = 25oC 3.4 3.2 ICE = 40A 3.0 2.8 ICE = 20A 2.6 2.4 ICE = 15A 2.2 2.0 1.8 1.6 ICE = 10A 9 10 VCE, COLLECTOR TO EMITTER VOLTAGE (V) 12 13 14 15 16 17 18 19 20 VGE, GATE TO EMITTER VOLTAGE (V) FIGURE 17. CAPACITANCE vs COLLECTOR TO EMITTER VOLTAGE ZθJC , NORMALIZED THERMAL RESPONSE 11 FIGURE 18. COLLECTOR TO EMITTER ON-STATE VOLTAGE vs GATE TO EMITTER VOLTAGE 100 0.5 0.2 t1 0.1 10-1 PD 0.05 t2 0.02 DUTY FACTOR, D = t1 / t2 PEAK TJ = (PD X ZθJC X RθJC) + TC 0.01 SINGLE PULSE 10-2 10-5 10-4 10-3 10-2 10-1 100 101 t1 , RECTANGULAR PULSE DURATION (s) FIGURE 19. IGBT NORMALIZED TRANSIENT THERMAL RESPONSE, JUNCTION TO CASE Test Circuit and Waveforms ISL9H2060EG3 90% 10% VGE EON2 EOFF L = 200µH VCE RG = 3Ω 90% ICE + ISL9G2060EG3 - VDD = 390V FIGURE 20. INDUCTIVE SWITCHING TEST CIRCUIT ©2001 Fairchild Semiconductor Corporation 10% td(OFF)I tfI trI td(ON)I FIGURE 21. SWITCHING TEST WAVEFORMS ISL9G2060EG3, ISL9G2060EP3, ISL9G2060ES3 Rev. A ISL9G2060EG3, ISL9G2060EP3, ISL9G2060ES3 Handling Precautions for IGBTs Operating Frequency Information Insulated Gate Bipolar Transistors are susceptible to gate-insulation damage by the electrostatic discharge of energy through the devices. When handling these devices, care should be exercised to assure that the static charge built in the handler’s body capacitance is not discharged through the device. With proper handling and application procedures, however, IGBTs are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. IGBTs can be handled safely if the following basic precautions are taken: Operating frequency information for a typical device (Figure 3) is presented as a guide for estimating device performance for a specific application. Other typical frequency vs collector current (ICE) plots are possible using the information shown for a typical unit in Figures 5, 6, 7, 8, 9 and 11. The operating frequency plot (Figure 3) of a typical device shows fMAX1 or fMAX2; whichever is smaller at each point. The information is based on measurements of a typical device and is bounded by the maximum rated junction temperature. 1. Prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as “ECCOSORBD LD26” or equivalent. 2. When devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband. 3. Tips of soldering irons should be grounded. 4. Devices should never be inserted into or removed from circuits with power on. 5. Gate Voltage Rating - Never exceed the gate-voltage rating of VGEM. Exceeding the rated VGE can result in permanent damage to the oxide layer in the gate region. 6. Gate Termination - The gates of these devices are essentially capacitors. Circuits that leave the gate open-circuited or floating should be avoided. These conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup. fMAX1 is defined by fMAX1 = 0.05/(td(OFF)I+ td(ON)I). Deadtime (the denominator) has been arbitrarily held to 10% of the on-state time for a 50% duty factor. Other definitions are possible. td(OFF)I and td(ON)I are defined in Figure 21. Device turn-off delay can establish an additional frequency limiting condition for an application other than TJM. fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON2). The allowable dissipation (PD) is defined by PD = (TJM - TC)/RθJC. The sum of device switching and conduction losses must not exceed PD . A 50% duty factor was used (Figure 3) and the conduction losses (PC) are approximated by PC = (VCE x ICE)/2. EON2 and EOFF are defined in the switching waveforms shown in Figure 21. EON2 is the integral of the instantaneous power loss (ICE x VCE) during turn-on and EOFF is the integral of the instantaneous power loss (ICE x VCE) during turn-off. All tail losses are included in the calculation for EOFF; i.e., the collector current equals zero (ICE = 0). 7. Gate Protection - These devices do not have an internal monolithic Zener diode from gate to emitter. If gate protection is required an external Zener is recommended. ©2001 Fairchild Semiconductor Corporation ISL9G2060EG3, ISL9G2060EP3, ISL9G2060ES3 Rev. A ISL9G2060EG3, ISL9G2060EP3, ISL9G2060ES3 TO-247 3 LEAD JEDEC STYLE TO-247 PLASTIC PACKAGE A E ØS Q ØR D L1 b1 b2 L c b 2 1 3 3 e e1 J1 INCHES TERM. 4 ØP MILLIMETERS SYMBOL MIN MAX MIN MAX A 0.180 0.190 4.58 4.82 NOTES - b 0.046 0.051 1.17 1.29 2, 3 b1 0.060 0.070 1.53 1.77 1, 2 b2 0.095 0.105 2.42 2.66 1, 2 c 0.020 0.026 0.51 0.66 1, 2, 3 D 0.800 0.820 20.32 20.82 - E 0.605 0.625 15.37 15.87 - e 0.219 TYP 5.56 TYP 4 e1 0.438 BSC 11.12 BSC 4 J1 0.090 0.105 2.29 2.66 1 L 0.620 0.640 15.75 16.25 - BACK VIEW L1 0.145 0.155 3.69 3.93 1 ØP 0.138 0.144 3.51 3.65 - Q 0.210 0.220 5.34 5.58 - ØR 0.195 0.205 4.96 5.20 - ØS 0.260 0.270 6.61 6.85 - 2 5 NOTES: 1. Lead dimension and finish uncontrolled in L1. 2. Lead dimension (without solder). 3. Add typically 0.002 inches (0.05mm) for solder coating. 4. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 5. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 6. Controlling dimension: Inch. 7. Revision 1 dated 1-93. ©2001 Fairchild Semiconductor Corporation ISL9G2060EG3, ISL9G2060EP3, ISL9G2060ES3 Rev. A ISL9G2060EG3, ISL9G2060EP3, ISL9G2060ES3 TO-263AB SURFACE MOUNT JEDEC TO-263AB PLASTIC PACKAGE E A A1 H1 TERM. 4 D SYMBOL A A1 b b1 b2 c D L2 L1 L 1 b b1 e c J1 e1 0.450 (11.43) TERM. 4 L3 b2 3 E e e1 H1 J1 L L1 3 0.350 (8.89) 0.700 (17.78) 0.150 (3.81) 1 0.080 TYP (2.03) 0.062 TYP (1.58) MINIMUM PAD SIZE RECOMMENDED FOR SURFACE-MOUNTED APPLICATIONS 1.5mm DIA. HOLE INCHES MIN MAX 0.170 0.180 0.048 0.052 0.030 0.034 0.045 0.310 0.018 0.405 0.055 0.022 0.425 0.395 0.405 0.100 TYP 0.200 BSC 0.045 0.055 0.095 0.105 0.175 0.195 MILLIMETERS MIN MAX 4.32 4.57 1.22 1.32 0.77 0.86 1.15 7.88 0.46 10.29 NOTES 4, 5 4, 5 1.39 0.55 10.79 4, 5 2 4, 5 - 10.04 10.28 2.54 TYP 5.08 BSC 1.15 1.39 2.42 2.66 4.45 4.95 7 7 - 0.090 0.110 2.29 2.79 4, 6 0.050 0.070 1.27 1.77 3 L2 L3 0.315 8.01 2 NOTES: 1. These dimensions are within allowable dimensions of Rev. C of JEDEC TO-263AB outline dated 2-92. 2. L3 and b2 dimensions established a minimum mounting surface for terminal 4. 3. Solder finish uncontrolled in this area. 4. Dimension (without solder). 5. Add typically 0.002 inches (0.05mm) for solder plating. 6. L1 is the terminal length for soldering. 7. Position of lead to be measured 0.120 inches (3.05mm) from bottom of dimension D. 8. Controlling dimension: Inch. 9. Revision 10 dated 5-99. 4.0mm USER DIRECTION OF FEED 2.0mm TO-263AB 1.75mm C L 24mm TAPE AND REEL 24mm 16mm COVER TAPE 40mm MIN. ACCESS HOLE 30.4mm 13mm 330mm 100mm GENERAL INFORMATION 1. 800 PIECES PER REEL. 2. ORDER IN MULTIPLES OF FULL REELS ONLY. 3. MEETS EIA-481 REVISION "A" SPECIFICATIONS. ©2001 Fairchild Semiconductor Corporation 24.4mm ISL9G2060EG3, ISL9G2060EP3, ISL9G2060ES3 Rev. A ISL9G2060EG3, ISL9G2060EP3, ISL9G2060ES3 TO-220AB 3 LEAD JEDEC TO-220AB PLASTIC PACKAGE A INCHES E ØP A1 Q H1 TERM. 4 D 45o E1 D1 L1 b1 L b c 60o 1 2 3 e e1 J1 MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A 0.170 0.180 4.32 4.57 - A1 0.048 0.052 1.22 1.32 3, 4 b 0.030 0.034 0.77 0.86 b1 0.045 0.055 1.15 1.39 2, 3 c 0.014 0.019 0.36 0.48 2, 3, 4 14.99 15.49 - D 0.590 0.610 D1 - 0.160 E 0.395 0.410 E1 - 0.030 10.04 - 4.06 - 10.41 - 0.76 - e 0.100 TYP 2.54 TYP 5 e1 0.200 BSC 5.08 BSC 5 H1 0.235 0.255 5.97 6.47 - J1 0.100 0.110 L 0.530 0.550 2.54 2.79 6 13.47 13.97 L1 0.130 0.150 3.31 - 3.81 2 ØP 0.149 0.153 3.79 3.88 - Q 0.102 0.112 2.60 2.84 - NOTES: 1. These dimensions are within allowable dimensions of Rev. J of JEDEC TO-220AB outline dated 3-24-87. 2. Lead dimension and finish uncontrolled in L1. 3. Lead dimension (without solder). 4. Add typically 0.002 inches (0.05mm) for solder coating. 5. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 6. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 7. Controlling dimension: Inch. 8. Revision 2 dated 7-97. ©2001 Fairchild Semiconductor Corporation ISL9G2060EG3, ISL9G2060EP3, ISL9G2060ES3 Rev. A TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST FASTr™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ PowerTrench QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER SMART START™ Star* Power™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ UltraFET VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H1