SC4525D 18V, 3A, 350kHz Step-Down Switching Regulator POWER MANAGEMENT Features Input range: 3V to 18V 3A Output Current 350kHz Fixed Switching Frequency Precision 1V Feedback Voltage Peak Current-Mode Control Cycle-by-Cycle Current Limiting Hiccup Overload Protection with Frequency Foldback Soft-Start and Enable Thermal Shutdown Thermally Enhanced 8-pin SOIC Package Fully RoHS and WEEE compliant Applications SC4525A SW 10 mH SC4525D SS/ EN 85 1 N 4148 C1 0. 33 mF L1 BST IN C7 C8 47pF RSET R7 11.5k R4 33.2k 5V/3A GND R5 60.4 k D2 20BQ030 80 OUT FB COMP Efficiency 90 D1 10 V – 16V C4 10mF 12 Fig.1b: 350kHz 10-16V to 5V/3A Step-Down Converter (Front Page Efficien Typical Application Circuit 22 nF Peak current-mode PWM control employed in the SC4525D achieves fast transient response with simple loop compensation. Cycle-by-cycle current limiting and hiccup overload protection reduces power dissipation during output overload. Soft-start function reduces input startup current and prevents the output from overshooting during power-up. The SC4525D is available in SOIC-8 EDP package. XDSL and Cable Modems Set Top Boxes Point of Load Applications CPE Equipment DSP Power Supplies LCD and Plasma TVs V IN The SC4525D is a 350kHz constant frequency peak current-mode step-down switching regulator capable of producing 3A output current from an input ranging from 3V to 18V. The SC4525D is suitable for next generation XDSL modems, high-definition TVs and various point of load applications. R6 8.25k C2 47mF C5 2.2 nF Efficiency (%) Description VIN =12V 75 70 65 60 55 50 45 40 L1 : Coiltronics CD1- 100 C2 : Murata GRM 31CR60J 476 M C4 : Murata GRM 31CR61E 106 K 0 0.5 1 1.5 2 2.5 3 Load Current (A) Figure 1. 350kHz 10V -16V to 5V/3A Step-down Converter Jan. 13, 2011 Efficiency of the 1MHz 10V-28V to 5V/3A Step-Down Converter (Front Pag Fig.1a : 350 kHz10V - 16 V to5V/3 A Step - www.semtech.com Down Converter ( Front Page Schematic ) SC4525D Pin Configuration Ordering Information SW 1 8 BST IN 2 7 FB RSET 3 6 COMP GND 4 5 SS/EN 9 Device Package SC4525DSETRT(1)(2) SOIC-8 EDP SC4525DEVB Evaluation Board Notes: (1) Available in tape and reel only. A reel contains 2,500 devices. (2) Available in lead-free package only. Device is fully WEEE and RoHS compliant and halogen-free. (8 - Pin SOIC - EDP) Marking Information yyww=Date code (Example: 0752) xxxxx=Semtech Lot No. (Example: E9010) © 2011 Semtech Corp. www.semtech.com SC4525D Absolute Maximum Ratings Thermal Information VIN Supply Voltage ……………………………… -0.3 to 24V Junction to Ambient (1) ……………………………… 36°C/W BST Voltage ……………………………………………… 40V Junction to Case (1) ………………………………… BST Voltage above SW …………………………………… 24V Maximum Junction Temperature……………………… 150°C Storage Temperature ………………………… -65 to +150°C SS Voltage ……………………………………………-0.3 to 3V FB Voltage …………………………………………… -0.3 to VIN Lead Temperature (Soldering) 10 sec ………………… 300°C Recommended Operating Conditions SW Voltage ………………………………………… -0.6 to VIN SW Transient Spikes (10ns Duration)……… -2.5V to VIN +1.5V Peak IR Reflow Temperature …………………………. 5.5°C/W Input Voltage Range ……………………………… 3V to 18V 260°C ESD Protection Level(2) ………………………………… 2000V Maximum Output Current ……………………………… 3A Operating Ambient Temperature …………… -40 to +105°C Operating Junction Temperature …………… -40 to +125°C Exceeding the above specifications may result in permanent damage to the device or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not recommended. NOTES(1) Calculated from package in still air, mounted to 3” x 4.5”, 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards. (2) Tested according to JEDEC standard JESD22-A114-B. Electrical Characteristics Unless otherwise noted, VIN = 12V, VBST = 15V, VSS = 2.2V, -40°C < TA = TJ < 125°C, RSET = 60.4kΩ. Parameter Conditions Min Typ Max Units 18 V 2.95 V Input Supply Input Voltage Range VIN Start Voltage 3 VIN Rising 2.70 VIN Start Hysteresis VIN Quiescent Current VIN Quiescent Current in Shutdown 2.82 225 mV VCOMP = 0 (Not Switching) 2 2.6 mA VSS/EN = 0, VIN = 12V 40 52 µA 1.000 1.020 V Error Amplifier Feedback Voltage Feedback Voltage Line Regulation FB Pin Input Bias Current 0.980 VIN = 3V to 18V 0.005 VFB = 1V, VCOMP = 0.8V -170 %/V -340 nA Error Amplifier Transconductance 300 µΩ-1 Error Amplifier Open-loop Gain 60 dB 15.2 A/V VFB = 0.9V 2.35 V COMP Source Current VFB = 0.8V, VCOMP = 0.8V 17 COMP Sink Current VFB = 1.2V, VCOMP = 0.8V 25 COMP Pin to Switch Current Gain COMP Maximum Voltage µA Internal Power Switch Switch Current Limit Switch Saturation Voltage © 2011 Semtech Corp. (Note 1) ISW = -3.9A 3.9 5.1 6.6 A 380 600 mV www.semtech.com SC4525D Electrical Characteristics (Cont.) Unless otherwise noted, VIN = 12V, VBST = 15V, VSS = 2.2V, -40°C < TA = TJ < 125°C, RSET = 60.4kΩ. Parameter Conditions Min Typ Minimum Switch On-time 150 Minimum Switch Off-time 100 Switch Leakage Current Max Units ns 150 ns 10 µA Minimum Bootstrap Voltage ISW = -3.9A 1.8 2.3 V BST Pin Current ISW = -3.9A 100 150 mA Oscillator Switching Frequency RSET = 60.4kΩ 275 350 425 kHz Foldback Frequency RSET = 60.4kΩ, VFB = 0 35 65 100 kHz 0.2 0.3 0.4 V 0.95 1.2 1.4 V Soft Start and Overload Protection SS/EN Shutdown Threshold SS/EN Switching Threshold Soft-start Charging Current VFB = 0 V VSS/EN = 0 V VSS/EN = 1.5 V 1.9 1.6 Soft-start Discharging Current 2.4 3.2 µA 1.5 µA Hiccup Arming SS/EN Voltage VSS/EN Rising 2.15 V Hiccup SS/EN Overload Threshold VSS/EN Falling 1.9 V Hiccup Retry SS/EN Voltage VSS/EN Falling 0.6 1.0 1.2 V Over Temperature Protection Thermal Shutdown Temperature 165 °C Thermal Shutdown Hysteresis 10 °C Note 1: Switch current limit does not vary with duty cycle. © 2011 Semtech Corp. www.semtech.com SC4525D Pin Descriptions SO-8 Pin Name 1 SW Emitter of the internal NPN power transistor. Connect this pin to the inductor, the freewheeling diode and the bootstrap capacitor. 2 IN Power supply to the regulator. It is also the collector of the internal NPN power transistor. It must be closely bypassed to the ground plane. 3 RSET Connect a 60.4kW resistor from this pin to ground. 4 GND Ground pin 5 SS/EN Soft-start and regulator enable pin. A capacitor from this pin to ground provides soft-start and overload hiccup functions. Hiccup can be disabled by overcoming the internal soft-start discharging current with an external pullup resistor connected between the SS/EN and the IN pins. Pulling the SS/EN pin below 0.2V completely shuts off the regulator to low current state. 6 COMP The output of the internal error amplifier. The voltage at this pin controls the peak switch current. A RC compensation network at this pin stabilizes the regulator. 7 FB The inverting input of the error amplifier. If VFB falls below 0.8V, then the switching frequency will be reduced to improve short-circuit robustness (see Applications Information for details). 8 BST Supply pin to the power transistor driver. Tie to an external diode-capacitor bootstrap circuit to generate drive voltage higher than VIN in order to fully enhance the internal NPN power transistor. 9 Exposed Pad The exposed pad serves as a thermal contact to the circuit board. It is to be soldered to the ground plane of the PC board. © 2011 Semtech Corp. Pin Function www.semtech.com SC4525D Block Diagram IN SLOPE COMP COMP 6 FB 7 + 2 S + + ISEN 3.53m W + EA + + ILIM - OC 18mV BST V1 8 + PWM - S R FREQUENCY FOLDBACK ROSC Q POWER TRANSISTOR CLK OSCILLATOR 3 1.2V 1 R R SW OVERLOAD - PWM A1 + SS/EN 5 1V SOFT- START AND OVERLOAD HICCUP CONTROL 1.9V REFERENCE & THERMAL SHUTDOWN FAULT GND 4 Figure 2. SC4525D Block Diagram 1.9V SS/EN IC 2.4mA B4 + Q B1 OVERLOAD R 1V/2.15V FAULT S ID 3.9mA B2 _ Q S OC R PWM B3 Figure 3. Soft-start and Overload Hiccup Control Circuit © 2011 Semtech Corp. www.semtech.com Typical Characteristics V O=2.5V 70 V O=1.5V 65 60 55 75 Efficiency (%) Efficiency (%) 75 65 60 55 50 (5) Freq vs Temp 45 45 VIN=5V D2 =B320A 0 0.5 1 1.5 2 2.5 V O=1V 65 60 55 VIN=3.3V D2 =B320A 40 0.5 1 1.5 2 2.5 3 0 0.5 1 Load Current (A) Load Current (A) 2.5 3 1.25 1.2 1.02 2 Foldback Frequency vs VFB Frequency vs Temperature Feedback Voltage vs Temperature 1.5 Load Current (A) SS270 REV 6-7 SS270 REV 6-7 SS270 REV 6-7 70 (6) Foldback Freq vs Temp 45 0 3 75 50 40 40 V O=2V 80 V O=1.5V 70 VIN=12V D2 =B320A 50 85 V O=2.5V 80 Efficiency 90 V O=3.3V 85 V O=3.3V 80 Efficiency 90 Efficiency (%) 85 Temp SC4525B SC4525B Efficiency 90 SC4525D (3) 3.3Vin Eff (2) 5Vin Eff ff 1.00 0.99 0.98 (8) OCP current 1.1 1.0 0.9 (9) BST Pin current Normalized Frequency VFB (V) 1.01 Normalized Frequency VIN =12V 0.8 0.97 -50 -25 0 25 50 75 -50 100 125 -25 25 50 75 100 125 0.75 0.5 TA=25oC 0.25 0 0.00 0.40 0.60 0.80 1.00 VFB (V) SS270 REV 6-7 500 Switch Saturation Voltage vs Switch Current Switch Current Limit vs Temperature BST Pin Current vs Switch Current 5.2 100.0 VIN =12V 450 25oC -40oC 200 150 BST Pin Current (mA) 300 Current Limit (A) 125 C 350 250 VBST =15V 4.8 o 400 VCESAT (mV) 0.20 Temperature (OC) o Temperature ( C) SS270 REV 6-7 0 1 4.4 4.0 3.6 75.0 -40oC 50.0 125oC 25.0 100 50 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Switch Current (A) © 2011 Semtech Corp. 3.2 0.0 -50 -25 0 25 50 75 o Temperature ( C) 100 125 0 0.5 1 1.5 2 2.5 3 3.5 4 Switch Current (A) www.semtech.com SC4525D eshold vs temp (11) Vin Sup Cur vs SSCurve volt 12 Typical Characteristics (Cont.) SS270 REV 6-7 SS270 REV 6-7 SS270 REV 6-7 VIN Supply Current vs Soft-Start Voltage VIN Thresholds vs Temperature 2.5 VIN Threshold (V) 2.9 Start Current (mA) 2.8 2.7 2.6 2.5 40 -40oC -40oC 1.5 1.0 30 125oC 20 UVLO 0.5 (14) SS shutdown threshold (15)vs SStemp charge cur vs 10SS volt 0 0.0 2.4 -50 -25 0 25 50 75 0 100 125 0.5 Temperature (o C) 1 1.5 VIN Quiescent Current vs VIN 2.5 0 2 2 4 6 8 10 12 14 16 18 VIN (V) VSS (V) SS270 REV 6-7 SS270 REV 6-7 SS270 REV 6-7 SS Shutdown Threshold vs Temperature 0.40 Soft-Start Charging Current vs Soft-Start Voltage 0.0 125oC -0.5 -40 C 1.5 1.0 0.5 0.35 Current (uA) o SS Threshold (V) 2.0 Current (mA) VSS = 0 125oC 2.0 VIN Shutdown Current vs VIN 50 Current (uA) 3.0 0.30 2 4 6 8 10 12 14 16 18 VIN (V) © 2011 Semtech Corp. -40oC -1.5 -2.0 -2.5 0.20 0 125oC 0.25 VCOMP = 0 0.0 -1.0 -3.0 -50 -25 0 25 50 75 o Temperature ( C) 100 125 0 0.5 1 1.5 2 VSS (V) www.semtech.com SC4525D Applications Information Operation The SC4525D is a 350kHz fixed frequency, peak currentmode, step-down switching regulator with an integrated 3.9A power NPN transistor. With the peak current-mode control, the double reactive poles of the output LC filter are reduced to a single real pole by the inner current loop. This simplifies loop compensation and achieves fast transient response with a simple Type-2 compensation network. As shown in Figure 2, the switch collector current is sensed with an integrated 3.53mW sense resistor. The sensed current is summed with a slope-compensating ramp before it is compared with the transconductance error amplifier (EA) output. The PWM comparator trip point determines the switch turn-on pulse width. The current-limit comparator ILIM turns off the power switch when the sensed signal exceeds the 18mV current-limit threshold. Driving the base of the power transistor above the input power supply rail minimizes the power transistor saturation voltage and maximizes efficiency. An external bootstrap circuit (formed by the capacitor C1 and the diode D1 in Figure 1) generates such a voltage at the BST pin for driving the power transistor. is charged with an internal 1.9µA current source (not shown in Figure 3). As the SS/EN voltage exceeds 0.4V, the internal bias circuit of the SC4525D turns on and the SC4525D draws 2mA from VIN. The 1.9µA charging current turns off and the 2.4µA current source IC in Figure 3 slowly charges the soft-start capacitor. The error amplifier EA in Figure 2 has two non-inverting inputs. The non-inverting input with the lower voltage predominates. One of the non-inverting inputs is biased to a precision 1V reference and the other non-inverting input is tied to the output of the amplifier A1. Amplifier A1 produces an output V1 = 2(VSS/EN -1.2V). V1 is zero and COMP is forced low when VSS/EN is below 1.2V. During start up, the effective non-inverting input of EA stays at zero until the soft-start capacitor is charged above 1.2V. Once VSS/ exceeds 1.2V, COMP is released. The regulator starts to EN switch when VCOMP rises above 0.4V. If the soft-start interval is made sufficiently long, then the FB voltage (hence the output voltage) will track V1 during start up. VSS/EN must be at least 1.83V for the output to achieve regulation. Proper soft-start prevents output overshoot. Current drawn from the input supply is also well controlled. Overload / Short-Circuit Protection Table 2 lists various fault conditions and their corresponding protection schemes in the SC4525D. Shutdown and Soft-Start Table 2: Fault conditions and protections The SS/EN pin is a multiple-function pin. An external capacitor (4.7nF to 22nF) connected from the SS pin to ground sets the soft-start and overload shutoff times of the regulator (Figure 3). The effect of VSS/EN on the SC4525D is summarized in Table 1. Table 1: SS/EN operation modes SS/EN Mode Supply Current <0.2V Shutdown 18uA @ 5Vin 0.4V to 1.2V Not switching 2mA 1.2V to 2.15V Switching & hiccup disabled >2.15V Switching & hiccup armed Load dependent Pulling the SS/EN pin below 0.2V shuts off the regulator and reduces the input supply current to 18µA (VIN = 5V). When the SS/EN pin is released, the soft-start capacitor © 2011 Semtech Corp. Condition Cause of Fault Protective Action Cycle-by-cycle limit at IL>ILimit, V FB>0.8V Over current IL>ILimit, V FB<0.8V Over current VSS/EN Falling Persistent over current frequency foldback Shutdown, then retry SS/EN<1.9V or short circuit (Hiccup) Tj>160C Over temperature Shutdown programmed frequency Cycle-by-cycle limit with As summarized in Table 1, overload shutdown is disabled during soft-start (VSS/EN<2.15V). In Figure 3, the reset input of the overload latch B2 will remain high if the SS/EN voltage is below 2.15V. Once the soft-start capacitor is charged above 2.15V, the output of the Schmitt trigger B1 goes high, the reset input of B2 goes low and hiccup becomes armed. As the load draws more current from www.semtech.com SC4525D Applications Information (Cont.) the regulator, the current-limit comparator ILIM (Figure where VIN is the input voltage, VCESAT is the switch saturation 2) will eventually limit the switch current on a cycle-byvoltage, and VD is voltage drop across the rectifying cycle basis. The over-current signal OC goes high, setting diode. the latch B3. The soft-start capacitor is discharged with (ID - IC) (Figure 3). If the inductor current falls below the In peak current-mode control, the PWM modulating current limit and the PWM comparator instead turns off ramp is the sensed current ramp of the power switch. the switch, then latch B3 will be reset and IC will recharge This current ramp is absent unless the switch is turned the soft-start capacitor. If over-current condition persists on. The intersection of this ramp with the output of the or OC becomes asserted more often than PWM over voltage feedback error amplifier determines the switch a period of time, then the soft-start capacitor will be pulse width. The propagation delay time required to discharged below 1.9V. At this juncture, comparator B4 immediately turn off the switch after it is turned on is the sets the overload latch B2. The soft-start capacitor will be minimum controllable switch on time (TON(MIN)). continuously discharged with (ID - IC). The COMP pin is immediately pulled to ground. The switching regulator is Closed-loop measurement shows that the SC4525D Fig.4: Minbelow On-Timeminimum vs Temp on time is about 120ns at room temperature shut off until the soft-start capacitor is discharged 1.0V. At this moment, the overload latch is reset. The (Figure 4). If the required switch on time is shorter than soft-start capacitor is recharged and the converter again the minimum on time, the regulator will either skip cycles SS270 REV 6-7 undergoes soft-start. The regulator will go through softor it will jitter. start, overload shutdown and restart until it is no longer Minumum On Time vs Temperature overloaded. 200 During normal operation, the soft-start capacitor is charged to 2.4V. Setting the Output Voltage VO=1.5V, IO=1A 180 TON_MIN (ns) If the FB voltage falls below 0.8V because of output overload, then the switching frequency will be reduced. Frequency foldback helps to limit the inductor current when the output is hard shorted to ground. 160 140 120 100 -50 The regulator output voltage, VO, is set with an external resistive divider (Figure 1) with its center tap tied to the FB pin. For a given R6 value, R4 can be found by V R 4 = R 6 O − 1 1 .0 V (1) VO + VConsideration D Minimum D = On Time VIN + VD − VCESAT V The operating duty cycle of a non-synchronous stepR = R 6 O − 1 down 4switching regulator in continuous-conduction 1 . 0 V mode (CCM) (isVOgiven + VD )by ⋅ (1 − D) DIL = VO F+SW VD⋅ L 1 D= (2) VIN + VD − VCESAT ( V + V ) ⋅ (1 − D) L1 = O D 20Corp. % ⋅ IO ⋅ FSW © 2011 Semtech ( V + VD ) ⋅ (1 − D) DI = O -25 0 25 50 75 100 125 Temperature (OC) 1 V 1 AC = − 20 ⋅ log 4. Variation ⋅ ⋅ FB On Time Figure of Minimum R S 2 πFC C O VO G CA with Ambient Temperature 1 1 1 .0 To allow for transient headroom, operating A ⋅ the minimum ⋅ = 15 C = − 20 ⋅ log −3 3 −6 28 ⋅ 6 . 1be ⋅ 10 2 π20% ⋅ 80to ⋅ 10 ⋅ 10 than3 . 3 switch on time should at least 30%⋅ 22 higher the worst-case minimum on 1 1 time.VFB AC = − 20 ⋅ log ⋅ ⋅ 2 πFC C O VO 15 . 9 G CAR S 20 10 Off Time RMinimum = 22Limitation . 3k 7 = 0 . 28 ⋅ 10 −3 1 1 1 .0 AThe 20 ⋅ log ⋅ 1in Figure −23 is⋅ reset every3 cycle by−6 the = 15 C = − PWM latch 3 .3 ⋅ 80nF⋅ 10 ⋅ 22 ⋅ 10 28 ⋅ 6 . 1 ⋅ 10 =20π. 45 C5 = clock.2 πThe ⋅ 16clock ⋅ 10 3 also ⋅ 22 . 1turns ⋅ 10 3 off the power transistor to refresh the bootstrap capacitor. This minimum off time 1 duty cycle of the regulator at a given 15 . 9 the Climits = 12pF 20 8 = 10 attainable 3 3 ⋅ 22 R 7 = 2 π⋅ 600 −⋅ 310= 22 . 3 k. 1 ⋅ 10 0 . 28 ⋅ 10 www.semtech.com 10 1 C = = 0 . 45 nF SC4525D AC = V R 4 = R 6 O − 1 1 .0 V Applications Information (Cont.) switching frequency. The measured minimum off time is 100ns typically. If the required duty cycle is higher than the attainable maximum, then the output voltage will not VOits set value in continuous-conduction be able R 4 to = Rreach −1 6 1 .0 V mode. Inductor Selection VO + VD D= VIN + VD − VCESAT The inductor ripple current for a non-synchronous stepdown converter in continuous-conduction mode is (V V+ V ) ⋅ (1 − D) RD4 IL= =R 6 O O D− 1 1 . 0FVSW ⋅ L 1 (3) where FSW is the switching frequency (350kHz) and L1 is ( V V+ V+ V) ⋅ (1 − D) the inductance. L 1== O O D D D ⋅ I ⋅ FSW VIN 20 + V% D − OVCESAT An inductor ripple current between 20% to 50% of the maximum load current, IO, gives a good compromise ⋅ )D ⋅ (1 −size. D) Re-arranging Equation (3) _ CIN amongIRMS efficiency, and ( VO= +I OVcost D ⋅ (1 − D) D I = L and assuming 35% ripple current, the inductor is FSWinductor ⋅ L1 given by V R 4 = R 6 O − 1 ( VO 1+.V 0DV) ⋅ (1 − D) 1 LD1V= (4) O = DIL ⋅ ESR + 35 % ⋅ I ⋅ F 8 ⋅ F ⋅ C O SW SW O VO R4 = R6 −1 VO. 0+VVvaries 1 D over a wide range, then choose If the input voltage D= VIN +the VD nominal − VCESAT input voltage. Always verify L1 based on IRMS _ CIN = I O ⋅ D ⋅ (1 − D) converter operation VO I+ VDat the input voltage extremes. O D=> C IN V + V − V IN 4 ⋅ DVDIN ⋅ FCESAT The peak current power transistor is at ( VO + limit VD ) ⋅SW (of 1 −SC4525D D) D I = L The maximum deliverable load current for the least 3.9A. 1 F SW ⋅ L 1 DVO is= D IL ⋅ minus ESR + one half of the inductor ripple SC4525D 3.9A ( V + V ) ⋅ (1 8− ⋅DF)SW ⋅ C O current. DIL = ( V O+ V D) ⋅ (1 − D) D ⋅ L1 L 1 = O FSW 20 % ⋅ IO ⋅ FSW Input Decoupling Capacitor ( V + V ) ⋅ (1 − D) L 1 => O IOD C IN capacitor The input ⋅ I should ⋅ FSW be chosen to handle the RMS 4 20 ⋅ =D% V SW⋅ (1 − D) IRMS _ CIN I OIN⋅ ⋅OFD ripple current of a buck converter. This value is given by IRMS _ CIN = I O ⋅ D ⋅ (1 − D) (5) 1 DVOcapacitance = DIL ⋅ ESR must + The input also be high enough to keep 8 ⋅ FSW ⋅ C O input ripple voltage within specification. This is important 1 from in reducing EMI ESR + the regulator. The DVO = the DIL ⋅conductive ⋅ FSW ⋅ C O from input capacitance can be8estimated IO C IN > 4 ⋅ DVIN ⋅ FSW IO © 2011 CSemtech Corp. > IN 4 ⋅ DVIN ⋅ FSW (6) AC = V 1+ V FB DV is the allowable1 inputVripple voltage. Awhere C = − 20 D =⋅INlog GO R D ⋅ 2 πF C ⋅ V CA S C O O VIN + VD − VCESAT Multi-layer ceramic capacitors, which have very low ESR (a R = 1 handle high RMS ripple 1 current, are 1 .0 7 few mW) and can easily AC = − 20 ⋅ log ⋅ ⋅ = 15 −3 6 the ideal choice to −10µF 3 .3 ⋅V6input .)1⋅ (⋅110−filtering. 2π ⋅ A 80single ⋅ 10 3 4.7µF ⋅ 22 ⋅ 10 ( VO28 +for D ) D DIL = capacitor X5R ceramic is adequate for most applications. C 5 = FSW ⋅ L 1 For high voltage applications, a small ceramic (1µF or 15 . 9 2.2µF) can 10 20beplaced in parallel with VFB a low ESR electrolytic C 8 = R7 = =122 .(31k− D1) ( Vsatisfy − O3+ VD ) ⋅both bulk capacitance Acapacitor 20 ⋅ log ⋅ ⋅ to the ESR and C = − 0 . 28 ⋅ 10 G R 2 πF C L1 = VO CA SO ⋅ FSW C O 20 % ⋅ I requirements. 1 C5 = = 0 . 45 nF 3 3 2 π ⋅ 16 ⋅ 10 ⋅ 22 . 1 ⋅ 10 1 1 1 . 0 Vo Capacitor AOutput ⋅ ⋅ = = 15 C = − 20 ⋅ log −3 IRMS _ CIN = (1 − D)2 π ⋅ 80 ⋅ 10 3 ⋅ 22 ⋅ 10 −6 3 . 3 Vc 28I1O⋅ ⋅6 . 1D⋅⋅10 C8 = = 12pF The output DV3O of a buck converter can be 2 π⋅ 600ripple ⋅ 10 3 voltage ⋅ 22 . 1 ⋅ 10 expressed15as .9 10 20 GPWM R7 = = 22 . 3 k 1 − 3 (1 + s R GPWM V DV⋅O10 = D IL ⋅ ESR ESR + CO) 0 . 28 o (7) = 8 ⋅ F 2 ⋅ C2O Vc (1 + s / ωp )(1 + s / ωn Q + sSW / ωn ) V 1 1 = 0 . 45 CA5 == − 20 ⋅ log 3 3 ⋅ capacitance. ⋅ FBnF where is ⋅the C 2 πC ⋅ 16 10 Goutput ⋅ 22 . 1 ⋅ 10 O R7 = CAR S 2 πFC C O VO R 11 1 V 1 1 = the⋅ log inductor as D, ωZ = CG = ≈ 20 12,FBpFDIL increases , 3IO ripple 8PWM ASince ⋅1 ωp ≈3current ⋅ C = 2−π G ⋅ R R C R C Ois 1 1 . 0 C = ⋅ 600 ⋅ 10 ⋅ 22 . 1 ⋅ 10 C > CA S O ESR G R 2 π F C V (3)), the output voltage IN (Equation ripple Adecreases ⋅ =5 15 C = − 20 ⋅ log 3 −6 4⋅ 28 DCA VIN⋅ 6⋅S.F1SW⋅ 10 C− 3 O⋅ 2 π ⋅O80 3 .3 ⋅ 10 ⋅ 22 ⋅ 10 therefore the highest when V is at its maximum. IN AC 10 20 1 1 1 .0 R GPWM 1 + s R ESR C O ) ⋅ VAo7C = − 20 ⋅ log = ⋅ (X5R C=815 − 3 capacitor is found 3 −6 A =22µF ceramic adequate gmto 1547µF . 9 28 ⋅ 6 . 1 ⋅ 10 3 .3 2 2 π 2⋅ 80 ⋅ 10 ⋅ 22 ⋅ 10 20 Vfor ( 1 + s / ω ) ( 1 + s / ω Q + s / ω ) 10 filtering c p n n applications. Ripple current R 7 =output = 22in. 3most k −3 1 0 . 28 ⋅ 10 the output capacitor is not a concern because the Cin = 5 15R .9 2 π F Z 1 7 inductor current 20 1 of a buck converter directly feeds 1 CO, = 10R , 3= 22 . 3 kω ≈3 =10 .,45 nF GRCresulting ω = 75 = ≈ − 3 in very low ripple current. Avoid using Z5U, PWM p Z 02.π 28⋅116 ⋅⋅10 G R⋅S10 ⋅ 22 . 1 ⋅ 10 R C O R ESR C O Cand 8 = Y5VCAceramic 2 πFP1 R 7 11capacitors for output filtering because Cthese = =high 0 . 45temperature nF of capacitors have and high AC 58 = types 3 3 3 3 = 12 pF 20 2 π ⋅ 16 ⋅ 10 ⋅ 22 . 1 ⋅ 10 10 2 π 600 ⋅ 10 ⋅ 22 . 1 ⋅ 10 coefficients. R voltage 7 = gm 1 C8 = = 12pF 3 3 Freewheeling Diode 2 π ⋅ 600 ⋅ 10 ⋅ 22 . 1 ⋅ 10 G ( 1 + s R C ) Vo PWM ESR O 1 C 5 == VUse ( 1 + s / ω ) ( 1 + s / ω Q + s 2 /asωn2freewheeling ) c 2ofπFSchottky barrier ndiodes rectifiers Z1 R 7 p G ( 1 + s R C ) Vreduces diode reverse recovery input current spikes, PWM ESR O o 1 = 2 2 CVeasing = high-side current sensing in the SC4525D. These 8 c 1 2(1π+FPs1R/Rω7 p )(1 + s / ωn Q +≈s 1/ ω,n ) Gdiodes ωZ = rating, average forward current PWM ≈ should, have an ω p GCA ⋅ R S RCO R ESR C O at least 3A and a reverse blocking voltage of at least a R 1 1 few volts AC higher than the input voltage. For switching GPWM ≈ 20 , ωp ≈ , ωZ = , 10GCA ⋅operating RS R C O cycles (i.e. lowRoutput at low duty ESR C O Rregulators = 7 gmto input voltage conversion ratios), it is beneficial voltage AC to use 10 201freewheeling diodes with somewhat higher RCaverage = 75 = current ratings (thus lower forward voltages). This 2gπmFZ1 R 7 C 58 == 1 22 ππFFZP11 R 77 www.semtech.com 11 SC4525D Applications Information (Cont.) is because the diode conduction interval is much longer than that of the transistor. Converter efficiency will be improved if the voltage drop across the diode is lower. The freewheeling diode should be placed close to the SW pin of the SC4525D to minimize ringing due to trace inductance. 20BQ030 (International Rectifier), B320A, B330A (Diodes Inc.), SS33 (Vishay), CMSH3-20MA and CMSH3-40MA (Central-Semi.) are all suitable. The freewheeling diode should be placed close to the SW pin of the SC4525D on the PCB to minimize ringing due to trace inductance. For the bootstrap circuit, a fast switching PN diode (such as 1N4148 or 1N914) and a small (0.33µF – 0.47µF) ceramic capacitor is sufficient for most applications. When bootstrapping from 2.5V to 3.0V output voltages, use a low forward drop Schottky diode (BAT-54 or similar) for D1. If VOUT > 8V, then a protection diode D4 between the SW and the BST pins will be required as shown in Figure 6 (c). D4 can be a small PN diode such as 1N4148 or 1N914 if the operating temperature does not exceed 85 ºC. Use a small Schottky diode (BAT54 or similar) if the converter is to operate up to 125 ºC. D1 Bootstrapping the Power Transistor Fig.6: Methods of BST The minimum BST-SW voltage required to fully saturate the power transistor is shown in Figure 5, which is about 2V at room temperature. The BST-SW voltage is supplied by a bootstrap circuit powered from either the input or the output D1 of the converter (Figure 6(a), 6(b) and 6(c)). To maximize efficiency, tie the bootstrap diodeBST to the converter C1 output if VO>2.5V as shown in Figure 6 (a). Since the bootstrap VIN VOUT SW converter load supply current is proportional to the IN to power the bootstrap vs Temp current, using a lower voltageSC4525D D2 GND circuit reduces driving loss (Equation (11), page 14) and SS270 REV 6-7 improves efficiency. BST VOUT SW IN SC4525D 12 D2 GND (a) D1 C1 BST VIN VOUT SW IN SC4525D D2 GND Minimum Bootstrap Voltage (a) vs Temperature 2.2 (b) D1 D4 2.1 Voltage (V) C1 VIN BST C1 VIN 2.0 SC4525D 1.9 D2 GND 1.8 VOUT>8V SW IN ISW =-3.9A 1.7 D4 is either a pn juntion diode or a Schottky diode depending on the operating temperature. 1.6 -50 -25 0 25 50 75 100 125 Temperature (o C) (C) Figure 6. Methods of Bootstrapping the SC4525D Figure 5. Typical Minimum Bootstrap Voltage required to Saturate the Transistor (ISW= -3.9A) © 2011 Semtech Corp. www.semtech.com 12 = 10 1 R 7 = 0 . 28 ⋅ 10 −3 = 22 . 3 k C8 = = 12pF 2 π⋅ 600 ⋅ 10 3 ⋅ 22 . 1 ⋅ 10 3 1 C5 = = 0 . 45 nF 2 π ⋅ 16 ⋅ 10 3 ⋅ 22 . 1 ⋅ 10 3 ( VO + VD ) ⋅ (1 − D) FSW ⋅ L 1 SC4525D GPWM (1 + s R ESR C O ) Vo 1 = C = = 12pF 2 3 ) ( VO + VD ) ⋅ (1 − D) Vc (1 + s / ωp )(1 + s 8/ ωn2Qπ+⋅ 600 s2 / ω ) ⋅ 22 . 1 ⋅ 10 3 ⋅ 10 n = Information (Cont.) 20 %Applications ⋅ IO ⋅ FSW Loop Compensation R 1 Vo ωp ≈ 1GPWM GPWM ≈ , , (1 + s R ESR ωZC=O ) , = GCA ⋅ R S R/CωO )(1 + s / ω Q + sR2 ESR C2O) ⋅ D ⋅ ( 1 − D ) V ( 1 + s / ω _ CIN = I O c frequencyp n n The goal of compensation is to shape the SW ⋅ C O response of the converter soAC as to achieve high DC a dominant low-frequency pole FP at 10 20 accuracy and fast transient R 7 = response while maintaining R 1 1 gm G ≈ , ωp ≈ , ωZ = , PWM loop stability. 1 G ⋅ R R C R CO CA S O ESR = D I ⋅ ESR + O L 1 8 ⋅ FSW ⋅ C O C 5 = 7 shows the control loops AC of a The block diagram in Figure and double poles at half the switching frequency. 2 πFZ1 R 7 20 10 buck converter with the SC4525D. The innerR 7loop = (current 1 resistor (R =3.53mW) gm loop) consists of a current sensing Including the voltage divider (R4 and R6), the control to C8 = s of control loop 2 π F R a current amplifier (CA) with feedback transfer function is found and plotted in Figure P 1 7gain (GCA=18.5).1 The Iand O > C 5 = amplifier outer loop (voltage loop) consists of an error 8 as the converter gain. 4 ⋅ DVIN ⋅ FSW 2 πFZ1 R 7 (EA), a PWM modulator, and a LC filter. 1 Since the converter gain has only one dominant pole at C8 = 2 π F R Since the current loop is internally closed, the remaining low frequency, a simple Type-2 compensation network P1 7 task for the loop compensation is to design the voltage is sufficient for voltage loop compensation. As shown in compensator (C5, R7, and C8). Figure 8, the voltage compensator has a low frequency integrator pole, a zero at FZ1, and a high frequency pole CONTROLLER AND SCHOTTKY DIODE at FP1. The integrator is used to boost the gain at low Io frequency. The zero is introduced to compensate the Rs CA Fig.8: Bode plot of loop gains phase lag at the loop gain crossover due to the excessive integrator pole (-90deg) and the dominant pole (-90deg). REF VFB + 11PWM ⋅ V 11 FB Vc A = − 20 ⋅ log ⋅ The high frequency pole nulls the ESR zero and attenuates ACC = −EA20 ⋅ log GMODULATOR R S ⋅ 22 π πFFC C CO ⋅ V VOL1 FB CAR Vo S C SWO O G CA high frequency noise. 12 1 Vramp 11 11 R4 Co AC = =− − 20 20 log ⋅ C5 A ⋅⋅ log −33 ⋅ C − 28 10 π ⋅⋅ 80 80 ⋅⋅ 10 10 33 ⋅⋅ 22 22 ⋅⋅ 10 10 −−66 ⋅⋅ 66 ..11 ⋅⋅ 10 22 π 28 C8 11 ..00 = 15 . 9 dB ⋅⋅ 3 . 360 = 15 . 9 dB 3 . 3 COMP R7 Resr R6 30 GPWM ((11 + + ss R R ESR C C O )) Vo G V PWM ESR O o = = Vc ((11 + + ss // ω ωp ))((11 + + ss // ω ωn Q Q+ + ss 22 // ω ωn22 )) V c p n n GAIN (dB) 15 . 9 10 152020.9 10 R = = 22 22 ..33kk 7 R7 = = 28 ⋅⋅ 10 10 −−33 00 ..28 Figure 7. Block11diagram of control loops C5 = = = 00 ..45 45nF nF C = 5 π ⋅⋅ 16 16 ⋅⋅ 10 10 33 ⋅⋅ 22 22 ..11 ⋅⋅ 10 10 33 22 π For a converter with switching frequency FSW, output 11 inductance CO = loading R, the C8 = = L1, output capacitance =and 12pF pF C 12 8 33 22 . 1 ⋅ 10 33 π⋅⋅output 600 ⋅⋅ 10 10 600 . 1 ⋅ 10function in Figure 7 is control (VC) 22toπ (VO)⋅⋅ 22 transfer given by: Fz1 Fp1 Fp 0 CO NV -30 ER T ER Fc LO OP G 2K EN SA TO RG AIN AIN GA IN Fz -60 0.2K CO MP 20K FREQUENCY (Hz) Fsw/2 200K 2M (8) Figure 8. Bode plots for voltage loop design This transfer function has a finite DC gain R GPWM ≈ ≈ R ,, G PWM GCA ⋅⋅ R RS G CA S A an ESR zero FZ at AC 10 2020C 10 R7 = = R 7 gm g m © 2011 Semtech Corp. C5 = = C 5 11 1 ωp ≈ ≈ 1 ,, ω p RC CO R O Therefore, the procedure of the voltage loop design for 11 , ω = Z ωZ = R Cthe, SC4525D can be summarized as: ESR C O O R ESR (1) Plot the converter gain, i.e. control to feedback transfer function. www.semtech.com 13 SC4525D 1 V 1 AC = − 20 ⋅ log ⋅ ⋅ FB G CAR S 2 πFC C O VO 1 Applications (Cont.) AC = − 20 ⋅ Information log ⋅ −3 1 1 .0 ⋅ = 15 . 9 dB 3 −6 3 .3 2 π ⋅ 80 ⋅ 10 ⋅ 22 ⋅ 10 28 ⋅ 6 . 1 ⋅ 10 (2) Select the open loop crossover frequency, FC, between 10% and 20% of the switching frequency. At FC, find the 7 15 . 9 20 10 20 required compensator gain, AC. In typical applications with 10 R7 = = 7. 4 k R = = 22 . 3 k 0. 3 ⋅ 10 − 3 −3 ceramic 7output capacitors, the ESR zero is neglected and 0 . 28 ⋅ 10 the required compensator 1 1 gain at FC can be estimated by C5 = = 3.1 nF C5 = = 0 . 45 nF 3 3 3 2π ⋅ 7 ⋅ 10 ⋅ 7.4 ⋅ 10 3 2 π ⋅ 16 ⋅ 10 1⋅ 22 . 1 ⋅ 101 VFB (9) AC = − 20 ⋅ log ⋅ ⋅ 1 1 R S 2 πFC C O VO G CA C8 = = 32 pF 3 3 C8 = = 12pF 2 π ⋅ 677 ⋅ 10 ⋅ 7.4 ⋅ 10 3 3 2 π⋅ 600 ⋅ 10 ⋅ 22 . 1 ⋅ 10 1 1 and 1 .0 (3) Place the compensator zero, FZ1,⋅ between 10% AC = − 20 ⋅ log ⋅ = 15 . 9 dB −3 3 −6 3 . 3 R7=7.32k, C5=3.3nF, and C8= 33pF for the design. 28 ⋅ 6 . 1 ⋅ 10 20% of the crossoverfrequency, FC. 2 π ⋅ 80 ⋅ 10 ⋅ 22 ⋅ 10 Select GPWM (1 + s R ESR C O ) Vo = (1 + s / ωp )(1 +pole, s / ωFnP1Q, +tos 2cancel / ωn2 ) the ESR zero, (4) UseVthe compensator Compensator parameters for various typical applications c 15 . 9 10 20 FZ. are listed in Table 4. A MathCAD program is also available R7 = = 22 . 3 k −3 upon request for detailed calculation of the compensator 0 . 28 ⋅ 10 R 1 1 (5) Then, the≈ parameters network parameters. GPWM , 1 of theωpcompensation ≈ , ωZ = , G ⋅ R R C R C C = = 0 . 45 nF CA S O ESR O 5 can be calculated 2 π ⋅ 16by ⋅ 10 3 ⋅ 22 . 1 ⋅ 10 3 Thermal Considerations AC 1 20 10 CR 8 = = 12pF 7 = 2 π⋅ 600 ⋅ 10 3 ⋅ 22 . 1 ⋅ 10 3 For the power transistor inside the SC4525D, the gm conduction loss PC, the switching loss PSW, and bootstrap 1 circuit Ploss P = Pcan be estimated as follows: C5 = T OT ALBST, C + P S W + PB S T + PQ G7PWM (1 + s R ESR C O ) Vo 2 πFZ1 R (10) = Vc (1 + s1 / ωp )(1 + s / ωn Q + s 2 / ωn2 ) PQ = VIN ⋅ 2mA PC = D ⋅ VC E S AT⋅ IO C8 = 2 πFP1 R 7 1 R 1 1 GPWM ≈ , ωp ≈ , ωZ = , PS W = ⋅ t S ⋅ VIN ⋅ I O ⋅ FS W (11) 2 GCA ⋅ R S R C OSC4525D. R ESR C O where gm=0.3mA/V is the EA gain of the I AC PB S T = D ⋅ VB S T ⋅ O 20 10 Example: Determine the voltage compensator for an 40 R7 = 350kHz, 12Vgmto 3.3V/3A converter with 47uF ceramic output capacitor. where PVBST=is(1the voltage and tS is the equivalent − DBST ) ⋅ Vsupply 1 D D ⋅ IO C5 = switching time of the NPN transistor (see Table 3). 2 πFZgain 1 R 7 crossover frequency of 35kHz, and Table 3: Typical Switching Time Choose a loop 2 place voltage compensator zero and pole at FZ1=7kHz 3. Typical switching time PTable 1 IND = (1 . 1 ~ 1 . 3 ) ⋅ I O ⋅ R DC C8 = (20% of FC),2 πand F = 677kHz. From Equation (9), the FP1 R 7P1 Load Current Input Voltage 1A 2A 3A required compensator gain at FC is 1 1 1. 0 A C = − 20⋅ log ⋅ ⋅ = 7 dB −3 3 −6 3. 3 18.5 ⋅ 3 . 53 ⋅ 10 2 π ⋅ 35 ⋅ 10 ⋅ 47 ⋅ 10 5V 12V 6.86ns 12.5ns 9.71ns 15.3ns PT OT AL = PC + PS W + PB S T + InPaddition, the quiescent current loss is Q Then the compensator parameters are PQ = VIN ⋅ 2mA P =D⋅ V ⋅I C PS W = © 2011 Semtech Corp. C E S AT O 12.5ns 18ns (12) The total power loss of the SC4525D is therefore 1 ⋅ t S ⋅ VIN ⋅ I O ⋅ FS W 2 www.semtech.com 14 IO SC4525D Applications Information (Cont.) PT OT AL = PC + PS W + PB S T + PQ (13) The temperature of the SC4525D PisQthe = Vproduct IN ⋅ 2 mA of the PC = D ⋅ VC Erise S AT⋅ I O total power dissipation (Equation (13)) and qJA (36oC/W), which is the thermal impedance from junction to ambient 1 P = ⋅ t ⋅ V S W S IN ⋅ I O ⋅ FS W for the SOIC-82 EDP package. V IN IO to operate the SC4525D above It is not PB Srecommended T = D ⋅ VB S T ⋅ o 40 125 C junction temperature. VOUT PCB Layout PD = (1Considerations − D) ⋅ VD ⋅ IO In a step-down switching regulator, the input bypass PIND the = (1 main . 1 ~ 1 .power 3 ) ⋅ I2O ⋅ Rswitch capacitor, and the freewheeling DC diode carry pulse current (Figure 9). For jitter-free operation, the size of the loop formed by these components should be minimized. Since the power switch is already integrated within the SC4525D, connecting the anode of the freewheeling diode close to the negative terminal of the input bypass capacitor minimizes size of the switched current loop. The input bypass capacitor should be placed close to the IN pin. Shortening the traces of the SW and BST nodes reduces the parasitic trace inductance at these nodes. This not only reduces EMI but also decreases switching voltage spikes at these nodes. ZL Figure 9. Heavy lines indicate the critical pulse current loop. Thes stray inductance of this loop should be minimized. C Vin The exposed pad should be soldered to a large ground plane as the ground copper acts as a heat sink for the device. To ensure proper adhesion to the ground plane, avoid using vias directly under the device. + + © 2011 Semtech Corp. www.semtech.com 15 SC4525D Recommended Component Parameters in Typical Applications Table 4 lists the recommended inductance (L1) and compensation network (R7, C5, C8) for common input and output voltages. The inductance is determined by assuming that the ripple current is 35% of load current IO. The compensator parameters are calculated by assuming a 47mF low ESR ceramic output capacitor and a loop gain crossover frequency of FSW/10. Table 4: SC4525D Compensator Parameters Table 4. Recommended inductance (L1) and compensator (R7, C5, C8) Vin(V) 3.3 5 12 © 2011 Semtech Corp. Typical Applications Vo(V) Io(A) 1.0 2.0 1.5 2.5 3.3 1.5 2.5 3.3 5 7.5 3 C2(uF) 47 L1(uH) 3.3 2.2 3.3 4.7 4.7 4.7 6.8 8.2 10 10 Recommended Parameters R7(k) C5(nF) C8(pF) 3.74 6.49 3.74 6.49 7.5 3.74 6.98 8.66 11.5 18.2 6.8 3.3 6.8 4.7 3.3 6.8 4.7 3.3 2.2 2.2 47 68 82 68 47 R7 7.15 12.4 7.15 12.4 14.3 7.15 13.3 16.5 22.1 34.8 www.semtech.com 16 SC4525D Typical Application Schematics V D1 5V IN C4 4.7mF BST IN SW SC4525D SS /EN BAT- 54 C1 0.33m F L1 4.7mH OUT R4 33.2k 2.5V/3A FB COMP C7 47 pF GND R5 60.4k R7 6.49 k C8 22 nF RSET D2 CMSH3-20M C5 4.7nF L1 : CoiltronicsDR73 - 4R7 R6 22 .1k C2 47mF C2 : Murata GRM 31CR60J476M C4 : Murata GRM 31CR60J475K Figure 10. 350kHz 5V to 2.5V/3A Step-down Converter V D1 3.3V IN BAT-54 C4 4.7mF BST IN C1 0.33 mF L1 OUT 3.3 mH 1.5V/3A Down Converte Fig. 10: 350 kHz5 V to2.5V/3 A Step R4 SW SC4525D SS/EN 33.2k FB COMP C7 22nF C8 47pF RSET R7 3.74k GND R5 60.4k D2 B320A R6 66.5 k C2 47mF C5 6.8nF L1 : Coiltronics DR73 - 3R3 C2 : Murata GRM 31CR60J476 M C4 : Murata GRM 32ER71H475 K Figure 11. 350kHz 3.3V to 1.5V/3A Step-down Converter © 2011 Semtech Corp. www.semtech.com 17 SC4525D Fig.12b: SS Typical Performance Characteristics SS270AREV 6-7to 5V/3A Step-down Converter with 350kHz Switching Frequency) (For 12V Load Characteristic 6 Output Voltage (V) 5 4 12V Input (5V/DIV) 3 2 5V Output (2V/DIV) 1 SS Voltage (1V/DIV) 0 0 0.5 1 1.5 2 2.5 3 3.5 4 Load Current (A) Fig.12d: OCP Figure 12(a). Load Characteristic 5ms/DIV Figure 12(b). VIN Start up Transient (IO=3A) 5V Output Short (5V/DIV) 5V Output Response (1V/DIV, AC Coupling) Inductor Current (1A/DIV) Retry Inductor Current (2A/DIV) SS Voltage (2V/DIV) 40us/DIV Figure 12(c). Load Transient Response (IO= 0.3A to 3A) © 2011 Semtech Corp. 10ms/DIV Figure 12(d). Output Short Circuit (Hiccup) www.semtech.com 18 SC4525D Outline Drawing - SOIC-8 EDP A D e N 2X E/2 E1 E 1 2 ccc C 2X N/2 TIPS e/2 B D aaa C SEATING PLANE A2 A C bxN bbb A1 DIMENSIONS INCHES MILLIMETERS DIM MIN NOM MAX MIN NOM MAX A A1 A2 b c D E1 E e F H h L L1 N 01 aaa bbb ccc .069 .005 .065 .020 .010 .193 .197 .154 .157 .236 BSC .050 BSC .116 .120 .130 .085 .095 .099 .010 .020 .016 .028 .041 (.041) 8 0° 8° .004 .010 .008 .053 .000 .049 .012 .007 .189 .150 C A-B D 1.75 0.13 1.65 0.51 0.25 4.90 5.00 3.90 4.00 6.00 BSC 1.27 BSC 2.95 3.05 3.30 2.15 2.41 2.51 0.25 0.50 0.40 0.72 1.04 (1.05) 8 0° 8° 0.10 0.25 0.20 1.35 0.00 1.25 0.31 0.17 4.80 3.80 h F EXPOSED PAD h H H c GAGE PLANE 0.25 L (L1) SEE DETAIL SIDE VIEW A DETAIL 01 A NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE 3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. REFERENCE JEDEC STD MS -012, VARIATION BA. 4. © 2011 Semtech Corp. -H- www.semtech.com 19 SC4525D Land Pattern - SOIC-8 EDP E SOLDER MASK D DIMENSIONS DIM (C) F G Z Y THERMAL VIA Ø 0.36mm P X C D E F G P X Y Z INCHES (.205) .134 .201 .101 .118 .050 .024 .087 .291 MILLIMETERS (5.20) 3.40 5.10 2.56 3.00 1.27 0.60 2.20 7.40 NOTES: © 2011 Semtech Corp. 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. 2. REFERENCE IPC-SM-782A, RLP NO. 300A. 3. THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD SHALL BE CONNECTED TO A SYSTEM GROUND PLANE. FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR FUNCTIONAL PERFORMANCE OF THE DEVICE. www.semtech.com 20 SC4525D © Semtech 2011 All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. Semtech assumes no responsibility or liability whatsoever for any failure or unexpected operation resulting from misuse, neglect improper installation, repair or improper handling or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified range. SEMTECH PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED OR WARRANTEDTO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF SEMTECH PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE UNDERTAKEN SOLELY AT THE CUSTOMER’S OWN RISK. Should a customer purchase or use Semtech products for any such unauthorized application, the customer shall indemnify and hold Semtech and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs damages and attorney fees which could arise. Contact Information Semtech Corporation Power Mangement Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805) 498-2111 Fax: (805) 498-3804 © 2011 Semtech Corp. www.semtech.com 21