SN54HC594, SN74HC594 8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS040C – DECEMBER 1982 – REVISED FEBRUARY 1998 D D D SN54HC594 . . . J OR W PACKAGE SN74HC594 . . . D, DB, OR N PACKAGE (TOP VIEW) QB QC QD QE QF QG QH GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QA SER RCLR RCLK SRCLK SRCLR QH′ SN54HC594 . . . FK PACKAGE (TOP VIEW) QC QB description The ’HC594 devices contain an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Separate clocks and direct overriding clear (RCLR, SRCLR) inputs are provided on both the shift and storage registers. A serial (QH′) output is provided for cascading purposes. QD QE NC QF QG Both the shift register (RCLK) and storage register (SRCLK) clocks are positive edge triggered. If both clocks are connected together, the shift register is always one count pulse ahead of the storage register. NC – No internal connection 5 17 6 16 7 15 8 14 9 10 11 12 13 GND NC Q H′ 3 2 1 20 19 18 QH 4 SER RCLR NC RCLK SRCLK SRCLR D 8-Bit Serial-In, Parallel-Out Shift Registers With Storage Independent Direct Overriding Clears on Shift and Storage Registers Independent Clocks for Both Shift and Storage Registers High-Current Outputs Can Drive Up to 15 LSTTL Loads Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs NC VCC QA D The parallel (QA–QH) outputs have high-current capability. QH′ is a standard output. The SN54HC594 is characterized for operation over the full military temperature range of –55°C to 125°C. The SN74HC594 is characterized for operation from –40°C to 85°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 1998, Texas Instruments Incorporated UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54HC594, SN74HC594 8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS040C – DECEMBER 1982 – REVISED FEBRUARY 1998 logic symbol† 13 RCLR RCLK 12 10 SRCLR SRCLK SER 11 R3 C2 SRG8 R C1/ 14 1D 2D 3 15 1 2 3 4 5 6 2D 3 7 9 QA QB QC QD QE QF QG QH QH′ † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, DB, J, N, and W packages. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54HC594, SN74HC594 8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS040C – DECEMBER 1982 – REVISED FEBRUARY 1998 logic diagram (positive logic) RCLR RCLK SRCLR SRCLK SER 13 12 10 11 14 1D C1 R R 3R C3 3S 2S 2R C2 R R 3R C3 3S 2S 2R C2 R R 3R C3 3S 2S 2R C2 R R 3R C3 3S 2S 2R C2 R R 3R C3 3S 2S 2R C2 R R 3R C3 3S 2S 2R C2 R R 3R C3 3S 2S 2R C2 R R 3R C3 3S 15 1 2 3 4 5 6 7 9 Pin numbers shown are for the D, DB, J, N, and W packages. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 QA QB QC QD QE QF QG QH QH′ 3 SN54HC594, SN74HC594 8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS040C – DECEMBER 1982 – REVISED FEBRUARY 1998 absolute maximum ratings over operating free-air temperature range† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±70 mA Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace length of zero. recommended operating conditions (see Note 3) SN54HC594 VCC Supply voltage VIH High-level input voltage VCC = 2 V VCC = 4.5 V VCC = 6 V VCC = 2 V VIL Low-level input voltage VI VO Input voltage Output voltage tt Input transition (rise and fall) time SN74HC594 MIN NOM MAX MIN NOM MAX 2 5 6 2 5 6 1.5 1.5 3.15 3.15 4.2 4.2 V V 0 0.5 0 0.5 0 1.35 0 1.35 0 1.8 0 1.8 0 0 0 VCC VCC 0 VCC VCC VCC = 2 V VCC = 4.5 V 0 1000 0 1000 0 500 0 500 VCC = 6 V 0 400 0 400 VCC = 4.5 V VCC = 6 V UNIT V V V ns TA Operating free-air temperature –55 125 –40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54HC594, SN74HC594 8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS040C – DECEMBER 1982 – REVISED FEBRUARY 1998 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = –20 µA VOH VI = VIH or VIL QH′, IOH = –4 mA QA–QH, IOH = –6 mA QH′, IOH = –5.2 mA QA–QH, IOH = –7.8 mA IOL = 20 µA VOL VI = VIH or VIL QH′, IOL = 4 mA QA–QH, IOL = 6 mA QH′, IOL = 5.2 mA QA–QH, IOL = 7.8 mA II IOZ VI = VCC or 0 VO = VCC or 0 ICC VI = VCC or 0, IO = 0 Ci VCC MIN TA = 25°C TYP MAX SN54HC594 MIN MAX SN74HC594 MIN 2V 1.9 1.998 1.9 1.9 4.5 V 4.4 4.499 4.4 4.4 6V 5.9 5.999 5.9 5.9 3.98 4.3 3.7 3.84 3.98 4.3 3.7 3.84 5.48 5.8 5.2 5.34 45V 4.5 6V 5.48 5.8 5.2 MAX UNIT V 5.34 2V 0.002 0.1 0.1 0.1 4.5 V 0.001 0.1 0.1 0.1 6V 0.001 0.1 0.1 0.1 0.17 0.26 0.4 0.33 0.17 0.26 0.4 0.33 0.15 0.26 0.4 0.33 0.15 0.26 0.4 0.33 6V ±0.1 ±100 ±1000 ±1000 nA 6V ±0.01 ±0.5 ±10 ±5 µA 8 160 80 µA 10 10 10 pF 45V 4.5 6V 6V 2V to 6 V 3 V PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN54HC594, SN74HC594 8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS040C – DECEMBER 1982 – REVISED FEBRUARY 1998 timing requirements over recommended operating free-air temperature range (unless otherwise noted) fclock Clock frequency SRCLK or RCLK high or low tw Pulse duration SRCLR or RCLR low SER before SRCLK↑ ↑ SRCLK↑ ↑ before RCLK↑ ↑† tsu Setup time SRCLR low before RCLK↑ ↑ SRCLR high (inactive) before SRCLK↑ ↑ RCLR high (inactive) before SRCLK↑ ↑ th Hold time, SER after SRCLK↑ ↑ VCC TA = 25°C MIN MAX SN54HC594 2V 5 3.3 4 4.5 V 25 17 20 6V 29 20 24 MIN MAX SN74HC594 MIN 2V 100 150 125 4.5 V 20 30 25 6V 17 25 21 2V 100 150 125 4.5 V 20 30 25 6V 17 25 21 2V 90 135 110 4.5 V 18 27 22 6V 15 23 19 2V 90 135 110 4.5 V 18 27 22 6V 15 23 19 2V 50 75 63 4.5 V 10 15 13 6V 9 13 11 2V 20 20 20 4.5 V 10 10 10 6V 10 10 10 2V 5 5 5 4.5 V 5 5 5 6V 5 5 5 2V 5 5 5 4.5 V 5 5 5 6V 5 5 5 MAX UNIT MHz ns ns ns † This setup time ensures the output register sees stable data from the shift-register outputs. The clocks may be tied together, in which case the output register is one clock pulse behind the shift register. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54HC594, SN74HC594 8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS040C – DECEMBER 1982 – REVISED FEBRUARY 1998 switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) fmax SRCLK QH′ tpd d RCLK QA–QH SRCLR QH′ tPHL RCLR QA–QH QH′ tt QA–QH VCC MIN TA = 25°C TYP MAX SN54HC594 MIN MAX SN74HC594 MIN 2V 5 8 3.3 4 4.5 V 25 35 17 20 6V 29 40 20 24 MAX UNIT MHz 2V 50 150 225 185 4.5 V 20 30 45 37 6V 15 25 38 31 2V 50 150 225 185 4.5 V 20 30 45 37 6V 15 25 38 31 2V 50 150 225 185 4.5 V 20 30 45 37 6V 15 25 38 31 2V 50 125 185 155 4.5 V 20 25 37 31 6V 15 21 31 26 2V 38 75 110 95 4.5 V 8 15 22 19 6V 6 13 19 16 2V 38 60 90 75 4.5 V 8 12 18 15 6V 6 10 15 13 ns ns ns switching characteristics over recommended operating free-air temperature range, CL = 150 pF (unless otherwise noted) (see Figure 1) PARAMETER tpd FROM (INPUT) TO (OUTPUT) RCLK tPHL QA–QH RCLR QA–QH tt QA–QH VCC MIN TA = 25°C TYP MAX SN54HC594 MIN MAX SN74HC594 MIN MAX 2V 90 200 300 250 4.5 V 23 40 60 50 6V 19 34 51 43 2V 90 200 300 250 4.5 V 23 40 60 50 6V 19 34 51 43 2V 45 210 315 265 4.5 V 17 42 63 53 6V 13 36 53 45 UNIT ns ns ns operating characteristics, TA = 25°C PARAMETER Cpd Power dissipation capacitance TEST CONDITIONS TYP UNIT No load 395 pF PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 SN54HC594, SN74HC594 8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS040C – DECEMBER 1982 – REVISED FEBRUARY 1998 PARAMETER MEASUREMENT INFORMATION From Output Under Test VCC High-Level Pulse Test Point 50% 50% 0V tw CL (see Note A) VCC Low-Level Pulse 50% 50% 0V LOAD CIRCUIT VOLTAGE WAVEFORMS PULSE DURATIONS Input VCC 50% 50% 0V tPLH Reference Input VCC 50% In-Phase Output 0V tsu Data Input 50% 10% 90% tr tPHL VCC 50% 10% 0 V 90% 90% tr th 90% 50% 10% tPHL Out-of-Phase Output 90% VOLTAGE WAVEFORMS SETUP AND HOLD AND INPUT RISE AND FALL TIMES tPLH 50% 10% tf tf VOH 50% 10% VOL tf 50% 10% 90% VOH VOL tr VOLTAGE WAVEFORMS PROPAGATION DELAY AND OUTPUT TRANSITION TIMES NOTES: A. CL includes probe and test-fixture capacitance. B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns. C. For clock inputs, fmax is measured when the input duty cycle is 50%. D. The outputs are measured one at a time with one input transition per measurement. E. tPLH and tPHL are the same as tpd. F. tf and tr are the same as tt. Figure 1. Load Circuit and Voltage Waveforms 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current. TI warrants performance of its semiconductor products and related software to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage (“Critical Applications”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. Inclusion of TI products in such applications is understood to be fully at the risk of the customer. Use of TI products in such applications requires the written approval of an appropriate TI officer. Questions concerning potential risk applications should be directed to TI through a local SC sales office. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards should be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor does TI warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. Copyright 1998, Texas Instruments Incorporated