SN75C1167, SN75C1168 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS SLLS159C – MARCH 1993 – REVISED APRIL 1998 D D D D D D D D D D D SN75C1167 . . . N OR NS† PACKAGE (TOP VIEW) Meet or Exceed Standards TIA/EIA-422-B and ITU Recommendation V.11 BiCMOS Process Technology Low Supply-Current Requirements: 9 mA Max Low Pulse Skew Receiver Input Impedance . . . 17 kΩ Typ Receiver Input Sensitivity . . . ± 200 mV Receiver Common-Mode Input Voltage Range of – 7 V to 7 V Operate From Single 5-V Power Supply Glitch-Free Power-Up/Power-Down Protection Receiver 3-State Outputs Active-Low Enable for SN75C1167 Only Improved Replacements for the MC34050 and MC34051 1B 1A 1R RE 2R 2A 2B GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 1D 1Y 1Z DE 2Z 2Y 2D SN75C1168 . . . N OR NS† PACKAGE (TOP VIEW) 1B 1A 1R 1DE 2R 2A 2B GND description The SN75C1167 and SN75C1168 dual drivers and receivers are monolithic integrated circuits designed for balanced transmission lines. The devices meet TIA/EIA-422-B and ITU recommendation V.11. 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 1D 1Y 1Z 2DE 2Z 2Y 2D † The NS package is only available left-ended taped and reeled (order device SNx5C116xNSLE). The SN75C1167 combines dual 3-state differential line drivers and 3-state differential line receivers, both of which operate from a single 5-V power supply. The driver and receiver have active-high and active-low enables, respectively, which can be connected externally together to function as direction control. The SN75C1168 drivers have individual active-high enables. The SN75C1167 and SN75C1168 are characterized for operation from 0°C to 70°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 1998, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443 • 1 SN75C1167, SN75C1168 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS SLLS159C – MARCH 1993 – REVISED APRIL 1998 Function Tables EACH DRIVER OUTPUTS INPUT D ENABLE DE H H H L L H L H X L Z Z Y Z SN75C1167, EACH RECEIVER DIFFERENTIAL INPUTS A–B ENABLE RE OUTPUT R VID ≥ 0.2 V –0.2 V < VID < 0.2 V L H L ? VID ≤ –0.2 V X L L H Z Open L H H = high level, L = low level, ? = indeterminate, X = irrelevant, Z = high impedance (off) logic symbol† logic diagram (positive logic) SN75C1167 SN75C1167 DE RE 1D 12 4 DE EN1 EN2 15 4 1 1 1R 2D 3 2 1 2R 5 14 13 2 1 1 9 12 2 10 11 6 7 RE 1Y 1Z 1D 14 15 13 1A 2 3 1B 1 1R 2Y 2Z 10 9 11 2D 2A 2B 6 5 7 2R SN75C1168 1DE 1D 1R 2DE 2D 2R 4 15 EN 9 5 1 EN 1Y 1DE 15 1A 1D 1B 3 2Y 1R 2Z 2DE 2A 2D 2B † These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 2 14 13 2 1 12 6 7 1A 1B 2Y 2Z 2A 2B 4 1Z 10 11 1Z SN75C1168 13 2 3 12 14 1Y 2R • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443 • 9 5 10 11 6 7 1Y 1Z 1A 1B 2Y 2Z 2A 2B SN75C1167, SN75C1168 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS SLLS159C – MARCH 1993 – REVISED APRIL 1998 schematics of inputs EQUIVALENT OF DRIVER ENABLE INPUT EQUIVALENT OF A OR B INPUT VCC VCC 17 kΩ NOM Input 1.7 kΩ NOM Input 288 kΩ NOM 1.7 kΩ NOM VCC (A) or GND (B) GND GND schematics of outputs TYPICAL OF EACH DRIVER OUTPUT TYPICAL OF EACH RECEIVER OUTPUT VCC VCC Output Output GND GND • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443 • 3 SN75C1167, SN75C1168 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS SLLS159C – MARCH 1993 – REVISED APRIL 1998 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V Input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC + 0.5 V Input voltage range, VI (A or B, Receiver) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 11 V to 14 V Differential input voltage range, VID, Receiver (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 14 V to 14 V Output voltage range, VO, Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 5 V to 7 V Clamp current range, IIK or IOK, Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA Output current range, IO, Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 150 mA Supply current, ICC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mA GND current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 200 mA Output current range, IO, Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 25 mA Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values except differential input voltage are with respect to the network GND. 2. Differential input voltage is measured at the noninverting terminal with respect to the inverting terminal. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C POWER RATING OPERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING N 1250 mW 10 mW/°C 800 mW 650 mW NS 625 mW 5 mW/°C 400 mW 325 mW recommended operating conditions Supply voltage, VCC Common-mode input voltage, VIC (see Note 3) Receiver Differential input voltage, VID Receiver High-level input voltage, VIH Except A, B Low-level input voltage, VIL Except A, B High level output current, High-level current IOH Low level output current, Low-level current IOL NOM MAX 4.5 5 5.5 V ±7 V ±7 V 2 Receiver –6 Driver – 20 Receiver 6 Driver 20 0 NOTE 3: Refer to TIA/EIA-422-B for exact conditions. • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443 • UNIT V 0.8 Operating free-air temperature, TA 4 MIN 70 V mA mA °C SN75C1167, SN75C1168 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS SLLS159C – MARCH 1993 – REVISED APRIL 1998 DRIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER VIK VOH Input clamp voltage VOL |VOD1| Low-level output voltage |VOD2| Differential output voltage ∆|VOD| Change in magnitude of differential output voltage TEST CONDITIONS II = – 18 mA VIH = 2 V, High-level output voltage VIH = 2 V, IO = 0 mA Differential output voltage VIL = 0.8 V, VIL = 0.8 V, IOH = – 20 mA IOL = 20 mA MIN 2.4 VOC Common-mode output voltage ∆|VOC| Change in magnitude of common-mode output voltage IO(OFF) Output current with power off (see Note 3) VCC = 0 V IOZ High impedance state output current High-impedance-state VO = 2.5 V VO = 5 V IIH IIL High-level input current IOS 2 Short-circuit output current ICC Supply current (total package) UNIT – 1.5 V V 0.4 V 6 V 3.1 See Figure 1 and Note 3 VO = 6 V VO = – 0.25 V V ± 0.4 V ±3 V ± 0.4 V 100 µA – 100 µA 20 – 20 VI = VCC or VIH VI = GND or VIL Low-level input current MAX 3.4 0.2 2 Ω RL = 100 Ω, TYP† 1 VO = VCC or GND, See Note 4 V = V or GND No load,, I CC Enabled VI = 2.4 or 0.5 V, See Note 5 – 30 µA µA –1 µA – 150 mA 4 6 5 9 mA Ci Input capacitance 6 pF † All typical values are at VCC = 5 V and TA = 25°C. NOTES: 3. Refer to TIA/EIA-422-B for exact conditions. 4. Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. 5. This parameter is measured per input, while the other inputs are at VCC or GND. switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS tPHL tPLH Propagation delay time, high- to low-level output tsk(p) Pulse skew tr Rise time tf Fall time tPZH Output enable time to high level tPZL Output enable time to low level tPHZ Output disable time from low level Propagation delay time, low- to high-level output tPLZ Output disable time from high level † All typical values are at VCC = 5 V and TA = 25°C. R1 = R2 = 50 Ω, C1 = C2 = C3 = 40 pF, S Figure See Fi 2 R3 = 500 Ω, S1 is open, R1 = R2 = 50 Ω, C1 = C2 = C3 = 40 pF pF, See Figure 3 R3 = 500 Ω, S1 is open open, R1 = R2 = 50 Ω, C1 = C2 = C3 = 40 pF pF, See Figure 4 R3 = 500 Ω, S1 is closed closed, R1 = R2 = 50 Ω, C1 = C2 = C3 = 40 pF F, See Figure 4 R3 = 500 Ω, S1 is closed closed, • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443 • MIN TYP† MAX 7 12 ns UNIT 7 12 ns 0.5 4 ns 5 10 ns 5 10 ns 10 19 ns 10 19 ns 7 16 ns 7 16 ns 5 SN75C1167, SN75C1168 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS SLLS159C – MARCH 1993 – REVISED APRIL 1998 RECEIVER SECTION electrical characteristics over recommended ranges of common-mode input voltage, supply voltage, and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS VIT+ Positive-going input threshold voltage, differential input VIT– Negative-going input threshold voltage, differential input TYP† MAX 0.2 – 0.2‡ Vhys VIK Input hysteresis (VIT+ – VIT –) VOH VOL High-level output voltage II = – 18 mA VID = 200 mV, Low-level output voltage VID = – 200 mV, Input clamp voltage, RE MIN IOZ High-impedance-state output current II Line input current II ri Enable input current, RE Input resistance VI = VCC or GND VIC = – 7 V to 7 V, ICC Supply current (total package) No load, Enabled SN75C1167 SN75C1167 3.8 VO = VCC or GND Other input at 0 V mV – 1.5 IOH = – 6 mA IOL = 6 mA 4.2 V 0.3 V ± 0.5 ±5 µA 1.5 – 2.5 ±1 4 VI = VCC or GND VIH = 2.4 V or 0.5 V, See Note 5 V 0.1 VI = 10 V VI = – 10 V Other input at 0 V V V 60 SN75C1167 UNIT 17 mA µA kΩ 4 6 5 9 mA † All typical values are at VCC = 5 V and TA = 25°C. ‡ The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this data sheet for common-mode input voltage and threshold voltage levels only. switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 6) PARAMETER TEST CONDITIONS TYP† MAX 9 17 27 ns 9 17 27 ns 4 9 ns 4 9 ns UNIT tPLH tPHL Propagation delay time, low- to high-level output tTLH tTHL Transition time, low- to high-level output tPZH tPZL Output enable time to high level 13 22 ns Output enable time to low level 13 22 ns tPHZ tPLZ Output disable time from high level 13 22 ns 13 22 ns See Figure 5 Propagation delay time, high- to low-level output VIC = 0 V V, Transition time, high- to low-level output RL = 1 kW, kW See Figure 5 See Figure 6 Output disable time from low level † All typical values are at VCC = 5 V and TA = 25°C. NOTE 6: Measured per input while the other inputs are at VCC or GND 6 MIN • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443 • SN75C1167, SN75C1168 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS SLLS159C – MARCH 1993 – REVISED APRIL 1998 PARAMETER MEASUREMENT INFORMATION RL 2 VOD2 RL 2 VOC Figure 1. Driver Test Circuit, VOD and VOC A (see Note B) tPLH Y VOH R3 50% 1.3 V Y 1.5 V C1 S1 tsk(p) R2 C3 0V tPHL R1 C2 Input 3V 1.3 V 1.3 V 50% 1.3 V VOL tsk(p) VOH Z 50% 1.3 V Z See Note A tPHL 50% 1.3 V VOL tPLH VOLTAGE WAVEFORMS TEST CIRCUIT NOTES: A. C1, C2, and C3 include probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle = 50%, tr = tf ≤ 6 ns. Figure 2. Driver Test Circuit and Voltage Waveforms C2 Input C1 R1 0V R3 VOD 1.5 V S1 Differential Output R2 C3 3V Input (see Note B) 90% 90% 10% 10% tr See Note A tf VOLTAGE WAVEFORMS TEST CIRCUIT NOTES: A. C1, C2, and C3 include probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle = 50%, tr = tf ≤ 6 ns. Figure 3. Driver Test Circuit and Voltage Waveforms • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443 • 7 SN75C1167, SN75C1168 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS SLLS159C – MARCH 1993 – REVISED APRIL 1998 PARAMETER MEASUREMENT INFORMATION 3V Input DE 1.3 V C2 0V or 3V See Note B 0V tPZL 1.5 V Output S1 1.5 V VOL + 0.3 V R2 0.8 V VOL tPHZ DE 50 Ω 1.5 V tPLZ C1 C3 Pulse Generator R1 R3 tPZH VOH See Note A VOL – 0.3 V Output 2V 1.5 V VOLTAGE WAVEFORMS TEST CIRCUIT NOTES: A. C1, C2, and C3 include probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle = 50%, tr = tf ≤ 6 ns. Figure 4. Driver Test Circuit and Voltage Waveforms VCC S1 tTLH Output (see Note B) A Input B Input RL Device Under Test tTHL 90% 50% 10% 50% tPLH CL = 50 pF (see Note A) VOLTAGE WAVEFORMS Figure 5. Receiver Test Circuit and Voltage Waveforms • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443 • VOL 2.5 V 0V – 2.5 V NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tr = tf ≤ 6 ns. 8 VOH tPHL B Input A Input = 0 V TEST CIRCUIT 90% 10% SN75C1167, SN75C1168 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS SLLS159C – MARCH 1993 – REVISED APRIL 1998 PARAMETER MEASUREMENT INFORMATION 3V RE Input VCC 1.3 V 1.3 V 0V S1 0.5 V tPLZ VCC Output RE Input VID = – 2.5 V or 2.5 V 50% VOL RL Device Under Test tPZL tPHZ tPZH VOH CL = 50 pF (see Note A) 50% Output GND 0.5 V tPZL, tPLZ Measurement: S1 to VCC tPZH, tPHZ Measurement: S1 to GND VOLTAGE WAVEFORMS TEST CIRCUIT NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tr = tf ≤ 6 ns. Figure 6. Receiver Test Circuit and Voltage Waveforms • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443 • 9 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. 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