STL27N15 N-CHANNEL 150V - 0.045 Ω - 27A PowerFLAT™ LOW GATE CHARGE STripFET™ MOSFET TARGET DATA TYPE STL15N15 ■ ■ ■ ■ ■ VDSS RDS(on) ID 150 V <0.060 Ω 27 A(1) TYPICAL RDS(on) = 0.045 Ω IMPROVED DIE-TO-FOOTPRINT RATIO VERY LOW PROFILE PACKAGE (1mm MAX) VERY LOW THERMAL RESISTANCE VERY LOW GATE CHARGE PowerFLAT™(6x5) DESCRIPTION This MOSFET series realized with STMicroelectronics unique "STripFET™" process has specifically been designed to minimize input capacitance and gate charge. It’s therefore suitable as primary switch in advanced high efficiency, high frequency isolated DC-DC converter for telecom an computer application. The new PowerFLAT™ package allows e significant reduction in a board space without compromising performance. INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ HIGH-EFFICIENCY ISOLATED DC-DC CONVERTERS ■ TELECOM AND BATTERY CHARGER ADAPTOR ■ SYNCHRONOUS RECTIFICATION Ordering Information SALES TYPE STL27N15 MARKING L27N15 PACKAGE PowerFLAT PACKAGING TAPE & REEL ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID ID IDM(3) Ptot(2) Ptot(1) dv/dt (5) Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Gate- source Voltage Drain Current (continuous) at TC = 25°C (Steady State) Drain Current (continuous) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C (Steady State) Total Dissipation at TC = 25°C Derating Factor Peak Diode Recovery voltage slope Storage Temperature Operating Junction Temperature Value 150 150 ± 20 6 4 24 4 80 0.03 TBD Unit V V V A A A W W W/°C V/ns -55 to 150 °C June 2003 This is preliminary information on a new product forseen to be developped. Details are subject to change without notice 1/6 STL27N15 THERMAL DATA Rthj-F Rthj-pcb(2) Thermal Resistance Junction-Foot (Drain) Thermal Operating Junction-pcb 1.56 31.2 °C/W °C/W . ELECTRICAL CHARACTERISTICS (Tcase = 25 °C unless otherwise specified) OFF Symbol Parameter Test Conditions Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating VDS = Max Rating TC = 125°C IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 20 V V(BR)DSS Min. Typ. Max. 100 Unit V 1 10 µA µA ±100 nA Max. Unit ON (6) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS RDS(on) Static Drain-source On Resistance VGS = 10 V ID = 250 µA Min. Typ. 1 ID = 3 A V 0.045 0.060 Ω Typ. Max. Unit DYNAMIC Symbol 2/6 Parameter Test Conditions gfs (6) Forward Transconductance VDS = 50 V Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25V, f = 1 MHz, VGS = 0 ID = 5 A Min. TBD S TBD TBD TBD pF pF pF STL27N15 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time ID = 3 A VDD = 50 V RG = 4.7 Ω VGS = 10 V (Resistive Load, Figure 3) TBD TBD Qg Qgs Qgd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD= 50V ID= 6A VGS=10V TBD TBD TBD 28 nC nC nC Typ. Max. Unit ns ns SWITCHING OFF Symbol td(off) tf Parameter Turn-off Delay Time Fall Time Test Conditions Min. ID = 3 A VDD = 50 V RG = 4.7Ω, VGS = 10 V (Resistive Load, Figure 3) TBD TBD ns ns SOURCE DRAIN DIODE Symbol Parameter ISD ISDM(3) Source-drain Current Source-drain Current (pulsed) VSD (6) Forward On Voltage ISD = 3 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current di/dt = 100A/µs ISD =6 A VDD = 30 V j = 150°C (see test circuit, Figure 5) trr Qrr IRRM Test Conditions Min. Typ. VGS = 0 TBD TBD TBD Max. Unit 6 24 A A 1.2 V ns nC A (1) The value is rated according Rthj-F. (2) When Mounted on FR-4 board of 1 inch², 2oz Cu (3) Pulse width limited by safe operating area. (5) ISD ≤6A, di/dt ≤300A/µs, VDD ≤ V(BR)DSS, Tj ≤ T JMAX . (6) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 3/6 STL27N15 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 4/6 STL27N15 5/6 STL27N15 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics 2003 STMicroelectronics - All Rights Reserved All other names are the property of their respective owners. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com 6/6