INFINEON BGA619

Application Note No. 081
Discrete Semiconductors
The BGA619 Silicon-Germanium High IP3 Low Noise
Amplifier in PCS Receiver Applications
Features
• Easy-to-use LNA MMIC in 70 GHz ft SiGe technology
• Tiny „Green“ P-TSLP-7-1 package (no Lead or Halogen
compounds)
• Low external component count
• Integrated output DC blocking capacitor, integrated RF
choke on internal bias network
• Three gain steps
• Power off function
• High IP3 in all modes
6
5
4
7
1
2
3
P-TSLP-7-1
Applications
• Low Noise Amplifier for 1900 MHz PCS wireless frontends (CDMA 2000).
Introduction
The BGA619 is an easy-to-use, low-cost Low Noise Amplifier (LNA) MMIC designed
for use in today’s PCS systems which require excellent linearity in each of several gain
step modes. Based on Infineon’s cost-effective 70 GHz fT Silicon-Germanium (SiGe)
B7HF bipolar process technology, the BGA619 offers a 1.5 dB noise figure and 14.9 dB
of gain at 1.96 GHz with a current consumption of 6.5 mA in high gain mode. BGA619
offers impressive IIP3 performance of 7 dBm in High Gain mode, particularly for a threegain step, low-cost, integrated MMIC.
The new LNA incorporates a 50 Ω pre-matched output with an integrated output DC
blocking capacitor. The input is pre-matched, requiring an external DC blocking
capacitor. An integrated, on-chip inductor eliminates the need for an external RF choke
on the voltage supply pin. The operating mode of the device is determined by the voltage
at the GS-pin. An integrated on/off feature provides for low power consumption and
increased stand by time for PCS cellular handsets.
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paddle
connected to
GND
1
CURADJ
GSTEP
6
AO
5
VCC
4
HG
2
AI
MG
LG
3
DEG
Bias/Gain Select
Figure 1
BGA619’s Equivalent Circuit.
Figure 2
Pin Connections
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Overview
The BGA619 has three gain steps and one off-mode which are used in PCS-band
applications:
•
•
•
•
High Gain Mode
Mid Gain Mode
Low Gain Mode
OFF Mode
Mode selection is performed by applying a voltage to pin 6 (GSTEP) as described in
Table 1. The source that generates these mode-select voltages should be able to source
or sink current. Please refer to the BGA619 datasheet for the maximum values of mode
control current.
Table 1
Gain Mode
High Gain
Switching Modes for Gain Steps
Gain Step Input Voltage
[V]
Current into
GS-pin [µA]
Min
Max
typ
2.2
2.4
65
Mid Gain
1.6
1.8
40
Low Gain
0.9
1.1
8
OFF
0.0
0.3
-35
The next table shows the measured performance of each of these gain modes. All
measurement values presented in this application note include losses of both PCB and
connectors - in other words, the reference planes used for measurements are the PCB’s
RF SMA connectors. Noise figure and gain results shown here would improve by 0.2 0.3 dB compared to the values shown if PCB losses were extracted.
All measurements are performed at 1960 MHz and at a typical supply voltage of 2.78 V.
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Table 2
Performance Overview
Parameter
High Gain
Mode
Mid Gain
Mode
Low Gain
Mode
Supply voltage
2.78 V
2.78 V
2.78 V
Supply current
6.5 mA
4.5 mA
2.9 mA
Gain
14.9 dB
2.2 dB
-9.5 dB
Noise Figure
1.5 dB
8 dB
16 dB
Input return loss
10.5 dB
8.5 dB
12.5 dB
Output return loss
11.5 dB
13 dB
13 dB
Reverse Isolation
25 dB
21 dB
rd
1)
Input 3 order intercept point
7 dBm
1)
-30 dBm per tone, f1=1950 MHz, ∆f = 1 MHz
2)
-27 dBm per tone, f1=1950 MHz, ∆f = 1 MHz
3)
-15 dBm per tone, f1=1950 MHz, ∆f = 1 MHz
23 dB
2)
15 dBm3)
6.5 dBm
Board Configuration
The circuit in Figure 3 shows the board configuration for BGA619 LNA. The Bill of
materials for the application board can be found in Table 3.
Figure 3
PCB board configuration
N1
Curadj, 1
GSTEP, 6
R1
C4
C5
C3
C2
AI, 2
RFin
AO, 5
RFout
L1
C1
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GS
L2
DEG, 3
Vcc, 4
GND, 7
C6
4
Vcc
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Discrete Semiconductors
Table 3
Bill of materilal
Name Value
Package
Manufacturer Function
R1
15 kΩ
0402
various
bias resistance; set device
current
L1
3.3 nH
0402
various
LF trap & input matching; L1
and C1 provide low-frequency
trap to increase input IP3
L2
4.7 nH
0402
various
output matching
C1
10 nF
0402
various
LF trap for IP3 enhancement
C2
10 pF
0402
various
output DC block; optional
because DC block is integrated
C3
10 pF
0402
various
input DC block
C4
10p
0402
various
control voltage filtering OPTIONAL, depends on actual
user implementation
C5
1 nF
0402
various
control voltage filtering OPTIONAL, depends on actual
user implementation
C6
1 nF
0402
various
supply filtering, depends on
actual user implementation
0402
various
supply filtering OPTIONAL, depends on actual
user implementation
P-TSLP-7-1
Infineon
SiGe LNA with gain-steps
C7
N1
BGA619
The application board is made of 3 layer FR4 material (see Figure 4). The top view can
be seen in Figure 5 and the bottom view in Figure 6. Pictures of the board can be found
in Figure 7 (complete board) and Figure 8 (close-in photograph, where BGA619 and
surrounding elements can be found in detail).
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Figure 4
Application board; board construction
Figure 5
Application board; top view
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Figure 6
Application board; bottom view
Figure 7
Foto of Application board
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Figure 8
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Scanned image of PCB, Close-In shot
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Discrete Semiconductors
The power supply connector
Figure 9 shows the pinning of the power supply connector needed for powering the test
board.
Figure 9
Power Supply Connector
For measurment graphs please refer to the next pages.
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Figure 10
Noise Figure High Gain Mode
Noise Figure NF = f(f)
V = 2.78V, I = 6.5mA
CC
CC
1.8
1.7
NF [dB]
1.6
1.5
1.4
1.3
1.2
1.8
1.85
1.9
1.95
2
2.05
2.1
Frequency [GHz]
Figure 11
Gain High Gain Mode
Power Gain |S21| = f(f)
V = 2.78V, I = 6.5mA
CC
CC
15.2
15.1
Power Gain [dB]
15
14.9
14.8
14.7
14.6
14.5
1.8
1.85
1.9
1.95
2
2.05
2.1
Frequency [GHz]
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Figure 12
Return Loss High Gain Mode
Matching |S11|, |S22| = f(f)
V = 2.78V, I = 6.5mA
CC
CC
−4
−6
|S11|, |S22| [dB]
−8
−10
S
11
−12
S22
−14
−16
−18
−20
1.8
1.85
1.9
1.95
2
2.05
2.1
2
2.05
2.1
Frequency [GHz]
Figure 13
Reverse Isolation High Gain Mode
Reverse Isolation |S12| = f(f)
V = 2.78V, I = 6.5mA
CC
CC
−20
−21
−22
12
|S | [dB]
−23
−24
−25
−26
−27
−28
−29
−30
1.8
1.85
1.9
1.95
Frequency [GHz]
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Figure 14
Noise Figure Mid Gain Mode
Noise Figure NF = f(f)
V = 2.78V, I = 4.5mA
CC
CC
8.4
8.3
8.2
NF [dB]
8.1
8
7.9
7.8
7.7
7.6
1.8
1.85
1.9
1.95
2
2.05
2.1
Frequency [GHz]
Figure 15
Gain Mid Gain Mode
Power Gain |S21| = f(f)
V = 2.78V, I = 4.5mA
CC
CC
2.6
2.5
2.4
Power Gain [dB]
2.3
2.2
2.1
2
1.9
1.8
1.7
1.6
1.8
1.85
1.9
1.95
2
2.05
2.1
Frequency [GHz]
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Figure 16
Return Loss Mid Gain Mode
Matching |S11|, |S22| = f(f)
V = 2.78V, I = 4.5mA
CC
CC
−4
−6
−8
S
11
−12
11
22
|S |, |S | [dB]
−10
S
22
−14
−16
−18
−20
1.8
1.85
1.9
1.95
2
2.05
2.1
2
2.05
2.1
Frequency [GHz]
Figure 17
Reverse Isolation Mid Gain Mode
Reverse Isolation |S12| = f(f)
V = 2.78V, I = 4.5mA
CC
CC
−15
−16
−17
12
|S | [dB]
−18
−19
−20
−21
−22
−23
−24
−25
1.8
1.85
1.9
1.95
Frequency [GHz]
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Figure 18
Noise Figure Low Gain Mode
Noise Figure NF = f(f)
V = 2.78V, I = 2.9mA
CC
CC
17
16.8
16.6
16.4
NF [dB]
16.2
16
15.8
15.6
15.4
15.2
15
1.8
1.85
1.9
1.95
2
2.05
2.1
2
2.05
2.1
Frequency [GHz]
Figure 19
Gain Low Gain Mode
Power Gain |S | = f(f)
21
V = 2.78V, I = 2.9mA
CC
CC
−8
Power Gain [dB]
−8.5
−9
−9.5
−10
−10.5
−11
1.8
1.85
1.9
1.95
Frequency [GHz]
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Figure 20
Return Loss Low Gain Mode
Matching |S11|, |S22| = f(f)
V = 2.78V, I = 2.9mA
CC
CC
−4
−6
−10
S
11
−12
11
22
|S |, |S | [dB]
−8
−14
S
22
−16
−18
−20
1.8
1.85
1.9
1.95
2
2.05
2.1
Frequency [GHz]
Figure 21
Reverse Isolation Low Gain Mode
Reverse Isolation |S12| = f(f)
V = 2.78V, I = 2.9mA
CC
CC
−15
−16
−17
|S12| [dB]
−18
−19
−20
−21
−22
−23
−24
−25
1.8
1.85
1.9
1.95
2
2.05
2.1
Frequency [GHz]
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Revision History:
2004-04-19
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Technologies Offices in Germany or the Infineon Technologies Companies and
Representatives worldwide: see our webpage at http://www.infineon.com
Edition 2004-04-19
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81541 München
© Infineon Technologies AG 1999.
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as warranted characteristics.
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circuits, descriptions and charts stated herein.
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