ETC STP6NC80FP

STP6NC80Z - STP6NC80ZFP
STB6NC80Z-1
N-CHANNEL 800V - 1.8Ω - 5.1A TO-220/TO-220FP/I PAK
Zener-Protected PowerMESH III MOSFET
PRELIMINARY DATA
TYPE
VDSS
RDS(on)
ID
STP6NC80Z/FP
800V
< 2Ω
5.1 A
STB6NC80Z-1
800V
< 2Ω
5.1 A
n TYPICAL RDS(on) = 1.8 Ω
■ EXTREMELY HIGH dv/dt AND CAPABILITY
GATE-TO- SOURCE ZENER DIODES
■ 100% AVALANCHE TESTED
■ VERY LOW GATE INPUT RESISTANCE
■ GATE CHARGE MINIMIZED
3
2
1
TO-220
TO-220FP
1
2
3
I PAK
(Tabless TO-220)
DESCRIPTION
The third generation of MESH OVERLAY Power
MOSFETs for very high voltage exhibits unsurpassed
on-resistance per unit area while integrating back-toback Zener diodes between gate and source. Such arrangement gives extra ESD capability with higher ruggedness performance as requested by a large variety
of single-switch applications.
APPLICATIONS
■ SINGLE-ENDED SMPS IN MONITORS,
COMPUTER AND INDUSTRIAL APPLICATION
■ WELDING EQUIPMENT
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
STP(B)6NC80Z(-1)
VDS
VDGR
VGS
Unit
STP6NC80ZFP
Drain-source Voltage (VGS = 0)
800
V
Drain-gate Voltage (RGS = 20 kΩ)
800
V
Gate- source Voltage
± 25
V
ID
Drain Current (continuos) at TC = 25°C
5.1
5.1(*)
A
ID
Drain Current (continuos) at TC = 100°C
3.2
3.2(*)
A
Drain Current (pulsed)
20
20(*)
A
Total Dissipation at TC = 25°C
125
40
W
0.32
W/°C
I DM
(1)
PTOT
Derating Factor
1
±50
mA
Gate source ESD(HBM-C=100pF, R=15KΩ)
3
KV
dv/dt
Peak Diode Recovery voltage slope
3
V/ns
VISO
Insulation Winthstand Voltage (DC)
Tstg
Storage Temperature
IGS
VESD(G-S)
Tj
Gate-source Current
Max. Operating Junction Temperature
(•)Pulse width limited by safe operating area
April 2000
--
2000
V
–65 to 150
°C
150
°C
(1)ISD ≤5.1A, di/dt ≤100A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
(2).Limited only by maximum temperature allowed
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
1/8
STP6NC80Z/FP/STP6NC80Z-1
THERMAL DATA
TO-220 / I PAK
TO-220FP
1
3.13
°C/W
Rthj-case
Thermal Resistance Junction-case Max
Rthj-amb
Thermal Resistance Junction-ambient Max
30
°C/W
Rthc-sink
Thermal Resistance Case-sink Typ
0.1
°C/W
Maximum Lead Temperature For Soldering Purpose
300
°C
Tl
AVALANCHE CHARACTERISTICS
Symbol
Parameter
Max Value
Unit
IAR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max)
5.1
A
EAS
Single Pulse Avalanche Energy
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)
250
mJ
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
Symbol
V(BR)DSS
∆BVDSS/∆TJ
Parameter
Test Conditions
Drain-source
Breakdown Voltage
ID = 250 µA, VGS = 0
Breakdown Voltage Temp.
Coefficient
ID = 1 mA, VGS = 0
Min.
Typ.
Max.
800
Unit
V
0.9
V/°C
IDSS
Zero Gate Voltage
Drain Current (V GS = 0)
VDS = Max Rating
1
µA
VDS = Max Rating, TC = 125 °C
50
µA
IGSS
Gate-body Leakage
Current (VDS = 0)
VGS = ±20V
±10
µA
Typ.
Max.
Unit
4
5
V
1.8
2
Ω
ON (1)
Symbol
VGS(th)
Parameter
Test Conditions
Gate Threshold Voltage
VDS = VGS, ID = 250µA
R DS(on)
Static Drain-source On
Resistance
VGS = 10V, ID = 2.9 A
ID(on)
On State Drain Current
VDS > ID(on) x RDS(on)max,
VGS = 10V
Min.
3
5.1
A
DYNAMIC
Symbol
gfs (1)
2/8
Parameter
Forward Transconductance
C iss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer
Capacitance
Test Conditions
VDS > ID(on) x RDS(on)max,
ID = 2.9A
VDS = 25V, f = 1 MHz, VGS = 0
Min.
Typ.
Max.
Unit
8
S
1600
pF
124
pF
11
pF
STP6NC80Z/FP/STP6NC80Z-1
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
Symbol
td(on)
tr
Parameter
Turn-on Delay Time
Rise Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Q gd
Gate-Drain Charge
Test Conditions
Min.
VDD = 400 V, ID = 2.9 A
RG = 4.7Ω VGS = 10V
(see test circuit, Figure 3)
VDD = 640V, I D = 5.8A,
VGS = 10V
Typ.
Max.
Unit
27
ns
10
ns
30
nC
7
nC
13
nC
SWITCHING OFF
Symbol
tr(Voff)
Parameter
Off-voltage Rise Time
tf
Fall Time
tc
Cross-over Time
Test Condit ions
Min.
VDD = 640V, ID = 5.8 A,
R G = 4.7Ω, VGS = 10V
(see test circuit, Figure 5)
Typ.
Max.
Unit
TBD
ns
TBD
ns
TBD
ns
SOURCE DRAIN DIODE
Symbol
ISD
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Source-drain Current
5.1
A
ISDM
(1)
Source-drain Current (pulsed)
20
A
VSD
(2)
Forward On Voltage
1.6
V
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
ISD = 5.1 A, VGS = 0
ISD = 5.8 A, di/dt = 100A/µs,
VDD = 100V, T j = 150°C
(see test circuit, Figure 5)
TBD
ns
TBD
µC
TBD
A
GATE-SOURCE ZENER DIODE
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Gate-Source Breakdown
Voltage
Igs=± 1mA (Open Drain)
αT
Voltage Thermal Coefficient
T=25°C Note(3)
1.3
10-4/°C
Rz
Dynamic Resistance
ID = 20 mA, VGS = 0
90
Ω
BVGSO
25
V
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. ∆VBV = αT (25°-T) BVGSO(25°)
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally
be applied from gate to souce. In this respect the 25V Zener voltage is appropiate to achieve an efficient
and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid
the usage of external components.
3/8
STP6NC80Z/FP/STP6NC80Z-1
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
4/8
STP6NC80Z/FP/STP6NC80Z-1
TO-220 MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
MAX.
A
4.40
4.60
0.173
0.181
C
1.23
1.32
0.048
0.051
D
2.40
2.72
0.094
D1
0.107
1.27
0.050
E
0.49
0.70
0.019
F
0.61
0.88
0.024
0.027
0.034
F1
1.14
1.70
0.044
0.067
F2
1.14
1.70
0.044
0.067
G
4.95
5.15
0.194
0.203
0.106
G1
2.4
2.7
0.094
H2
10.0
10.40
0.393
L2
0.409
16.4
0.645
13.0
14.0
0.511
0.551
L5
2.65
2.95
0.104
0.116
L6
15.25
15.75
0.600
0.620
L7
6.2
6.6
0.244
0.260
L9
3.5
3.93
0.137
0.154
DIA.
3.75
3.85
0.147
0.151
D1
C
D
A
E
L4
H2
G
G1
F1
L2
F2
F
Dia.
L5
L9
L7
L6
L4
P011C
5/8
STP6NC80Z/FP/STP6NC80Z-1
TO-220FP MECHANICAL DATA
mm
DIM.
MIN.
inch
MAX.
MIN.
A
4.4
TYP.
4.6
0.173
TYP.
MAX.
0.181
B
2.5
2.7
0.098
0.106
D
2.5
2.75
0.098
0.108
E
0.45
0.7
0.017
0.027
F
0.75
1
0.030
0.039
F1
1.15
1.7
0.045
0.067
F2
1.15
1.7
0.045
0.067
G
4.95
5.2
0.195
0.204
G1
2.4
2.7
0.094
0.106
H
10
10.4
0.393
0.409
L2
16
0.630
28.6
30.6
1.126
1.204
L4
9.8
10.6
0.385
0.417
L6
15.9
16.4
0.626
0.645
L7
9
9.3
0.354
0.366
Ø
3
3.2
0.118
0.126
B
D
A
E
L3
L3
L6
F
F1
L7
F2
H
G
G1
¯
1 2 3
L2
6/8
L4
STP6NC80Z/FP/STP6NC80Z-1
TO-262 (I2PAK) MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
MAX.
4.4
4.6
0.173
0.181
A1
2.49
2.69
0.098
0.106
B
0.7
0.93
0.027
0.036
B2
1.14
1.7
0.044
0.067
C
0.45
0.6
0.017
0.023
C2
1.23
1.36
0.048
0.053
D
8.95
9.35
0.352
0.368
e
2.4
2.7
0.094
0.106
E
10
10.4
0.393
0.409
L
13.1
13.6
0.515
0.531
L1
3.48
3.78
0.137
0.149
L2
1.27
1.4
0.050
0.055
E
e
B
B2
C2
A1
A
C
A
L1
L2
D
L
P011P5/E
7/8
STP6NC80Z/FP/STP6NC80Z-1
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a trademark of STMicroelectronics
 2000 STMicroelectronics – Printed in Italy – All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.
http://www.st.com
8/8