SSC SSM2304N

SSM2304N
N-CHANNEL ENHANCEMENT-MODE POWER MOSFET
Simple drive requirement
Small package outline
D
Surface-mount package
BV DSS
25V
R DS(ON)
117mΩ
I
2.5A
D
S
SOT-23
Description
G
Power MOSFETs from Silicon Standard provide the
designer with the best combination of fast switching,
low on-resistance and cost-effectiveness.
D
G
S
Absolute Maximum Ratings
Symbol
Parameter
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
ID @ TA=25°C
ID @ TA=70°C
Rating
Units
25
V
±20
V
3
2.5
A
3
2
A
10
A
Continuous Drain Current , VGS @ 4.5V
Continuous Drain Current , VGS @ 4.5V
1,2
IDM
Pulsed Drain Current
PD @ TA=25°C
Total Power Dissipation
1.25
W
Linear Derating Factor
0.01
W/°C
TSTG
Storage Temperature Range
-55 to 150
°C
TJ
Operating Junction Temperature Range
-55 to 150
°C
Thermal Data
Symbol
Rthj-a
Rev.2.02 3/11/2004
Parameter
Thermal Resistance Junction-ambient
3
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Max.
Value
Unit
100
°C/W
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SSM2304N
Electrical Characteristics @ T j=25oC (unless otherwise specified)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max. Units
25
-
-
V
0.1
-
V/°C
BVDSS
Drain-Source Breakdown Voltage
∆ BV DSS/ ∆Tj
Breakdown Voltage Temperature Coefficient Reference to 25°C,ID=1mA
-
RDS(ON)
Static Drain-Source On-Resistance
VGS=10V, ID=2.5A
-
117
mΩ
VGS=4.5V, ID=2A
-
190
mΩ
VDS=VGS, ID=250uA
1
-
3
V
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
IDSS
VGS=0V, ID=250uA
VDS=4.5V, ID=2.5A
-
3.4
-
S
o
VDS=25V, VGS=0V
-
-
1
uA
o
Drain-Source Leakage Current (Tj=55 C)
VDS=25V ,VGS=0V
-
-
10
uA
Gate-Source Leakage
VGS=20V
-
-
±100
nA
ID=2.5A
-
5.9
10
nC
Drain-Source Leakage Current (Tj=25 C)
IGSS
2
Qg
Total Gate Charge
Qgs
Gate-Source Charge
VDS=15V
-
0.8
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=10V
-
2.1
-
nC
VDS=15V
-
4.5
-
ns
2
td(on)
Turn-on Delay Time
tr
Rise Time
ID=1A
-
11.5
-
ns
td(off)
Turn-off Delay Time
RG=6Ω ,VGS=10V
-
12
-
ns
tf
Fall Time
RD=15Ω
-
3
-
ns
Ciss
Input Capacitance
VGS=0V
-
110
-
pF
Coss
Output Capacitance
VDS=15V
-
85
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
39
-
pF
Min.
Typ.
-
-
1.25
A
-
-
10
A
-
-
1.2
V
Source-Drain Diode
Symbol
IS
ISM
VSD
Parameter
Test Conditions
VD=VG=0V , VS=1.2V
Continuous Source Current ( Body Diode )
Pulsed Source Current ( Body Diode )
1
2
Forward On Voltage
IS=1.25A, VGS=0V
Max. Units
Notes:
1.Pulse width limited by Max. junction temperature.
2.Pulse width <300us , duty cycle <2%.
3.Surface mounted on FR4 board, t < 5 sec.
Rev.2.02 3/11/2004
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SSM2304N
10
10
o
T C =25 C
T C =150 o C
V GS =10V - 5V
V GS =10V - 5V
8
ID , Drain Current (A)
ID , Drain Current (A)
8
6
V GS =4V
4
6
V GS =4V
4
2
2
V GS =3V
V GS =3V
0
0
0
2
4
6
8
10
0
V DS , Drain-to-Source Voltage (V)
2
4
6
8
10
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1.8
700
V GS =10V
I D =2.5A
I D =2.5A
T C =25 ℃
600
1.6
500
Normalized R DS(ON)
RDSON (mΩ )
1.4
400
1.2
300
1.0
200
0.8
100
0.6
0
0
2
4
6
8
10
-50
V GS (V)
50
100
150
o
T j , Junction Temperature ( C)
Fig 3. On-Resistance vs. Gate Voltage
Rev.2.02 3/11/2004
0
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Fig 4. Normalized On-Resistance
vs. Junction Temperature
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3
1.5
2
1
PD (W)
ID , Drain Current (A)
SSM2304N
0.5
1
0
0
25
50
75
100
125
0
150
50
T c , Case Temperature ( o C)
100
150
T c , Case Temperature ( o C)
Fig 5. Maximum Drain Current vs.
Case Temperature
Fig 6. Typical Power Dissipation
100
1
Normalized Thermal Response (R thja)
Duty=0.5
ID (A)
10
1ms
1
10ms
T c =25 o C
Single Pulse
0.2
0.1
0.1
0.05
PDM
t
T
0.02
Duty factor = t/T
Peak Tj = PDM x Rthja + Ta
SINGLE
PULSE
100ms
1s
0.01
0
0.1
1
10
100
0.0001
V DS (V)
0.01
0.1
1
10
100
t , Pulse Width (s)
Fig 7. Maximum Safe Operating Area
Rev.2.02 3/11/2004
0.001
Fig 8. Effective Transient Thermal Impedance
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SSM2304N
10
1000
f=1.0MHz
V DS =15V
I D =2.5A
6
C (pF)
VGS , Gate to Source Voltage (V)
8
Ciss
100
Coss
4
Crss
2
0
0
1
2
3
4
5
10
6
1
5
9
Q G , Total Gate Charge (nC)
17
21
25
29
VDS (V)
Fig 9. Gate Charge Characteristics
Fig 10. Typical Capacitance Characteristics
10
2.25
T j =150 o C
2.05
T j =25 o C
VGS(th) (V)
IF (A)
13
1
1.85
1.65
0
1.45
0.1
0.5
0.9
1.3
-50
0
V SD (V)
Fig 11. Forward Characteristic of
Reverse Diode
Rev.2.02 3/11/2004
50
100
150
Junction Temperature ( o C )
Fig 12. Gate Threshold Voltage vs.
Junction Temperature
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SSM2304N
VDS
90%
RD
VDS
D
TO THE
OSCILLOSCOPE
0.6x RATED VDS
G
RG
+
10%
VGS
S
10 v
VGS
-
td(on)
Fig 13. Switching Time Circuit
td(off) tf
tr
Fig 14. Switching Time Waveform
VG
VDS
10V
0.6 x RATED VDS
G
S
QG
TO THE
OSCILLOSCOPE
D
QGS
QGD
VGS
+
1~ 3 mA
IG
ID
Charge
Fig 15. Gate Charge Circuit
Q
Fig 16. Gate Charge Waveform
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guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
Rev.2.02 3/11/2004
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