TPD4112K TOSHIBA Intelligent Power Device High Voltage Monolithic Silicon Power IC TPD4112K The TPD4112K is a DC brush less motor driver using high voltage PWM control. It is fabricated by high voltage SOI process. It contains bootstrap circuit, PWM circuit, 3-phase decode logic, level shift high-side driver, low-side driver, IGBT outputs, FRDs, over current and under voltage protection circuits, and thermal shutdown circuit. It is easy to control a DC brush less motor by applying a signal from a motor controller and a hall amp/ hall IC to the TPD41112K. Features • Bootstrap circuit gives simple high side supply. • Bootstrap diode is built in. • PWM and 3-phase decoder circuit are built in. • 3-phase bridge output using IGBTs. • Outputs Rotation pulse signals. • FRDs are built in. • Incorporating over current and under voltage protection, and thermal shutdown. • Package: 23-pin HZIP. • It corresponds to the hall amp input and the hall IC input. This product has a MOS structure and is sensitive to electrostatic discharge. When handling this product, ensure that the environment is protected against electrostatic discharge. Weight HZIP23-P-1.27F : 6.1 g (typ.) HZIP23-P-1.27G : 6.1 g (typ.) HZIP23-P-1.27H : 6.1 g (typ.) 1 2005-11-04 TPD4112K Pin Assignment 1 VS 2 3 4 5 6 7 OS RREF GND VREG VCC IS1 8 U 12 13 14 BUS VBB1 BSV V 9 10 11 W BSW VBB2 IS2 15 16 17 18 19 20 21 22 23 FG HU+ HU- HV+ HV- HW+ HW- Marking Lot No. TPD4112K JAPAN Part No. (or abbreviation code) A line indicates lead (Pb)-free package or lead (Pb)-free finish. 2 2005-11-04 TPD4112K Block Diagram VCC 6 9 BSU 11 BSV 14 BSW 6V regulator VREG 5 Under- Under- Undervoltage voltage voltage protect- protect- protection ion ion Under-voltage Protect-ion HV+ 20 HV‐21 Hall Amp 3-phase distribution Thermal logic shutdown HW+ 22 Low-side driver FG 17 OS 2 RREF 3 8 U 12 V 13 W HW‐23 VS 1 15 VBB2 Level shift high-side driver HU+ 18 HU‐19 10 VBB1 PWM 16 IS2 Triangular wave Over current protection 3 7 IS1 4 GND 2005-11-04 TPD4112K Pin Description Pin No. Symbol Pin Description 1 VS Speed control signal input pin. (PWM reference voltage input pin) 2 OS PWM triangular wave oscillation frequency setup pin (Connect a capacitor to this pin.) 3 RREF PWM triangular wave oscillation frequency setup pin (Connect a resistor to this pin.) 4 GND Ground pin 5 VREG 6 V regulator output pin 6 VCC Control power supply pin 7 IS1 IGBT emitter/FRD anode pin (Connect a current detecting resistor to this pin.) 8 U 9 BUS U-phase bootstrap capacitor connecting pin 10 VBB1 U and V-phase high-voltage power supply input pin 11 BSV V-phase bootstrap capacitor connecting pin 12 V V-phase output pin 13 W W-phase high-voltage power supply input pin 14 BSW W-phase bootstrap capacitor connecting pin 15 VBB2 W-phase high-voltage power supply input pin 16 IS2 IGBT emitter/FRD anode pin (Connect a current detecting resistor to this pin.) 17 FG Rotation pulse output pin. (open drain) 18 HU+ U-phase hall sensor signal input pin (Hall IC can be used.) 19 HU- U-phase hall sensor signal input pin (Hall IC can be used.) 20 HV+ V-phase hall sensor signal input pin (Hall IC can be used.) 21 HV- V-phase hall sensor signal input pin (Hall IC can be used.) 22 HW+ W-phase hall sensor signal input pin (Hall IC can be used.) 23 HW- W-phase hall sensor signal input pin (Hall IC can be used.) U-phase output pin 4 2005-11-04 TPD4112K Equivalent Circuit of Input Pins Internal circuit diagram of HU+, HU-, HV+, HV-, HW+, HW- input pins VCC To internal circuit HU+, HU-, HV+, HV-, HW+, HW-, 10 kΩ 13 V 2 kΩ 13 V Internal circuit diagram of VS pin VCC To internal circuit 4 kΩ 150 kΩ 6.5 V 75 kΩ VS 6.5 V Internal circuit diagram of FG pin FG To internal circuit 26 V 5 2005-11-04 TPD4112K Timing Chart HU HV Hall amp input HW VU Out put voltage VV VW Rotation pulse FG * : As for "H", a hall amp input state shows the state of IN+>IN−. Truth Table Hall amp Input U Phase V Phase W Phase HU HV HW Upper Arm Lower Arm Upper Arm Lower Arm Upper Arm Lower Arm FG H L H ON OFF OFF ON OFF OFF L H L L ON OFF OFF OFF OFF ON H H H L OFF OFF ON OFF OFF ON L L H L OFF ON ON OFF OFF OFF H L H H OFF ON OFF OFF ON OFF L L L H OFF OFF OFF ON ON OFF H L L L OFF OFF OFF OFF OFF OFF L H H H OFF OFF OFF OFF OFF OFF L * : As for "H", a hall amp input state shows the state of IN+>IN−. 6 2005-11-04 TPD4112K Absolute Maximum Ratings (Ta = 25°C) Characteristics Power supply voltage Output current (DC) Symbol Rating Unit VBB 500 V VCC 20 V Iout 1 A Output current (pulse) Iout 2 A Input voltage (except VS) VIN −0.5 to VREG + 0.5 V Input voltage (only VS) VVS 8.2 V VREG current IREG 50 mA Power dissipation (Ta = 25°C) PC 4 W Power dissipation (Tc = 25°C) PC 20 W Operating junction temperature Tjopr −20 to 135 °C Junction temperature Tj 150 °C Storage temperature Tstg −55 to 150 °C Lead-heat sink isolation voltage Vhs 1000 (1 min) Vrms 7 2005-11-04 TPD4112K Electrical Characteristics (Ta = 25°C) Characteristics Operating power supply voltage Current dissipation Hall amp input sensitivity Hall amp Input current Symbol Test Condition Min Typ. Max VBB ⎯ 50 ⎯ 400 VCC ⎯ 13.5 15 17.5 IBB VBB = 400 V Duty cycle = 0% ⎯ ⎯ 0.5 ICC VCC = 15 V Duty cycle = 0% ⎯ 1.8 10 IBS (ON) VBS = 15 V, high side ON ⎯ 210 470 IBS (OFF) VBS = 15V, high side OFF ⎯ 200 415 50 ⎯ ⎯ mvp-p IHB(HA) ⎯ -2 0 2 µA ⎯ 8 V 30 50 25 0 Hall amp hysteresis width ΔVIN(HA) 20 Hall amp input voltage L→H VLH(HA) 5 15 Hall amp input voltage H→L VHL(HA) FRD forward voltage PWM ON-duty cycle PWM ON-duty cycle, 0% PWM ON-duty cycle, 100% PWM ON-duty voltage range Output all-OFF voltage Regulator voltage mA ⎯ CMVIN(HA) FRD forward voltage V VHSENS(HA) Hall amp this minister input Output saturation voltage Unit -15 -15 -5 VCEsatH VCC = 15 V, IC = 0.5 A ⎯ 2.3 3.0 VCesatL VCC = 15 V, IC = 0.5 A ⎯ 2.3 3.0 VFH IF = 0.5 A, high side ⎯ 1.4 2.1 VFL IF = 0.5 A, low side ⎯ 1.4 1.8 IF = 500 µA ⎯ 0.8 1.2 VF (BSD) mV V V V PWMMIN ⎯ 0 ⎯ ⎯ PWMMAX ⎯ ⎯ ⎯ 100 PWM = 0% 1.7 2.1 2.5 V PWM = 100% 4.9 5.4 6.1 V VVS100% − VVS0% 2.8 3.3 3.8 V Output all OFF 1.1 1.3 1.5 V 5 6 7 V 0 ⎯ 6.5 V ⎯ ⎯ 0.5 V VVS0% VVS100% VVSW VVSOFF VREG Speed control voltage range VS FG output saturation voltage VFGsat VCC = 15 V, IO = 30 mA ⎯ VCC = 15 V, IFG = 20 mA % VR ⎯ 0.46 0.5 0.54 V TSD ⎯ 135 ⎯ 185 °C Thermal shutdown hysteresis ∆TSD ⎯ ⎯ 50 ⎯ °C VCC under voltage protection VCCUVD ⎯ 10 11 12 V VCC under voltage protection recovery VCCUVR ⎯ 10.5 11.5 12.5 V VBS under voltage protection VBSUVD ⎯ 9 10 11 V VBS under voltage protection recovery VBSUVR ⎯ 9.5 10.5 11.5 V Current control voltage Thermal shutdown temperature Refresh operating ON voltage TRFON Refresh operation 1.1 1.3 1.5 V Refresh operating OFF voltage TRFOFF Refresh operation OFF 3.1 3.8 4.6 V Triangular wave frequency fc R = 27 kΩ, C = 1000 pF 16.5 20 25 kHz Output on delay time ton VBB = 280 V, VCC = 15 V, IC = 0.5 A ⎯ 2.5 3 µs Output off delay time toff VBB = 280 V, VCC = 15 V, IC = 0.5 A ⎯ 1.8 3 µs FRD reverse recovery time trr VBB = 280 V, VCC = 15 V, IC = 0.5 A ⎯ 200 ⎯ ns 8 2005-11-04 TPD4112K Application Circuit Example 15 V VCC BSU 6 9 C5 11 14 VREG 6V regulator 5 C6 R3 Under-voltage Protect-ion HU+ 18 C7 19 HV+ 20 C7 21 HW+ 22 C7 23 Rotation pulse FG Speed instruction VS OS RREF C4 Under- Under- Undervoltage voltage voltage protect- protect- protection ion ion 10 15 BSV BSW VBB1 VBB2 C1 C2 C3 Level shift high-side driver Hall Amp 3-phase Thermal distribution shutdown 8 12 13 logic U M V W Low-side driver 17 1 PWM 2 Triangular 3 wave 16 Over current protection 7 IS2 IS1 4 R1 GND R2 9 2005-11-04 TPD4112K External Parts Standard external parts are shown in the following table. Part Recommended Value C1, C2, C3 25 V/2.2 µF R1 Purpose Remarks Bootstrap capacitor (Note 1) 0.62 Ω ± 1% (1 W) Current detection (Note 2) C4 10 V/1000 pF ± 5% PWM frequency setup (Note 3) R2 27 kΩ ± 5% PWM frequency setup (Note 3) C5 25 V/10 µF Control power supply stability (Note 4) C6 10 V/0.1 µF VREG power supply stability (Note 4) R3 5.1 kΩ FG pin pull-up resistor (Note 5) C7 TBD Input power supply stability (Note 6) Note 1: The required bootstrap capacitance value varies according to the motor drive conditions. The IC can operate at above the VBS undervoltage level, however, it is recommended that the capacitor voltage be greater than or equal to 13.5 V to keep the power dissipation small. The capacitor is biased by VCC and must be sufficiently derated for it. Note 2: The following formula shows the detection current: IO = VR ÷ RIS (VR = 0.5 V typ.) Do not exceed a detection current of 1 A when using the IC. Note 3: With the combination of Cos and RREF shown in the table, the PWM frequency is around 20 kHz. The IC intrinsic error factor is around 10%. The PWM frequency is broadly expressed by the following formula. (In this case, the stray capacitance of the printed circuit board needs to be considered.) fPWM = 0.65 ÷ {Cos × (RREF + 4.25 kΩ)} [Hz] RREF creates the reference current of the PWM triangular wave charge/discharge circuit. If RREF is set too small it exceeds the current capacity of the IC internal circuits and the triangular wave distorts. Set RREF to at least 9 kΩ. Note 4: When using the IC, some adjustment is required in accordance with the use environment. When mounting, place as close to the base of the IC leads as possible to improve the noise elimination. Note 5: The FG pin is open drain. Note that when the FG pin is connected to a power supply with a voltage higher than or equal to the VCC, a protection circuit is triggered so that the current flows continuously. If not using the FG pin, connect to the GND. Note 6: If noise is detected on the Input signal pin, add a capacitor between inputs. Handling precautions (1) (2) (3) (4) When switching the power supply to the circuit on/off, ensure that VS < VVSOFF (all IGBT outputs off). At that time, either the VCC or the VBB can be turned on/off first. Note that if the power supply is switched off as described above, the IC may be destroyed if the current regeneration route to the VBB power supply is blocked when the VBB line is disconnected by a relay or similar while the motor is still running. The triangular wave oscillator circuit, with externally connected COS and RREF, charges and discharges minute amounts of current. Therefore, subjecting the IC to noise when mounting it on the board may distort the triangular wave or cause malfunction. To avoid this, attach external parts to the base of the IC leads or isolate them from any tracks or wiring which carries large current. The PWM of this IC is controlled by the on/off state of the high-side IGBT. In the state where VBB voltage is low, and Duty100%, if a motor is made to lock, after load release may be unable to reboot. This is the high side ON of a just before lock, when a motor is locked in the state where VBB voltage is low. It is because time becomes long, bootstrap voltage falls, the decrease voltage protection of a high side operates and a high side output serves as OFF. In this case, since the level shift pulse for making a high side turn on is ungenerable, it cannot reboot. A level shift pulse is generated from the edge of a hole sensor output and the edge of a hall sensor output edge of an internal PWM signal, neither of the edge exists by the motor lock and Duty100% command. In order to reboot after locke, it is required for a high side input signal to enter in the state where it recovered to voltage with high side power supply voltage higher 0.5v than a decrease voltage protection voltage value. Since a high side input signal is created by the above-mentioned level shift pulse, it can reboot 10 2005-11-04 TPD4112K by making Duty of PWM less than 100%, or turning a motor from the outside compulsorily, and creating edge to a hall sensor output. In order to enable the reboot after a lock as a system, it is necessary to restrict and obtain on motor specification so that the maximum of Duty may become less than 100%. Description of Protection Function (1) Over current protection The IC incorporates the over current protection circuit to protect itself against over current at startup or when a motor is locked. This protection function detects voltage generated in the current detection resistor connected to the IS pin. When this voltage exceeds VR = 0.5 V (typ.), the high-side IGBT output, which is on, temporarily shuts down after a mask period, preventing any additional current from flowing to the IC. The next PWM ON signal releases the shutdown state. Duty ON PWM reference voltage Duty OFF Triangle wave Mask period + tOFF tOFF tON tON Over current setting value Output current Retry Over current shutdown (2) (3) Under voltage protection The IC incorporates the under voltage protection circuit to prevent the IGBT from operating in unsaturated mode when the VCC voltage or the VBS voltage drops. When the VCC power supply falls to the IC internal setting (VCCUVD = 11 V typ.), all IGBT outputs shut down regardless of the input. This protection function has hysteresis. When the VCCUVR (= 11.5 V typ.) reaches 0.5 V higher than the shutdown voltage, the IC is automatically restored and the IGBT is turned on again by the input. When the VBS supply voltage drops (VBSUVD = 10 V typ.), the high-side IGBT output shuts down. When the VBSUVR (= 10.5 V typ.) reaches 0.5 V higher than the shutdown voltage, the IGBT is turned on again by the input signal. Thermal shutdown The IC incorporates the thermal shutdown circuit to protect itself against the abnormal state when its temperature rises excessively. When the temperature of this chip rises due to external causes or internal heat generation and the internal setting TSD, all IGBT outputs shut down regardless of the input. This protection function has hysteresis (∆TSD = 50°C typ.). When the chip temperature falls to TSD − ∆TSD, the chip is automatically restored and the IGBT is turned on again by the input. Because the chip contains just one temperature detection location, when the chip heats up due to the IGBT, for example, the differences in distance from the detection location in the IGBT (the source of the heat) cause differences in the time taken for shutdown to occur. Therefore, the temperature of the chip may rise higher than the thermal shutdown temperature when the circuit started to operate. 11 2005-11-04 TPD4112K Description of Bootstrap Capacitor Charging and Its Capacitance The IC uses bootstrapping for the power supply for high-side drivers. The bootstrap capacitor is charged by turning on the low-side IGBT of the same arm (approximately 1/5 of PWM cycle) while the high-side IGBT controlled by PWM is off. (For example, to drive at 20 kHz, it takes approximately 10 ms per cycle to charge the capacitor.) When the VS voltage exceeds 3.8 V (55% duty), the low-side IGBT is continuously in the off state. This is because when the PWM on-duty becomes larger, the arm is short-circuited while the low-side IGBT is on. Even in this state, because PWM control is being performed on the high-side IGBT, the regenerative current of the diode flows to the low-side FRD of the same arm, and bootstrap capacitor is charged. Note that when the on-duty is 100%, diode regenerative current does not flow; thus, the bootstrap capacitor is not charged. When driving a motor at 100 % duty cycle, take the voltage drop at 100% duty (see the figure below) into consideration to determine the capacitance of the bootstrap capacitor. Capacitance of the bootstrap capacitor = Consumption current (max) of the high-side driver × Maximum drive time /(VCC − VF (BSD) + VF (FRD) − 13.5) [F] VF (BSD) : Bootstrap diode forward voltage VF (FRD) : Flywheel diode forward voltage Care must be taken for aging and temperature change of the capacitor. Duty cycle 100% (VS: 5.4 V) Duty cycle 80% C Triangular wave Duty cyle 55% (VS: 3.8 V) PWM reference voltage B Duty cycle 0% (VS: 2.1 V) VVsOFF (VS: 1.3 V) Low-side ON High-side duty ON A GND VS Range IGBT Operation A Both high- and low-side OFF. B Charging range. Low-side IGBT refreshing on the phase the high-side IGBT in PWM. C No charging range. High-side at PWM according to the timing chart. low-side no refreshing. (A) 1.1 Peak winding current 1.0 Peak winding current (A) Safe Operating Area 0 0 0 400 Power supply voltage Figure 1 VBB (V) 0 400 Power supply voltage SOA at Tj = 135°C Figure 2 VBB (V) SOA at Tc = 95°C Note 1: The above safe operating areas are Tj = 135°C (Figure 1) and Tc = 95°C (Figure 2). If the temperature exceeds thsese, the safe operation areas reduce. Note 2: The above safe operating areas include the over current protection operation area. 12 2005-11-04 TPD4112K VCEsatL – Tj VCEsatL (V) VCC = 15 V IC = 700 mA 3.0 IC = 500 mA 2.6 2.2 IGBT saturation voltage IGBT saturation voltage VCEsatH (V) VCEsatH – Tj 3.4 IC = 300 mA 1.8 1.4 −20 20 60 Junction temperature 100 Tj 140 3.4 VCC = 15 V IC = 700 mA 3.0 IC = 500 mA 2.6 2.2 IC = 300 mA 1.8 1.4 −20 (°C) 20 60 Junction temperature VFL (V) 1.6 IF = 700 mA 1.4 IF = 500 mA IF = 300 mA 1.2 1.0 0.8 −20 20 60 Junction temperature 100 Tj IF = 700 mA 1.4 IF = 500 mA IF = 300 mA 1.2 1.0 (°C) 20 60 Junction temperature ICC – VCC (mA) (V) 25°C 135°C VREG 2.5 Regulator voltage ICC Tj 140 (°C) −20°C 25°C 135°C −20°C Consumption current 100 VREG – VCC 7.0 2.0 1.5 14 (°C) 1.6 0.8 −20 140 3.0 1.0 12 Tj 140 VFL – Tj FRD forward voltage FRD forward voltage VFH (V) VFH – Tj 100 16 Control power supply voltage (V) Ireg = 30 mA 6.0 5.5 5.0 12 18 VCC 6.5 14 16 Control power supply voltage 13 18 VCC (V) 2005-11-04 TPD4112K tON – Tj tOFF – Tj 3.0 High-side Low-side tOFF (µs) 2.0 1.0 VBB = 280 V VCC = 15 V IC = 0.5 A High-side Low-side 0 −20 20 2.0 Output off delay time tON Output on delay time VBB = 280 V VCC = 15 V IC = 0.5 A (µs) 3.0 60 Junction temperature 100 Tj 1.0 0 −20 140 (°C) 20 Junction temperature VS – Tj Tj 140 (°C) VCCUV – Tj Under voltage protection operating voltage VCCUV (V) PWM on-duty set-up voltage VS (V) 100 12.5 6.0 VS 100% 4.0 VSW 2.0 VS 0% VCC = 15 V 0 −20 20 60 Junction temperature 100 Tj VCCUVD VCCUVR 12.0 11.5 11.0 10.5 10.0 −20 140 (°C) 20 VBSUV – Tj 100 Tj 140 (°C) VR – Tj 1.0 Current control operating voltage VR (V) VBSUVD VBSUVR 11.0 10.5 10.0 9.5 9.0 −20 60 Junction temperature 11.5 Under voltage protection operating voltage VBSUV (V) 60 20 60 Junction temperature 100 Tj VCC = 15 V 0.8 0.6 0.4 0.2 0 −20 140 (°C) 20 60 Junction temperature 14 100 Tj 140 (°C) 2005-11-04 TPD4112K IBS – VBS (ON) IBS – VBS (OFF) (µA) −20°C 25°C IBS (OFF) 135°C 400 Current consumption Current consumption IBS (ON) (µA) 500 300 200 100 12 14 16 Control power supply voltage 18 VBS 500 −20°C 25°C 135°C 400 300 200 100 12 (V) 14 16 Control power supply voltage VF (BSD) – Tj 18 VBS (V) Wton – Tj (µJ) 1.0 Wton 0.9 IF = 700 µA 0.8 0.7 0.6 −20 Turn-on loss BSD forward voltage VF (BSD) (V) 125 IF = 500 µA 20 IC = 700 mA 100 75 IC = 500 mA 50 IC = 300 mA 25 IF = 300 µA 60 Junction temperature 100 Tj 0 −20 140 (°C) 20 Junction temperature Wtoff – Tj Tj (°C) Width 70 40 Hall amplifier Hysteresis DVIN(HA) (mV) (µJ) Wtoff Turn-off loss 140 100 DVIN(HA)– Tj 50 IC = 700 mA 30 IC = 500 mA 20 IC = 300 mA 10 0 −20 60 20 60 Junction temperature 100 Tj 60 50 40 30 20 −20 140 (°C) 20 60 Junction temperature 15 100 Tj (°C) 2005-11-04 0.5 A 16 23. HW- 22. HW+ 21. HV- 20. HV+ 19. HU- 18. HU+ 17. FG 16. IS2 15. VBB2 14. BSW 13. W 12. V 11. BSV 10. VBB1 9. BSU 8. U 7. IS1 6. VCC 5. VREG 4. GND 3. RREF 2. OS 1. VS 0.5 A 27 kΩ 1000 pF 23. HW- 22. HW+ 21. HV- 20. HV+ 19. HU- 18. HU+ 17. FG 16. IS2 15. VBB2 14. BSW 13. W 12. V 11. BSV 10. VBB1 9. BSU 8. U 7. IS1 6. VCC 5. VREG 4. GND 3. RREF 2. OS 1. VS TPD4112K Test Circuits IGBT Saturation Voltage (U-phase low side) 2.5 V VM HU+ = 0 V HW+ = 5V HV+ = 5V VCC = 15 V VS = 6.1 V FRD Forward Voltage (U-phase low side) VM 2005-11-04 30 mA 27 kΩ 1000 pF 17 23. HW- 22. HW+ 21. HV- 20. HV+ 19. HU- 18. HU+ 17. FG 16. IS2 15. VBB2 14. BSW 13. W 12. V 11. BSV 10. VBB1 9. BSU 8. U 7. IS1 6. VCC 5. VREG 4. GND 3. RREF 2. OS 1. VS 27 kΩ 1000 pF 23. HW- 22. HW+ 21. HV- 20. HV+ 19. HU- 18. HU+ 17. FG 16. IS2 15. VBB2 14. BSW 13. W 12. V 11. BSV 10. VBB1 9. BSU 8. U 7. IS1 6. VCC 5. VREG 4. GND 3. RREF 2. OS 1. VS TPD4112K VCC Current Dissipation AM VCC = 15 V Regulator Voltage VM VCC = 15 V 2005-11-04 IM HV+ 0V 2.2 µF 560 Ω 27 kΩ 1000 pF 5V IM tON 18 23. HW- 22. HW+ 21. HV- 20. HV+ 19. HU- 18. HU+ 17. FG 16. IS2 15. VBB2 14. BSW 13. W 12. V 11. BSV 10. VBB1 9. BSU 8. U 7. IS1 6. VCC 5. VREG 4. GND 3. RREF 2. OS 1. VS TPD4112K Output ON/OFF Delay Time (U-phase low side) 2.5 V HU+ = 0 V HV+ = PG HW+ = 0 V U = 280 V VCC = 15 V VS = 6.1 V 90% 10% 90% 10% tOFF 2005-11-04 TPD4112K 23. HW- 22. HW+ 21. HV- 20. HV+ 19. HU- 18. HU+ 17. FG 16. IS2 15. VBB2 14. BSW 13. W 12. V 11. BSV 10. VBB1 9. BSU 8. U 7. IS1 6. VCC 5. VREG 4. GND 15 V HU+ = 5 V 2 kΩ 2. OS 3. RREF 2.5 V 27 kΩ 1000 pF 1. VS PWM ON-duty Setup Voltage (U-phase high side) HW+ = 0 V HV+ = 0 V VM VBB = 18 V VCC = 15 V VS = 0 V → 6.1 V 6.1 V → 0 V Note: Sweeps the VS pin voltage to increase and monitors the U pin. When output is turned off from on, the PWM = 0%. When output is full on, the PWM = 100%. 19 2005-11-04 TPD4112K 23. FG 22. FR 21. HW 20. HV 19. HU 18. IS2 17. VBB2 16. BSW 15. W 14. ⎯ (NC) 13. BSV 12. V 11. VBB1 10. BSU 9. U 8. ⎯ (NC) 7. IS1 6. VCC 5. VREG 4. GND 2 kΩ 2. OS 3. RREF HU = 5 V VM HV = 0 V HW = 0 V 27 kΩ 1000 pF 1. VS VCC Under voltage Protection Operation/Recovery Voltage (U-phase low side) FR = 0 V U = 18 V VCC = 15 V → 6 V 6 V → 15 V VS = 6 V Note:Sweeps the VCC pin voltage from 15 V to decrease and monitors the U pin voltage. The VCC pin voltage when output is off defines the under voltage protection operating voltage. Also sweeps from 6 V to increase. The VCC pin voltage when output is on defines the under voltage protection recovery voltage. 23. HW- 22. HW+ 21. HV- 20. HV+ 19. HU- 18. HU+ 17. FG 16. IS2 15. VBB2 14. BSW 13. W 12. V 11. BSV 10. VBB1 9. BSU 8. U 7. IS1 6. VCC 5. VREG 4. GND VM HU+ = 5 V 2 kΩ 2. OS 3. RREF 2.5 V 27 kΩ 1000 pF 1. VS VBS Under voltage Protection Operation/Recovery Voltage (U-phase high side) HV+ = 0 V HW+ = 0 V VBB = 18 V BSU = 15 V → 6 V 6 V → 15 V VCC = 15 V VS = 6.1 V Note:Sweeps the BSU pin voltage from 15 V to decrease and monitors the VBB pin voltage. The BSU pin voltage when output is off defines the under voltage protection operating voltage. Also sweeps the BSU pin voltage from 6 V to increase and change the VS voltage at 6 V → 0 V → 6V. The BSU pin voltage when output is on defines the under voltage protection recovery voltage. 20 2005-11-04 TPD4112K 23. HW- 22. HW+ 21. HV- 20. HV+ 19. HU- 18. HU+ 17. FG 16. IS2 15. VBB2 14. BSW 13. W 12. V 11. BSV 10. VBB1 9. BSU 8. U 7. IS1 6. VCC 5. VREG 4. GND HU+ = 5 V HV+ = 0 V HW+ = 0 V VBB = 18 V 2 kΩ 2. OS 3. RREF 2.5 V 15 V 27 kΩ 1000 pF 1. VS Current Control Operating Voltage (U-phase high side) VM IS = 0 V → 0.6 V VCC = 15 V VS = 6.1 V Note:Sweeps the IS pin voltage to increase and monitors the U pin voltage. The IS pin voltage when output is off defines the current control operating voltage. 21 2005-11-04 27 kΩ 1000 pF AM 22 23. HW- 22. HW+ 21. HV- 20. HV+ 19. HU- 18. HU+ 17. FG 16. IS2 15. VBB2 14. BSW 13. W 12. V 11. BSV 10. VBB1 9. BSU 8. U 7. IS1 6. VCC 5. VREG 4. GND 3. RREF 2. OS 1. VS TPD4112K VBS Current Consumption (U-phase high side) 2.5 V HU+ = 5/0 V HV+ = 0 V HW+ = 0 V BSU = 15 V VCC = 15 V VS = 6.1 V 2005-11-04 VM 500 µA 23 23. HW- 22. HW+ 21. HV- 20. HV+ 19. HU- 18. HU+ 17. FG 16. IS2 15. VBB2 14. BSW 13. W 12. V 11. BSV 10. VBB1 9. BSU 8. U 7. IS1 6. VCC 5. VREG 4. GND 3. RREF 2. OS 1. VS TPD4112K BSD Forward Voltage (U-phase) 2005-11-04 TPD4112K 23. HW- 22. HW+ 21. HV- 20. HV+ 19. HU- 2.5 V HU+ = 0 V 5 mH L 18. HU+ 17. FG 16. IS2 15. VBB2 14. BSW 13. W 12. V 11. BSV 10. VBB1 9. BSU 2.2 µF 8. U 7. IS1 6. VCC 5. VREG 4. GND 2. OS 3. RREF VM 27 kΩ 1000 pF 1. VS Turn-On/Off Loss (low-side IGBT + high-side FRD) HV+ = PG HW+ = 0 V VBB = 280 V IM VCC = 15 V VS = 6.1 V Input (HV+) IGBT (C-E voltage) (U-GND) Power supply current Wtoff Wton 24 2005-11-04 TPD4112K Package Dimensions Weight: 6.1 g (typ.) 25 2005-11-04 TPD4112K Package Dimensions Weight: 6.1 g (typ.) 26 2005-11-04 TPD4112K Package Dimensions Weight: 6.1 g (typ.) 27 2005-11-04 TPD4112K RESTRICTIONS ON PRODUCT USE 000707EBA • TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc.. • The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer’s own risk. • The products described in this document are subject to the foreign exchange and foreign trade laws. • The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. • The information contained herein is subject to change without notice. 28 2005-11-04