FDC6000NZ Dual N-Channel 2.5V Specified PowerTrench MOSFET General Description Features This N-Channel 2.5V specified MOSFET is a rugged gate version of Fairchild's Semiconductor’s advanced PowerTrench process. It has been optimized for power management applications with a wide range of gate drive voltage (2.5V – 12V). Packaged in FLMP SSOT-6, the RDS(ON) and thermal properties of the device are optimized for battery power management applications. • 6.5 A, 20 V RDS(ON) = 20 mΩ @ VGS = 4.5 V RDS(ON) = 28 mΩ @ VGS = 2.5 V • ESD protection diode (note 3) • High performance trench technology for extremely Applications low RDS(ON) • Battery management/Charger Application • FLMP SSOT-6 package: Enhanced thermal • Load switch performance in industry-standard package size Bottom Drain Contact S2 S1 G1 G2 S2 SuperSOT-6 TM 4 3 5 2 6 1 S1 FLMP Bottom Drain Contact MOSFET Maximum Ratings Symbol TA=25oC unless otherwise noted Ratings Units VDSS Drain-Source Voltage Parameter 20 V VGSS Gate-Source Voltage ±12 V ID Drain Current 7.3 A – Continuous (Note 1a) – Pulsed PD TJ, TSTG 20 Power Dissipation for Dual Operation (Note 1a) Power Dissipation for Single Operation (Note 1a) 1.8 (Note 1b) 1.2 Operating and Storage Junction Temperature Range 1.6 W –55 to +150 °C °C/W Thermal Characteristics RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 68 RθJc Thermal Resistance, Junction-to-Case (Note 1a) 1 Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity .0NZ FDC6000NZ 7’’ 8mm 3000 units 2004 Fairchild Semiconductor Corporation FDC6000NZ Rev E1 (W) FDC6000NZ June 2004 Symbol TA = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units Off Characteristics ID = 250 µA 20 V BVDSS Drain–Source Breakdown Voltage VGS = 0 V, ∆BVDSS ∆TJ IDSS Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current ID = 250 µA, Referenced to 25°C VDS = 16 V, VGS = 0 V 1 µA IGSS Gate–Body Leakage VGS = ±12 V, VDS = 0 V ± 10 µA ID = 250 µA On Characteristics 14 mV/°C (Note 2) 0.6 0.9 VGS(th) Gate Threshold Voltage VDS = VGS, ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance ID = 250 µA, Referenced to 25°C –4 VGS = 4.5 V, ID = 6.5 A ID = 6.4 A VGS = 4.0 V, ID = 6.3 A VGS = 3.1 V, ID = 5.5 A VGS = 2.5 V, VGS = 4.5 V, ID = 6.5A, TJ=125°C 16.5 16.8 19.2 22.5 22.8 gFS Forward Transconductance 1.5 V mV/°C 20 21 24 28 30 mΩ VDS = 5 V, ID = 6.5 A 30 S VDS = 10 V, f = 1.0 MHz V GS = 0 V, 840 pF Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance 210 pF Crss Reverse Transfer Capacitance 100 pF RG Gate Resistance Ω Switching Characteristics VGS = 15 mV, f = 1.0 MHz 2.3 VDD = 10 V, VGS = 4.5 V, ID = 1 A, RGEN = 6 Ω 10 20 ns 27 ns (Note 2) td(on) Turn–On Delay Time tr Turn–On Rise Time 15 td(off) Turn–Off Delay Time 18 32 ns tf Turn–Off Fall Time 9 18 ns Qg Total Gate Charge 8 11 nC Qgs Gate–Source Charge 1.5 nC Qgd Gate–Drain Charge 2.1 nC VDS = 10 V, VGS = 4.5 V ID = 6.5 A, Drain–Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain–Source Diode Forward Current VSD Drain–Source Diode Forward Voltage VGS = 0 V, IS = 1.25A (Note 2) 0.7 1.25 A 1.2 V FDC6000NZ RevE1 (W) FDC6000NZ Electrical Characteristics Symbol TA = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units Drain–Source Diode Characteristics and Maximum Ratings trr Diode Reverse Recovery Time Qrr Diode Reverse Recovery Charge IF = 6.5 A, diF/dt = 100 A/µs 16 nS 4.3 nC NOTES: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 68°C/W when mounted on a 1in2 pad of 2 oz copper (Single Operation). b) 102°C/W when mounted on a minimum pad of 2 oz copper (Single Operation). Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% 3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. 4. Electrical characterization and datasheet limits was based on a single source configuration (pin 2 & 5 no connection). FDC6000NZ RevE1 (W) FDC6000NZ Electrical Characteristics FDC6000NZ Dimensional Outline and Pad Layout Bottom View Recommended Landing Pattern For Common Drain Configuration Recommended Landing Pattern For Standard Dual Configuration Top View FDC6000NZ RevE1 (W) FDC6000NZ Typical Characteristics 3 VGS = 4.5V 3.5V 2.5V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 20 ID, DRAIN CURRENT (A) 3.0V 2.0V 15 10 1.8V 5 2.8 VGS = 1.8V 2.6 2.4 2.2 2 2.0V 1.8 1.6 2.5V 1.4 3.0V 1.2 1 0 0 0.5 1 1.5 2 0 2.5 5 Figure 1. On-Region Characteristics. 10 15 0.062 ID = 6.5A VGS = 4.5V ID = 3.3 A RDS(ON), ON-RESISTANCE (OHM) 0.057 1.4 1.2 1 0.8 0.052 0.047 0.042 TA = 125oC 0.037 0.032 0.027 0.022 TA = 25oC 0.017 0.6 -50 -25 0 25 50 75 100 20 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 4.5V ID, DRAIN CURRENT (A) VDS, DRAIN-SOURCE VOLTAGE (V) 125 0.012 150 1 o 2 TJ, JUNCTION TEMPERATURE ( C) 3 4 5 VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 30 25 TA = -55oC 20 IS, REVERSE DRAIN CURRENT (A) VDS = 5V ID, DRAIN CURRENT (A) 3.5V 0.8 25oC 125oC 15 10 5 VGS = 0V 10 TA = 125oC 1 25oC 0.1 -55oC 0.01 0.001 0.0001 0 1 1.5 2 VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 2.5 0 0.2 0.4 0.6 0.8 1 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDC6000NZ Rev E1(W) FDC6000NZ Typical Characteristics 1200 ID = 6.5A 10V VDS = 5V 4 15V 3 2 1 CISS 800 600 COSS 400 200 CRSS 0 0 0 2 4 6 8 10 0 5 Qg, GATE CHARGE (nC) 10 15 20 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics. 100 P(pk), PEAK TRANSIENT POWER (W) 50 RDS(ON) LIMIT ID, DRAIN CURRENT (A) f = 1MHz VGS = 0 V 1000 CAPACITANCE (pF) VGS, GATE-SOURCE VOLTAGE (V) 5 100µs 10 1ms 1 10s DC 10ms 100ms 1s VGS = 4.5V SINGLE PULSE RθJA = 102oC/W 0.1 TA = 25oC 0.01 0.1 1 10 100 SINGLE PULSE RθJA = 102°C/W TA = 25°C 40 30 20 10 0 0.0001 0.001 0.01 0.1 VDS, DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 10 100 1000 t1, TIME (sec) Figure 10. Single Pulse Maximum Power Dissipation. 1 D = 0.5 R θJA (t) = r(t) * R θJA R θJA = 102 °C/W 0.2 0.1 P(pk) 0.1 t1 0.05 t2 0.02 T J - T A = P * R θJA (t) Duty Cycle, D = t1 / t2 0.01 SINGLE PULSE 0.01 0.0001 0.001 0.01 0.1 1 10 100 1000 t 1, TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. FDC6000NZ Rev E1(W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FAST ActiveArray™ FASTr™ Bottomless™ FPS™ CoolFET™ FRFET™ CROSSVOLT™ GlobalOptoisolator™ DOME™ GTO™ EcoSPARK™ HiSeC™ E2CMOS™ I2C™ EnSigna™ i-Lo™ FACT™ ImpliedDisconnect™ FACT Quiet Series™ ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC Across the board. Around the world.™ OPTOPLANAR™ PACMAN™ The Power Franchise POP™ Programmable Active Droop™ Power247™ PowerSaver™ PowerTrench QFET QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ µSerDes™ SILENT SWITCHER SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I11