Design Guide (PDF)

DESIGN GUIDE
Version 1.1
WIRELAID® Design Guide
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Your benefit with WIRELAID®
Caused by the increasing requirements of power and digital control
electronics in almost every technological industry, PCB manufacturers
are facing new challenges. To combine high currents and signals at the
same time, the Wirelaid technology provides a partial power management as a competitive alternative to PCBs with thick copper technology
or a parallel arrangement of additional layers. The concept of the
Wirelaid technology is the use of embedded copper wires in a PCB.
As a result, standard conductors, which can only manage low currents,
become high current tracks. This allows for the combination of power
and signal processing electronics on one single board.
Available with UL listing type WE51
(UL 94 V-O).
Wire types
Flat wire
2
F 08
Cross-section area
0.8 x 0.25 mm2
Ø 0.2 mm2
F 14
Cross-section area
1.4 x 0.35 mm2
Ø 0.49 mm2
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Your advantages with WIRELAID®
Reduced system volume
„„ Wires replacing the thick copper
„„ Heat reduction due to smaller cross-sectional area of copper
„„ Elimination of connectors
„„ Reduced number of layers
„„ Combination of power and signal processing electronics
on one single PCB
„„ Reduction of system costs
„„ Improved heat dissipation
„„ Better soldering process in comparison with traditional thick
copper technology
„„ Thinner copper layers
„„ Fewer thick copper areas through the use of partial power
management
„„
WIRELAID® Production processes
At the beginning of the Wirelaid process, the wires are fixed onto the
under side of the copper foil using resistance welding. The wire is then
welded again at the end of the trace and cut to the appropriate length.
The “Wirelaid copper foil” is then laminated onto a multilayer PCB using
standard production processes. As a result the “Wirelaid copper foil”
forms the external layer of the PCB. Finally the outer tracks are created
using standard PCB processes.
PCB creation and technical specification
When using Wirelaid technology in your PCB stack up, add an additional help layer in Gerber format showing the relevant wires and widths.
top
wirelaid_bottom
(Help layer)
bottom
The combination of “bottom” and
“wirelaid_bottom” represents the
“Wirelaid-copper foil” in the shown stack up.
3
WIRELAID® Design Rules
L1 x B1
Dimensions (minimum)
F 08
250 x 800 µm2
F 14
Pad size
3.5 x 2.5 mm²
3.5 x 3.0 mm²
LB
Track width above wire
1.3 mm
1.9 mm
A1
Distance of pitch between wires of separate potentials
(considering the positioning of the pad)
1.3 mm +
Iso distance*
1.9 mm +
Iso distance*
A2
350 x 1400 µm2
Distance pitch of wires for same potential
1.2 mm
1.8 mm
Smax
Max. length of wire between welding points
80 mm
100 mm
Smin
Min. length of wire between welding points
7.5 mm
7.5 mm
Isolation distance between wire and inner layer
Dependent on the specific stack up of the customer, which we are pleased to create for you.
IL
*Dependent on the thickness of copper layer according to the current Basic Design Guide of Würth Elektronik
L1
LB
A2
A1
B1
Smax
Smin
IL
L2 x B2
D
Dimensions (minimum)
F 08
Pad size for angled tracks
5.4 x 2.8 mm²
6.3 x 3.6 mm²
Min. wire separation distance
0.8 mm
0.8 mm
250 x 800 µm2
F 14
350 x 1400 µm2
B2
L2
4
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D
WIRELAID® 3D Design Rules
Dimensions (minimum)
C
Distance copper to milled edge
F
Width of milled slot
F = 0.4 x (thickness of PCB –R) + 200 µm
K
Solder mask clearance in bending area
1.0 mm
R
Thickness of residual material
Thickness of wire + copper + solder mask + 150 µm
0.3 mm
„„Wires
need to be arranged at right angles to the bending area
„„The usage of an applicable bending (forming) tool is recommended
„„Bending radius ≥ 0.1 mm
„„Care has to be taken so that the bent parts are secured in the installed application to avoid further movement
K
R
F
C
5
Ampacity
Copper thickness: 35 µm base copper + copper plating
Electric current [A]
Wires welded under the external layer
Size & number of
wires
Track width [mm]
Copper thickness: 70 µm base copper + copper plating
Electric current [A]
Size & number of
wires
Track width [mm]
Copper thickness: 35 µm (base copper)
Electric current [A]
Wires welded under the internal layer
Size & number of
wires
Track width [mm]
Copper thickness: 70 µm (base copper)
Electric current [A]
Size & number of
wires
Track width [mm]
The tables above serve as rough guides as the ampacity is determined and influenced by the layout, stack up, assembled components and other factors. Therefore the build-up and
design needs to be evaluated by the product manager for the specific project.
6
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Rise of temperature (ΔT in °C)
Any more questions?
For higher currents, please contact our product management at [email protected]
7
Investigative procedure for the
calculation of the ampacity tables
Test set-up
„„FR4
base material
thickness: 2.2 – 2.5 mm
„„PCB profile: 115 x 80 mm²
„„Equal copper flooding of 40 % on each layer
„„PCB
Wires welded under the external layer
Cu Top
35/70/105 µm*
Prepreg
Cu Layer 2
35/70/105 µm
Prepreg
Cu Layer 3
35/70/105 µm
Prepreg
Cu Bottom
35/70/105 µm*
Wires welded under the internal layer
Cu Top
35/70/105 µm*
Prepreg
Cu Layer 2
35/70/105 µm
Prepreg
Cu Layer 3
35/70/105 µm
Prepreg
Cu Bottom
35/70/105 µm*
For the test set-up the PCBs were measured in a temperature-controlled loading gage at a
constant environmental temperature of 22 C°. Solder pads were used for the power supply. The
different currents are applied for five minutes to stabilise the thermal gradients, after which an
infrared image was recorded.
*including copper plating of 25 µm
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Würth Elektronik GmbH & Co. KG
Circuit Board Technology
Salzstr. 21 · 74676 Niedernhall · Germany
Tel: +49 7940 946-0
Fax: +49 7940 946-550000
[email protected]