Data Sheet

TO
-2
20A
B
PSMN2R2-40PS
N-channel 40 V 2.1 mΩ standard level MOSFET
22 February 2013
Product data sheet
1. General description
Standard level N-channel MOSFET in TO220 package qualified to 175 °C. This product
is designed and qualified for use in a wide range of industrial, communications and
domestic equipment.
2. Features and benefits
•
•
High efficiency due to low switching and conduction losses
Suitable for standard level gate drive sources
3. Applications
•
•
•
•
DC-to-DC convertors
Load switching
Motor control
Server power supplies
4. Quick reference data
Table 1.
Quick reference data
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
-
40
V
ID
drain current
Tmb = 25 °C; VGS = 10 V; Fig. 3; Fig. 1
-
-
100
A
Ptot
total power dissipation
Tmb = 25 °C; Fig. 2
-
-
306
W
-
1.75
2.1
mΩ
-
25
-
nC
Static characteristics
RDSon
drain-source on-state
resistance
VGS = 10 V; ID = 25 A; Tj = 25 °C;
[1]
Fig. 12
Dynamic characteristics
QGD
gate-drain charge
VGS = 10 V; ID = 80 A; VDS = 20 V;
Fig. 14; Fig. 15
[1]
Measured 3 mm from package.
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PSMN2R2-40PS
NXP Semiconductors
N-channel 40 V 2.1 mΩ standard level MOSFET
5. Pinning information
Table 2.
Pinning information
Pin
Symbol Description
1
G
gate
2
D
drain
3
S
source
mb
D
drain
Simplified outline
Graphic symbol
D
mb
G
S
mbb076
1 2 3
TO-220AB (SOT78)
6. Ordering information
Table 3.
Ordering information
Type number
Package
PSMN2R2-40PS
Name
Description
Version
TO-220AB
plastic single-ended package; heatsink mounted; 1 mounting
hole; 3-lead TO-220AB
SOT78
7. Marking
Table 4.
Marking codes
Type number
Marking code
PSMN2R2-40PS
PSMN2R2-40PS
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
40
V
VDGR
drain-gate voltage
Tj ≥ 25 °C; Tj ≤ 175 °C; RGS = 20 kΩ
-
40
V
VGS
gate-source voltage
-20
20
V
ID
drain current
VGS = 10 V; Tmb = 100 °C; Fig. 1
-
100
A
VGS = 10 V; Tmb = 25 °C; Fig. 3; Fig. 1
-
100
A
pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig. 3
-
1122
A
IDM
peak drain current
PSMN2R2-40PS
Product data sheet
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PSMN2R2-40PS
NXP Semiconductors
N-channel 40 V 2.1 mΩ standard level MOSFET
Symbol
Parameter
Conditions
Min
Max
Unit
Ptot
total power dissipation
Tmb = 25 °C; Fig. 2
-
306
W
Tstg
storage temperature
-55
175
°C
Tj
junction temperature
-55
175
°C
Source-drain diode
IS
source current
Tmb = 25 °C
-
100
A
ISM
peak source current
pulsed; tp ≤ 10 µs; Tmb = 25 °C
-
1122
A
VGS = 10 V; Tj(init) = 25 °C; ID = 100 A;
-
1.24
J
Avalanche ruggedness
EDS(AL)S
non-repetitive drain-source
avalanche energy
Vsup ≤ 40 V; unclamped; RGS = 50 Ω
003aak896
300
ID
(A)
250
03aa16
120
Pder
(%)
200
80
150
100
40
(1)
50
0
0
50
100
150
Tj (°C)
(1) Capped at 100 A due to package
Fig. 1.
Continuous drain current as a function of
mounting base temperature
PSMN2R2-40PS
Product data sheet
0
200
Fig. 2.
0
100
150
Tmb (°C)
200
Normalized total power dissipation as a
function of mounting base temperature
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PSMN2R2-40PS
NXP Semiconductors
N-channel 40 V 2.1 mΩ standard level MOSFET
003aad316
104
ID
(A)
Limit RDSon = V DS / ID
103
tp = 10 µs
100 µs
102
(1)
DC
10
1 ms
10 ms
100 ms
1
10-1
Fig. 3.
1
10
102
VDS (V)
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
9. Thermal characteristics
Table 6.
Thermal characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Rth(j-mb)
thermal resistance
from junction to
mounting base
Fig. 4
-
0.25
0.5
K/W
003aad100
1
Zth (j-mb)
(K/W)
10-1
δ = 0.5
0.2
0.1
-2
10
0.05
0.02
P
δ=
tp
T
10-3
single shot
10-4
10-6
Fig. 4.
tp
10-5
10-4
10-3
10-2
10-1
1
t
T
tp (s)
10
Transient thermal impedance from junction to mounting base as a function of pulse duration
PSMN2R2-40PS
Product data sheet
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PSMN2R2-40PS
NXP Semiconductors
N-channel 40 V 2.1 mΩ standard level MOSFET
10. Characteristics
Table 7.
Characteristics
Tested to JEDEC standards where applicable.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
drain-source
breakdown voltage
ID = 250 µA; VGS = 0 V; Tj = -55 °C
36
-
-
V
ID = 250 µA; VGS = 0 V; Tj = 25 °C
40
-
-
V
gate-source threshold
voltage
ID = 1 mA; VDS = VGS; Tj = -55 °C;
-
-
4.6
V
1
-
-
V
2
3
4
V
VDS = 40 V; VGS = 0 V; Tj = 25 °C
-
-
10
µA
VDS = 40 V; VGS = 0 V; Tj = 125 °C
-
-
200
µA
VGS = 20 V; VDS = 0 V; Tj = 25 °C
-
-
100
nA
VGS = -20 V; VDS = 0 V; Tj = 25 °C
-
-
100
nA
VGS = 10 V; ID = 25 A; Tj = 100 °C;
-
2.4
2.85
mΩ
-
3.25
3.9
mΩ
-
1.75
2.1
mΩ
f = 1 MHz
-
1
-
Ω
ID = 0 A; VDS = 0 V; VGS = 10 V
-
110
-
nC
ID = 80 A; VDS = 20 V; VGS = 10 V;
-
130
-
nC
Fig. 14; Fig. 15
-
42
-
nC
Static characteristics
V(BR)DSS
VGS(th)
Fig. 10
ID = 1 mA; VDS = VGS; Tj = 175 °C;
Fig. 10
ID = 1 mA; VDS = VGS; Tj = 25 °C;
Fig. 11; Fig. 10
IDSS
IGSS
RDSon
drain leakage current
gate leakage current
drain-source on-state
resistance
Fig. 12; Fig. 13
VGS = 10 V; ID = 25 A; Tj = 175 °C;
Fig. 12; Fig. 13
VGS = 10 V; ID = 25 A; Tj = 25 °C;
[1]
Fig. 12
RG
internal gate
resistance (AC)
Dynamic characteristics
QG(tot)
total gate charge
QGS
gate-source charge
QGS(th)
pre-threshold gatesource charge
-
24
-
nC
QGS(th-pl)
post-threshold gatesource charge
-
18
-
nC
QGD
gate-drain charge
-
25
-
nC
VGS(pl)
gate-source plateau
voltage
ID = 80 A; VDS = 20 V; Fig. 14; Fig. 15
-
4.95
-
V
Ciss
input capacitance
VDS = 20 V; VGS = 0 V; f = 1 MHz;
-
8423
-
pF
output capacitance
Tj = 25 °C; Fig. 16
-
1671
-
pF
Coss
PSMN2R2-40PS
Product data sheet
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PSMN2R2-40PS
NXP Semiconductors
N-channel 40 V 2.1 mΩ standard level MOSFET
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Crss
reverse transfer
capacitance
-
814
-
pF
td(on)
turn-on delay time
VDS = 20 V; RL = 0.25 Ω; VGS = 10 V;
-
33.2
-
ns
RG(ext) = 1.5 Ω
tr
rise time
-
40.4
-
ns
td(off)
turn-off delay time
-
66.6
-
ns
tf
fall time
-
25.2
-
ns
Source-drain diode
VSD
source-drain voltage
IS = 25 A; VGS = 0 V; Tj = 25 °C; Fig. 17
-
0.85
1.2
V
trr
reverse recovery time
IS = 25 A; dIS/dt = -100 A/µs; VGS = 0 V;
-
53.7
-
ns
-
80.75
-
nC
VDS = 20 V
Qr
recovered charge
IS = 25 A; dIS/dt = -100 A/µs; VGS = 0 V;
VDS = 20 V; Tj = 25 °C
[1]
300
ID 20
(A) 10
250
8
Measured 3 mm from package.
003aad116
6
VGS (V) = 5.5
003aad118
250
ID
(A)
200
200
150
5
150
175 °C
100
25 °C
100
50
0
Fig. 5.
50
4.5
0
1
2
3
VDS (V)
0
4
Output characteristics: drain current as a
Fig. 6.
function of drain-source voltage; typical values
PSMN2R2-40PS
Product data sheet
0
3
4.5
VGS (V)
6
Transfer characteristics: drain current as a
function of gate-source voltage; typical values
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PSMN2R2-40PS
NXP Semiconductors
N-channel 40 V 2.1 mΩ standard level MOSFET
003aad122
12000
C
(pf)
10000
003aad123
250
gfs
(S)
C iss
200
8000
150
Crss
6000
100
4000
50
2000
10-1
Fig. 7.
1
VGS (V)
0
10
Input and reverse transfer capacitances as a
function of gate-source voltage; typical values
Fig. 8.
003aad124
30
RDS(on)
(mΩ)
25
0
50
100
150
ID (A)
200
Forward transconductance as a function of
drain current; typical values
003aad280
5
VGS(th)
(V)
4
max
20
3
typ
15
2
min
10
1
5
0
Fig. 9.
0
5
10
15
VGS (V)
0
- 60
20
Drain-source on-state resistance as a function
of gate-source voltage; typical values
PSMN2R2-40PS
Product data sheet
0
60
120
Tj (°C)
180
Fig. 10. Gate-source threshold voltage as a function of
junction temperature
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PSMN2R2-40PS
NXP Semiconductors
N-channel 40 V 2.1 mΩ standard level MOSFET
03aa35
10- 1
ID
(A)
min
10- 2
typ
003aad117
6
VGS (V) = 5
RDSon
(mΩ)
5
max
10- 3
4
10- 4
3
5.5
6
10- 5
2
8
20
10- 6
0
2
4
VGS (V)
1
6
Fig. 11. Sub-threshold drain current as a function of
gate-source voltage
10
0
50
100
150
200
250
300
ID (A)
Fig. 12. Drain-source on-state resistance as a function
of drain current; typical values
03aa27
2
VDS
a
ID
1.5
VGS(pl)
VGS(th)
1
VGS
QGS1
0.5
QGS2
QGS
QGD
QG(tot)
003aaa508
0
- 60
0
60
120
Tj (° C)
Fig. 14. Gate charge waveform definitions
180
Fig. 13. Normalized drain-source on-state resistance
factor as a function of junction temperature
PSMN2R2-40PS
Product data sheet
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PSMN2R2-40PS
NXP Semiconductors
N-channel 40 V 2.1 mΩ standard level MOSFET
003aad120
10
VGS
(V)
8
003aad121
12000
C
(pF)
VDS = 10 V
6
Ciss
8000
VDS = 20V
4
4000
2
C oss
0
0
50
100
QG (nC)
Crss
0
10-1
150
1
10
VDS (V)
102
Fig. 16. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
Fig. 15. Gate-source voltage as a function of gate
charge; typical values
003aad119
100
IS
(A)
80
60
40
20
0
25 °C
Tj = 175 °C
0
0.2
0.4
0.6
0.8
Vsd (V)
1
Fig. 17. Source current as a function of source-drain voltage; typical values
PSMN2R2-40PS
Product data sheet
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PSMN2R2-40PS
NXP Semiconductors
N-channel 40 V 2.1 mΩ standard level MOSFET
11. Package outline
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB
SOT78
E
A
A1
p
q
mounting
base
D1
D
L1(1)
L2(1)
Q
L
b1(2)
(3×)
b2(2)
(2×)
1
2
3
b(3×)
e
c
e
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
b
b1(2)
b2(2)
c
D
D1
E
e
L
L1(1)
L2(1)
max.
p
q
Q
mm
4.7
4.1
1.40
1.25
0.9
0.6
1.6
1.0
1.3
1.0
0.7
0.4
16.0
15.2
6.6
5.9
10.3
9.7
2.54
15.0
12.8
3.30
2.79
3.0
3.8
3.5
3.0
2.7
2.6
2.2
Notes
1. Lead shoulder designs may vary.
2. Dimension includes excess dambar.
OUTLINE
VERSION
SOT78
REFERENCES
IEC
JEDEC
JEITA
3-lead TO-220AB
SC-46
EUROPEAN
PROJECTION
ISSUE DATE
08-04-23
08-06-13
Fig. 18. Package outline TO-220AB (SOT78)
PSMN2R2-40PS
Product data sheet
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PSMN2R2-40PS
NXP Semiconductors
N-channel 40 V 2.1 mΩ standard level MOSFET
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
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Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Document
status [1][2]
Product
status [3]
Objective
[short] data
sheet
Development This document contains data from
the objective specification for product
development.
Preliminary
[short] data
sheet
Qualification
This document contains data from the
preliminary specification.
Product
[short] data
sheet
Production
This document contains the product
specification.
[1]
[2]
[3]
Definition
Please consult the most recently issued document before initiating or
completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the Internet at URL http://www.nxp.com.
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subject to formal approval, which may result in modifications or additions.
NXP Semiconductors does not give any representations or warranties as to
the accuracy or completeness of information included herein and shall have
no liability for the consequences of use of such information.
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with the same product type number(s) and title. A short data sheet is
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is deemed to offer functions and qualities beyond those described in the
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Limited warranty and liability — Information in this document is believed
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or completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
PSMN2R2-40PS
Product data sheet
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make changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
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Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
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representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
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Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
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PSMN2R2-40PS
NXP Semiconductors
N-channel 40 V 2.1 mΩ standard level MOSFET
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12.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,
ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,
QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,
TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.
PSMN2R2-40PS
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PSMN2R2-40PS
NXP Semiconductors
N-channel 40 V 2.1 mΩ standard level MOSFET
13. Contents
1
General description ............................................... 1
2
Features and benefits ............................................1
3
Applications ........................................................... 1
4
Quick reference data ............................................. 1
5
Pinning information ............................................... 2
6
Ordering information ............................................. 2
7
Marking ................................................................... 2
8
Limiting values .......................................................2
9
Thermal characteristics .........................................4
10
Characteristics ....................................................... 5
11
Package outline ................................................... 10
12
12.1
12.2
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Legal information .................................................11
Data sheet status ............................................... 11
Definitions ...........................................................11
Disclaimers .........................................................11
Trademarks ........................................................ 12
© NXP B.V. 2013. All rights reserved
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 22 February 2013
PSMN2R2-40PS
Product data sheet
All information provided in this document is subject to legal disclaimers.
22 February 2013
© NXP B.V. 2013. All rights reserved
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