PHILIPS TDA9178T

INTEGRATED CIRCUITS
DATA SHEET
TDA9178
YUV one chip picture improvement
based on luminance vector-, colour
vector- and spectral processor
Preliminary specification
File under Integrated Circuits, IC02
1999 Sep 24
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
FEATURES
• Picture content dependent non-linear Y, U and V
processing by luminance histogram analysis
• Variable gamma control
• Adaptive black and white stretch control
• Skin tone correction
The adaptive black stretch function of the TDA9178 offers
the possibility of having a larger ‘weight’ for the black parts
of the video signal; the white stretch function offers an
additional overall gain for increased light production.
• Green enhancement
• Blue stretch
• Luminance Transient Improvement (LTI)
To maintain a proper colour reproduction, the saturation of
the U- and V-colour difference signals is also controlled as
a function of the actual non-linearity in the luminance
channel.
• Smart peaking for detail enhancement
• Colour Transient Improvement (CTI)
• SCAn VElocity Modulation (SCAVEM) output
• Line Width Control (LWC)
In the colour vector processor, the dynamic skin tone
correction locally changes the hue of colours that match
skin tones to the correct hue. The green enhancement
circuit activates medium saturated green towards to more
saturated green. The blue stretch circuit can be activated
which shifts colours near white towards blue.
• Video Dependent Coring (VDC)
• Colour Dependent Sharpness (CDS)
• Noise measurement
• Feature Mode (FM) detector
• Cue Flash (CF) detector
The spectral processor provides 1D luminance transient
improvement, luminance detail enhancement by smart
peaking and a 1 D colour transient improvement.
The TDA9178 can be used as a cost effective alternative
to (but also in combination with) scan velocity modulation.
• Three additional pins for access to 6-bit ADC and
I2C-bus
• Adjustable chrominance delay
• TV standard independent
In the spectral processor line width control (or aperture
control) can be user defined. The TDA9178 is capable of
adjusting the amount of coring according to the video level
with the video dependent coring. The TDA9178 is also
capable to give extra sharpness in the cases of saturated
red and magenta parts of the screen using the colour
dependent sharpness feature.
• I2C-bus controlled
• 1fH and 2fH
• DEmonstration MOde (DEMO).
GENERAL DESCRIPTION
The TDA9178 is a transparent analog video processor
with YUV input and output interfaces. It offers three main
functions: luminance vector processing, colour vector
processing and spectral processing. Beside these three
main functions, there are some additional functions.
An embedded noise detector measures noise during the
field retrace in parts which are expected to be free from
video or text information. With the noise detector a variety
of ‘smart noise control’ architectures can be set up.
A feature mode detector is available for detecting signal
sources like VCR (in still picture mode) that re-insert the
levels of the retrace part. For this kind of signals the noise
measurement of the TDA9178 is not reliable.
In the luminance vector processor, the luminance transfer
function is controlled in a non-linear way by the
distribution, in 5 discrete histogram sections, of the
luminance values measured in a picture. As a result, the
contrast ratio of the most important parts of the scene will
be improved. Black restoration is available in the event of
a set-up in the luminance signal.
An output signal (on the I2C-bus and on a separate pin) is
available that detects when the picture content has been
changed significantly, called cue flash.
A variable gamma function, after the histogram
conversion, offers the possibilities of alternative brightness
control or factory adjustment of the picture tube.
An embedded 6-bit ADC can be used for interfacing three
analog low frequency voltage signals (e.g. ambient light
control or beam current voltage level) to the I2C-bus.
1999 Sep 24
2
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
In the demonstration mode all the features selected by the user are automatically toggled between on and off.
The TDA9178 concept has a maximum flexibility which can be controlled by the embedded I2C-bus. The supply voltage
is 8 V. The device is mounted in a 24-lead SDIP package, or in a 24-lead SO package.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VCC
supply voltage
7.2
8.0
8.8
V
Vi(Y)
luminance input voltage (excluding sync) AMS = 0
−
0.315
0.45
V
AMS = 1
−
1.0
1.41
V
Vi(UV)
UV input voltage
−
−
1.9
V
VFS(ADC)
full-scale ADC input voltage
−
2.0
−
V
ORDERING INFORMATION
TYPE
NUMBER
TDA9178
TDA9178T
1999 Sep 24
PACKAGE
NAME
SDIP24
SO24
DESCRIPTION
VERSION
plastic shrink dual in-line package; 24 leads (400 mil)
SOT234-1
plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
3
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13
luminance vector processing
21
spectral processing
SOUT
SMART PEAKING
YIN
UIN
VIN
6
8
9
Y
INPUT
STAGE
U, V
LUMINANCE TRANSIENT
IMPROVEMENT
LUMINANCE
PROCESSING
VIDEO DEPENDENT
CORING
black stretch
histogram processing
gamma control
VCC
4
VEE
SC
SATURATION
CORRECTION
15
OUTPUT
STAGE
19
17
16
DELAY
CONTROL
20
18
SUPPLY
24
1
WINDOW
GENERATION
skin tone correction
green enhancement
blue stretch
23
COLOUR
PROCESSING
22
NOISE
MEASURING
10
CALIBRATE
cue flash
FEATURE
MODE
DETECTION
SDA
SCL
ANALOG
TO
DIGITAL
CONVERTER
3
4
5
n.c.
n.c.
CF
n.c.
ADEXT1
ADEXT2
ADEXT3
7
14
11
I2C-BUS CONTROL
Fig.1 Block diagram.
TDA9178
MGR897
Preliminary specification
ADR
UOUT
VOUT
COLOUR TRANSIENT
IMPROVEMENT
2
TP
YOUT
COLOUR DEPENDENT
SHARPNESS
colour vector
processing
DECDIG
+
Philips Semiconductors
12
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
n.c.
BLOCK DIAGRAM
handbook, full pagewidth
1999 Sep 24
n.c.
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
PINNING
SYMBOL
PIN
SYMBOL
DESCRIPTION
PIN
DESCRIPTION
SC
1
sandcastle input
n.c.
13
not connected
n.c.
2
not connected
SDA
14
serial data input/output (I2C-bus)
ADEXT1
3
ADC input 1
DECDIG
15
decoupling digital supply
ADEXT2
4
ADC input 2
VOUT
16
V signal output
ADEXT3
5
ADC input 3
UOUT
17
U signal output
YIN
6
luminance input
VEE
18
ground
ADR
7
address selection input
YOUT
19
luminance output
UIN
8
U signal input
VCC
20
supply voltage
VIN
9
V signal input
SOUT
21
SCAVEM output
TP
10
test pin
CF
22
cue flash output
SCL
11
serial clock input (I2C-bus)
n.c.
23
not connected
n.c.
12
not connected
n.c.
24
not connected
handbook, halfpage
handbook, halfpage
SC 1
24 n.c.
SC 1
24 n.c.
n.c. 2
23 n.c.
n.c. 2
23 n.c.
ADEXT1 3
22 CF
ADEXT1 3
22 CF
ADEXT2 4
21 SOUT
ADEXT2 4
21 SOUT
ADEXT3 5
20 VCC
ADEXT3 5
20 VCC
19 YOUT
YIN 6
TDA9178T
18 VEE
ADR 7
18 VEE
ADR 7
UIN 8
17 UOUT
UIN 8
17 UOUT
VIN 9
16 VOUT
VIN 9
16 VOUT
15 DECDIG
TP 10
SCL 11
n.c. 12
15 DECDIG
TP 10
14 SDA
SCL 11
13 n.c.
n.c. 12
MGR898
14 SDA
13 n.c.
MGR899
Fig.2 Pin configuration (SOT234-1).
1999 Sep 24
19 YOUT
YIN 6
TDA9178
Fig.3 Pin configuration (SOT137-1).
5
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
FUNCTIONAL DESCRIPTION
Each field the capacitors are discharged and the
measurement starts all over again.
Y input selection and amplification
Parts in the scene that do not contribute to the information
in that scene, like sub or side titles, should be omitted from
the histogram measurement. No measurements are
performed outside the internal fixed window period.
The gain of the luminance input amplifier and output
amplifier can be adjusted to signal amplitudes of
0.315 and 1.0 V typically (excluding sync) by I2C-bus
bit AMS. The sync part is processed transparently to the
output, independently of the feature settings.
The Y, U and V input signals are clamped during the
burstkey period, defined by the sandcastle reference and
should be DC-coupled (the circuit uses internal clamp
capacitors). During the clamp pulse (see Figs 7, 8, 9
and 10) an artificial black level is inserted in the Y input
signal to correctly preset the internal circuitry.
Very rapid picture changes, also related to the field
interlace, can result in flicker effects. The histogram values
are averaged at the field rate thus cancelling the flicker
effects.
Adaptive black stretch
The so-called adaptive black stretch gain is one of the
factors that control the gamma of the picture. This gain is
controlled by the measured black offset value in the black
stretch circuit and the I2C-bus adaptive black stretch DAC:
bits BT5 to BT0. For pictures with no black offset the black
stretch gain equals unity so the gamma is not changed and
the DAC setting has no influence. In case of a black offset,
the black stretch gain is increased so the gamma of the
picture is reduced. This procedure results in a maximum of
visible details over the whole range of luminances.
However, depending on personal taste, sometimes higher
values of gamma are preferred. Therefore the amount of
gamma reduction can be adjusted by the DAC.
Luminance vector processor
In the luminance vector processor the transfer is controlled
by a black stretch, the histogram processing and a gamma
control circuit. The luminance vector processor also
creates the cue flash signal.
BLACK STRETCH
A black detector measures and stores the level of the most
black part of the scene within an internal defined fixed
window in each field into a time constant. The time
constant and the response time of the loop are internally
fixed. Any difference between this value and the value
measured during the clamp is regarded as black offset.
In a closed loop offsets until a predefined value of the fullscale value are fed back to the input stage for
compensation. The loop gain is a function of the histogram
and variable gamma settings. The black offset correction
can be switched on and off by the I2C-bus bit BON.
Related to the corrected black offset the nominal signal
amplitude is set again to 100% full scale through an
amplitude stretch function. Luminance values beyond full
scale are unaffected. Additionally, the measured black
offset is also used to set the adaptive black stretch gain
(see also Section “Adaptive black stretch”).
Adaptive white-point stretching
For pictures with many details in white parts, the histogram
conversion procedure makes a transfer with large gain in
the white parts. The amount of light coming out of the
scene is reduced accordingly. The white stretcher
introduces additional overall gain for increased light
production, and so violating the principle of having a
full-scale reference. The white-point stretching can be
switched on or off by means of the I2C-bus bit WPO.
Standard deviation
For scenes in which segments of the histogram distribution
are very dominant with respect to the others, the non-linear
amplification should be reduced in comparison to scenes
with a flat histogram distribution. The standard deviation
detector measures the spread of the histogram distribution
and modulates the user setting of the non-linear amplifier.
HISTOGRAM PROCESSING
For the luminance signal the histogram distribution is
measured in real-time over five segments within an
internally defined fixed window in each field. During the
period that the luminance is in one segment, a
corresponding internal capacitor is loaded by a current
source. At the end of the field five segment voltages are
stored into on-board memories. The voltages stored in the
memories determine the non-linear processing of the
luminance signal to achieve a picture with a maximum of
information (visible details).
1999 Sep 24
TDA9178
Non-linear amplifier
The stored segment voltages determine the individual gain
of each segment in such a way that continuity is granted
for the complete luminance range.
6
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
The maximum and minimum gain of each segment is
limited. Apart from the adaptive white-point stretching the
black and white references are not affected by the
non-linear processing. The amount of non-linearity can be
controlled by the I2C-bus non-linearity DAC:
bits NL5 to NL0.
TDA9178
It comprises three main processing units: the step
improvement processor, the contour processor and the
smart sharpness controller.
Transient improvement processor
The step improvement processor (see Fig.11) comprises
two main functions:
VARIABLE GAMMA
• MINMAX generator
On top of the histogram conversion a variable gamma
function is applied for an alternative brightness control, or
for factory adjustment. It is intended as an alternative for
the DC-offset of the classic brightness user control.
It maintains the black and white references. The gamma
ranges from 0.5 to 1.5. The gamma can be set by the
I2C-bus variable gamma DAC: bits VG5 to VG0.
• MINMAX fader.
The MINMAX generator utilizes all taps of an embedded
luminance delay line to calculate the minimum and
maximum envelope of all signals momentarily stored in the
delay line. The MINMAX fader chooses between the
minimum and maximum envelopes, depending on the
polarity of a decision signal derived from the contour
processor. Figures 12, 13 and 14 show some waveforms
of the step improvement processor and illustrate that fast
transients result with this algorithm. The MINMAX
generator also outputs a signal that represents the
momentary envelope of the luminance input signal.
This envelope information is used by the smart sharpness
controller.
CUE FLASH
In the present TV environment there is a lot of measured
information like ambient light and noise. This information
can be used to make an update of settings of the several
algorithms after a picture has changed. The cue flash
signal detects when a picture changes significantly. When
the picture content has changed, the I2C-bus bit CF is set
to logic 1 in the status register. After reading the status
register, bit CF is reset to logic 0. On the output pin CF the
cue flash information is present (active LOW) for only one
line in the vertical retrace part. This pin is configured as an
open drain output and therefore should be pulled up to the
5 V supply.
Line width control (also called aperture control) can be
performed by I2C-bus line width DAC: bits LW5 to LW0.
This control can be used to compensate for horizontal
geometry errors caused by the gamma, for blooming of the
spot of the CRT, or for compensating SCAVEM.
Contour processor
Spectral processor
The contour processor comprises two contour generators
with different frequency characteristics. The contour
generator generates a second-order derivative of the
incoming luminance signal which is supplied to the smart
sharpness controller. In the smart sharpness controller,
this signal is added to the properly delayed original
luminance input signal, making up the peaking signal for
detail enhancement. The peaking path features a low
peaking frequency of 2 MHz (at 1fH), or a high peaking
frequency of 3 MHz (at 1fH), selectable by I2C-bus
bit CFS.
In the spectral processor the luminance transfer is
controlled by smart peaking, colour dependent sharpness
and luminance transient improvement, defined by the
sharpness improvement processor. The colour transfer is
controlled by a colour transient improvement circuit; an
additional output is available to provide a SCAVEM circuit.
ADJUSTABLE CHROMINANCE DELAY
The colour vector processor drives a delay line for
correcting delay errors between the luminance input signal
and the chrominance input signals (U and V).
The chrominance delay can be adjusted in 6 steps of
12 ns (1fH) or 6 ns (2fH) by the I2C-bus bits CD2 to CD0.
The contour generators utilize three taps of the embedded
luminance delay line. Figure 15 illustrates the normalized
frequency transfer of the filter.
SHARPNESS IMPROVEMENT PROCESSOR
The sharpness improvement processor increases the
slope of large luminance transients of vertical objects and
enhances transients of details in natural scenes by contour
correction.
1999 Sep 24
7
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
Smart sharpness controller
The smart peaking algorithm has been designed such that
the luminance output amplitude will never exceed 110% of
the luminance input signal amplitude. Therefore the
normal peaking range (12 dB) will be reduced at large
transients, and in case of colour dependent sharpness
there is even more reduction.
The smart sharpness controller (see Fig.16) is a fader
circuit that fades between peaked luminance and
step-improved luminance, controlled by the output of a
step discriminating device known as the step detector.
It also contains a variable coring level stage.
However, by setting bit OSP (Overrule Smart Peaking)
one can undo the extra peaking reduction in case of colour
dependant sharpness. It must be emphasized that setting
OSP may lead to unwanted large luminance output
signals, for instance in details in red coloured objects.
The step detector is basically a differentiator, so both
amplitude of the step and its slope add to the detection
criterion. The smart sharpness controller has four user
controls:
• Steepness control, performed by the I2C-bus DAC:
bits SP5 to SP0
• Peaking control, performed by the
bits PK5 to PK0
I2C-bus
COLOUR TRANSIENT IMPROVEMENT
DAC:
The colour transient improvement circuit (see Fig.17)
increases the slope of the colour transients of vertical
objects. Each channel of the CTI circuit basically consists
of two delay cells: an electronic potentiometer and an edge
detector circuit that controls the wiper position of the
potentiometer. Normally the wiper of the potentiometer will
be in position B (mid position), so passing the input
signal B to the output with a single delay. The control
signal is obtained by the signals A and C.
• Video dependent coring, switched on or switched off by
the I2C-bus bit VDC
• Coring level control, performed by the I2C-bus DAC:
bits CR5 to CR0.
The steepness setting controls the amount of steepness in
the edge-correction processing path.
The peaking setting controls the amount of contour
correction for proper detail enhancement. The envelope
signal generated by the step improvement processor
modulates the peaking setting in order to reduce the
amount of peaking for large sine wave excursions.
When an edge occurs the value of the control signal will
fade between +1 and −1 and finally will become zero
again. A control signal value of +1 fades the wiper in
position C, passing the two times delayed input signal to
the output. A control signal of −1 fades the wiper in
position A, so an undelayed input signal is passed to the
output. The result is an output signal which has steeper
edges than the input signal. Contrary to other existing
CTI algorithms, the transients remain time correct with
respect to the luminance signal, as the algorithm steepens
edges proportionally, without discontinuity.
With video dependent coring, it is possible to have more
reduction of the peaking in the black parts of a scene than
in the white parts, and therefore automatically reducing the
visibility of the background noise.
The coring setting controls the coring level in the peaking
path for rejection of high-frequency noise.
SCAVEM
All four settings facilitate reduction of the impact of the
sharpness features, e.g. for noisy luminance signals.
A luminance output is available for SCAVEM processing.
This luminance signal is not affected by the spectral
processing functions.
COLOUR DEPENDENT SHARPNESS
The colour dependent sharpness circuit increases the
luminance sharpness in saturated red and magenta parts
of the screen. Because of the limited bandwidth of the
colour signals, there is no need to increase the high
frequencies of the colour signals. Instead, the details in the
luminance signal will be enhanced. In this circuit a limited
number of colours are enhanced (red and magenta).
Contrary to normal peaking algorithm, extra gain is applied
for low frequencies (2 MHz at 1fH). This is needed,
because the information that is lacking below 2 MHz (at
1fH) is most important. In large coloured parts the normal
peaking is still active to enhance the fine details.
1999 Sep 24
TDA9178
Colour vector processor
The colour processing part contains skin tone correction,
green enhancement and blue stretch. The colour vector
processing is dependent on the amplitude and sign of the
colour difference signals. Therefore, both the polarity and
the nominal amplitude of the colour difference signals are
relevant when using the colour vector processor facility.
8
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
The enclosed correction area can be increased to 140% by
the I2C-bus bit SBL (so-called: Size). The blue stretch can
be switched on or off by the I2C-bus bit DBL.
SKIN TONE CORRECTION
Skin tones are very sensitive for transmission (hue) errors,
because we have an absolute feeling for skin tones.
To make a picture look free of hue error, the goal is to
make sure that skin tones are put at a correct colour.
SATURATION CORRECTION
The non-linear luminance processing done by the
histogram modification and variable gamma, influences
the colour reproduction; mainly the colour saturation.
Therefore, the U and V signals are linear processed for
saturation compensation.
The dynamic skin tone correction circuit achieves this goal
by instantaneously and locally changing the hue of those
colours which are located in the area in the UV plane that
matches skin tones (see Fig.4).
The correction is dependent on luminance, saturation and
distance to the preferred axis and can be done towards
two different angles. The preferred angle can be chosen by
bit ASK in the I2C-bus settings. The settings are
123° (ASK = 0) and 117° (ASK = 1). The enclosed
correction area can be increased to 140% with the I2C-bus
bit SSK (so-called: Size). The enclosed detection ‘angle’ of
the correcting area can be increased to 160% with the
I2C-bus bit WSK (so-called: Width). The skin tone
correction can be switched on or off with the I2C-bus
bit DSK.
Noise measuring
A video line which is supposed to be free from video
information (‘empty line’) is used to measure the amount of
noise. The measured RMS value of the noise can be used
for reducing several features, by the I2C-bus interface,
such as luminance vector processing and spectral
processing. For the TDA9178 the empty line is chosen
three lines after recognition of the vertical blanking from
the sandcastle pulse input. Figures 7, 8, 9 and 10 show
the measurement locations for different broadcast norms.
GREEN ENHANCEMENT
The noise detector is capable of measuring the
signal-to-noise ratio between −45 and −20 dB. The output
scale runs linearly with dB. The noise samples are
averaged for over 20 fields to reduce the fluctuations in the
measurement process. It is obvious, that for signal
sources (like VCR in still picture mode) that re-insert the
levels of the retrace part, the measurement is not reliable
(see Section “Feature mode detector”). The result of the
averaging process will update the contents of the I2C-bus
register: bits ND5 to ND0 at a rate of 1⁄32 of the field
frequency. If a register access conflict occurs, the data of
the noise register is made invalid by setting the flag bit DV
(Data Valid) to zero.
The green enhancement circuit (see Fig.5) is intended to
shift low saturated green colours towards more saturated
green colours. This shift is achieved by instantaneously
and locally changing those colours which are located in the
area in the UV plane that matches low saturated green.
The saturation shift is dependent on the luminance,
saturation and distance to the detection axis of 208°.
The direction of shift in the colour is fixed by hardware.
The amount of green enhancement can be increased to
160% by the I2C-bus bit GGR. The enclosed detection
‘angle’ of the correcting area can be increased to 160%
with the I2C-bus bit WGR (so-called: Width). The enclosed
correction area can be increased to 140% with the I2C-bus
bit SGR (so-called: Size). The green enhancement can be
switched on or switched off with the I2C-bus bit DGR.
Feature mode detector
A detector is available for detecting signal sources (like
VCR in still picture mode) that re-inserted the levels of the
retrace part. For this kind of signals the noise
measurement of the TDA9178 is not reliable, but this
detector sets bit FM in the ND-register to logic 1.
For normal video signals bit FM is set to logic 0.
This circuit measures transients (like synchronization
pulses) on the luminance input during the internal V-pulse.
The feature mode detector is setting bit FM to logic 1 when
no transients are present during 2 lines in the vertical
retrace part over 3 fields (like the synchronization pulses).
BLUE STRETCH
The blue stretch circuit (see Fig.6) is intended to shift
colours near white towards more blueish coloured white to
give a brighter impression. This shift is achieved by
instantaneously and locally changing those colours which
are located in the area in the UV plane that matches
colours near white. The shift is dependent on the
luminance and saturation. The direction of shift (towards
an angle of 330°) in the colour is fixed by hardware.
The amount of blue stretch can be increased to 160% by
the I2C-bus bit GBL.
1999 Sep 24
TDA9178
9
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
Successive approximation ADC
I2C-bus
Pins ADEXT1, ADEXT2 and ADEXT3 are connected to a
6-bit successive approximation ADC via a multiplexer.
The multiplexer toggles between the inputs with each field.
At each field flyback, a conversion is started for two of the
three inputs and the result is stored in the corresponding
bus register ADEXT1, ADEXT2 or ADEXT3. The input pin
ADEXT1 is updated every field, while input fields
ADEXT2 and ADEXT3 are updated once in two
consecutive fields (see Figs 7, 8, 9 and 10). Once in
32 fields the ADEXT2 input is not updated, because then
the noise measurement is updated.
The I2C-bus is always in standby mode and responds on a
properly addressed command. Bit PDD (Power-Down
Detected) in the status register is set each time an
interruption of the power supply occurs and is reset only by
reading the status register. A 3-bit identification code can
also be read from the status register, which code can be
used to automatically configure the application by
software.
The input control registers can be written sequentially by
the I2C-bus by the embedded automatic subaddress
increment feature or by addressing them directly.
The output control functions cannot be addressed
separately. Reading out the output control functions
always starts at subaddress 00H and all subsequent
words are read out by the automatic subaddress
increment procedure.
In this way, any slow varying analog signal can be given
access to the I2C-bus. If a register access conflict occurs,
the data of that register is made invalid by setting the flag
bit DV (Data Valid) to zero.
Smart noise control
The bits in the I2C-bus are preset to logic 0 at power-on
except for bits AMS and VG5: therefore the TDA9178 is in
1.0 V luminance signal range and the variable gamma is
set to 20H (gamma correction 0%).
With the help of the internal noise detector and a
user-preferred noise algorithm, the user can make a fully
automatic I2C-bus feature reduction, briefly called ‘Smart
Noise Control’.
Demonstration mode
I2C-BUS SPECIFICATION
By the I2C-bus bit DEM all the picture improvement
features can be demonstrated in one picture. By setting
bit DEM to logic 1, all the features selected by the user are
active for 5 s in 1fH mode (in 2fH mode: 2.5 s), and for
another 5 s in 1fH mode (in 2fH mode: 2.5 s) all features
selected are turned off (then the TDA9178 is ‘transparent’
to the incoming signal).
The slave address of the IC is given in Table “Slave
address”. If pin ADR of the TDA9178 is connected to
ground, the I2C-bus address is 40H; if pin ADR is
connected to pin DECDIG, the I2C-bus address is E0H.
The circuit operates on clock frequencies up to 400 kHz.
Slave address
Internal window
To determine the histogram levels and the black offset the
TDA9178 performs several measurements. An internally
defined window serves to exclude parts in the scene like
‘subtitling’ or ‘logos’. The internal window can be regarded
as a weighting function which has a value of one within a
square near the centre of the screen and which gradually
decreases to zero towards the edges.
A5
A4
A3
A2
A1
A0
R/W
ADR
1
ADR
0
0
0
0
X
Auto-increment mode is available for subaddresses.
When bit WLB (Window Letter Box) is made logic 1, the
height of the window is reduced by a factor of 2⁄3.
This prevents the contribution of the black bars above and
below a 16 : 9 scene to the measurements.
1999 Sep 24
A6
10
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
Control functions
DATA BYTE
FUNCTIONS
TYPE
SUBADDRESS
D7
D6
D5
D4
D3
D2
D1
D0
00
DEM
VDC
WLB
FHS
CFS
LDH
0
AMS
Control 2
01
0
0
OSP
WPO
0
CD2
CD1
CD0
Control 3
02
SGR
WGR
GGR
DGR
SSK
WSK
ASK
DSK
Control 4
03
0
0
BON
CTI
CDS
SBL
GBL
DBL
04
0
0
BT5
BT4
BT3
BT2
BT1
BT0
Non-linearity amplifier
05
0
0
NL5
NL4
NL3
NL2
NL1
NL0
Variable gamma
06
0
0
VG5
VG4
VG3
VG2
VG1
VG0
Peaking
07
0
0
PK5
PK4
PK3
PK2
PK1
PK0
Inputs
Control 1
Adaptive black stretch
REG
DAC
Steepness
08
0
0
SP5
SP4
SP3
SP2
SP1
SP0
Coring
09
0
0
CR5
CR4
CR3
CR2
CR1
CR0
Line width
0A
0
0
LW5
LW4
LW3
LW2
LW1
LW0
00
X
X
X
CF
ID2
ID1
ID0
PDD
Noise detection
01
FM
DV
ND5
ND4
ND3
ND2
ND1
ND0
ADEXT1 (output)
02
X
DV
AD5
AD4
AD3
AD2
AD1
AD0
ADEXT2 (output)
03
X
DV
AD5
AD4
AD3
AD2
AD1
AD0
ADEXT3 (output)
04
X
DV
AD5
AD4
AD3
AD2
AD1
AD0
Outputs
Status
1999 Sep 24
REG
11
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
Table 8
Input signals
Table 1
Amplitude mode selection
AMS
FUNCTION
0
0.315 V luminance (black to white) at
YIN
1
1.0 V luminance (black to white) at YIN
Chrominance delay
CD2
CD1
CD0
0
0
0
40 ns at 1fH or 20 ns at 2fH
1
1
1
−32 ns at 1fH or +16 ns at 2fH
Table 9
FUNCTION
Overrule smart peaking
OSP
Table 2
Luminance determined histogram
LDH
histogram segments fixed
1
histogram segments determined by peak
white
FUNCTION
0
smart peaking (maximum peaking
reduced if Coxing)
1
overrule smart peaking
FUNCTION
0
Table 10 White-point stretch on/off
WPO
Table 3
Contour filter selection
CFS
FUNCTION
peaking frequency is 2 MHz at 1fH or
4 MHz at 2fH
0
1
Table 4
FUNCTION
1fH
1
2fH
Table 5
FUNCTION
normal internal window format
1
‘Letterbox’ internal window format
video dependent coring off
1
video dependent coring on
1
skin tone on
DEMO off
1
DEMO on: auto-toggle selected features
on/off (cycle is 10 s at 1fH or 5 s at 2fH)
FUNCTION
0
angle correction 123°
1
angle correction 117°
FUNCTION
0
default detection angle
1
60% increased detection angle
SSK
FUNCTION
0
1999 Sep 24
skin tone off
Table 14 Dynamic skin tone size
Demonstration mode on/off
DEM
0
WSK
FUNCTION
0
Table 7
FUNCTION
Table 13 Dynamic skin tone width
Video dependent coring on/off
VDC
white-point stretch off
ASK
0
Table 6
white-point stretch on
1
Table 12 Dynamic skin tone angle
Window letterbox format
WLB
0
DSK
Line frequency selection
0
FUNCTION
Table 11 Dynamic skin tone on/off
peaking frequency is 3 MHz at 1fH or
6 MHz at 2fH
FHS
TDA9178
FUNCTION
0
default area
1
40% increased area
Table 15 Green enhancement on/off
DGR
12
FUNCTION
0
green enhancement off
1
green enhancement on
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
Table 16 Green enhancement gain
GGR
TDA9178
Table 24 Black offset compensation on/off
FUNCTION
BON
FUNCTION
0
default enhancement
0
black offset compensation off
1
60% increased gain
1
black offset compensation on
Table 17 Green enhancement width
WGR
Table 25 Adaptive black stretch
FUNCTION
BT5
BT4
BT3
BT2
BT1
BT0
FUNCTION
0
default detection angle
0
0
0
0
0
0
0%
1
60% increased detection angle
1
1
1
1
1
1
100%
Table 18 Green enhancement size
SGR
Table 26 Non-linearity amplifier
FUNCTION
NL5
NL4
NL3
NL2
NL1
NL0
FUNCTION
0
default area
0
0
0
0
0
0
0%
1
40% increased area
1
1
1
1
1
1
100%
Table 19 Blue stretch on/off
DBL
Table 27 Variable gamma
FUNCTION
VG5
VG4
VG3
VG2
VG1
VG0
FUNCTION
0
blue stretch off
0
0
0
0
0
0
−100%
1
blue stretch on
1
1
1
1
1
1
100%
Table 20 Blue stretch gain
GBL
Table 28 Peaking amplitude
FUNCTION
PK5
PK4
PK3
PK2
PK1
PK0
FUNCTION
0
default gain
0
0
0
0
0
0
0%
1
60% increased gain
1
1
1
1
1
1
100%
Table 21 Blue stretch size
SBL
Table 29 Steepness correction
FUNCTION
SP5
SP4
SP3
SP2
SP1
SP0
FUNCTION
0
default area
0
0
0
0
0
0
0%
1
40% increased area
1
1
1
1
1
1
100%
Table 22 Colour dependent sharpness on/off
CDS
Table 30 Coring level
FUNCTION
CR5
CR4
CR3
CR2
CR1
CR0
FUNCTION
0
colour dependent sharpness off
0
0
0
0
0
0
0%
1
colour dependent sharpness on
1
1
1
1
1
1
30%
Table 23 Colour transient improvement on/off
CTI
FUNCTION
0
colour transient improvement off
1
colour transient improvement on
1999 Sep 24
13
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
Table 31 Line width correction
Table 35 Noise detector
LW5 LW4 LW3 LW2 LW1 LW0
0
0
1
0
1
1
0
1
TDA9178
0
0
1
1
FUNCTION
ND5
ND4
ND3
ND2
ND1
ND0
33% duty
factor at 2 MHz
sine wave/1fH
0
0
0
0
0
0
−45 dB
1
1
1
1
1
1
−20 dB
67% duty
factor at 2 MHz
sine wave/1fH
Table 36 ADEXT1, ADEXT2 and ADEXT3
AD5
AD4
AD3
AD2
AD1
AD0
0
0
0
0
0
0
external
voltage = 0 V
1
1
1
1
1
1
external
voltage = 2 V
Output signals
Table 32 Power-down detection
PDD
FUNCTION
FUNCTION
FUNCTION
0
no power-down detected since last read
1
power-down detected
Table 37 Data valid bit of
noise detector/ADEXT1, 2 and 3 registers
Table 33 Identification code
ID2
ID1
ID0
0
1
0
FUNCTION
0
data not valid because of possible register
access collision
1
data is valid
FUNCTION
TDA9178/N1
Table 38 Feature mode detector
Table 34 Cue flash
CF
DV
FM
FUNCTION
FUNCTION
0
no cue flash since last read
0
normal video signal detected
1
cue flash detected
1
feature mode detected (noise detector is
not reliable)
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); all voltages referenced to ground.
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
VCC
supply voltage
−0.5
+8.8
V
Vn
voltage on any pin
−0.5
VCC + 0.5
V
Tstg
storage temperature
−55
+150
°C
Tamb
operating ambient temperature
−10
+70
°C
Tj
operating junction temperature
−
150
°C
HANDLING
All pins are protected against ESD by means of internal clamping diodes. The protection circuit meets the following
specification:
Human body model: C = 100 pF; R = 1.5 kΩ; all pins >3000 V
Machine model: C = 200 pF; R = 0 Ω; all pins >200 V.
At an ambient temperature of 90 °C, all pins meet the following specification:
Itrigger > 100 mA or Vpin > 1.5VCC(max)
Itrigger < −100 mA or Vpin < −0.5VCC(max)
1999 Sep 24
14
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
THERMAL CHARACTERISTICS
SYMBOL
Rth(j-a)
PARAMETER
CONDITIONS
VALUE
UNIT
TDA9178 (SDIP24)
56
K/W
TDA9178T (SO24)
65
K/W
thermal resistance from junction to ambient
in free air
QUALITY SPECIFICATION
In accordance with “SNW-FQ-611 part E”.
CHARACTERISTICS
VCC = 8 V; Tamb = 25 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply
SUPPLY VOLTAGE (PIN VCC)
VCC
supply voltage
ICC
supply current
7.2
8.0
8.8
V
1fH mode
−
100
−
mA
2fH mode
−
105
−
mA
DIGITAL SUPPLY DECOUPLING (PIN DECDIG)
VDECDIG
decoupling voltage
−
5
−
V
IDECDIG
decoupling load current
−
−
1
mA
AMS = 0
−
0.315
0.45
V
AMS = 1
−
1.0
1.41
V
no clamp
−
−
0.1
µA
output voltage level during
clamping
AMS = 1
−
2.7
−
V
AMS = 0
−
0.8
−
V
luminance gain input to output
transparent
at AMS = 1;
at 1 V (p-p)
0.93
1.04
1.15
transparent
at AMS = 0;
at 0.3 V (p-p)
0.96
1.07
1.18
Input and output selection
LUMINANCE INPUT (PIN YIN)
Vi(Y)
input voltage (excluding sync)
Ii(bias)(Y)
input bias current
LUMINANCE OUTPUT (PIN YOUT)
Vo(cl)
GY(i-o)
S/N(Y)
signal-to-noise ratio of luminance
output
transparent
52
−
−
dB
BY
luminance bandwidth
1fH mode (−1 dB);
transparent
5
−
−
MHz
2fH mode (−1 dB);
transparent
6
−
−
MHz
transparent
−1.0
0
+1.0
%
Ebl
1999 Sep 24
black level error
15
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
SYMBOL
PARAMETER
CONDITIONS
TDA9178
MIN.
TYP.
−
−
output bias current
1.3
load capacitance
−
Ro
output resistance
Io(bias)
CL
MAX.
UNIT
150
Ω
−
−
mA
−
15
pF
COLOUR DIFFERENCE INPUTS U AND V (PINS UIN AND VIN)
Vi(U)(p-p)
input voltage U
(peak-to-peak value)
−
1.33
1.9
V
Vi(V)(p-p)
input voltage V
(peak-to-peak value)
−
1.05
1.9
V
Ii(bias)
input bias current
−
−
0.1
µA
−
2.7
−
V
no clamp
COLOUR DIFFERENCE OUTPUTS U AND V (PINS UOUT AND VOUT)
Vo(cl)
output voltage level during
clamping
GUV(i-o)
gain inputs to output
transparent
0.90
1.00
1.10
Eoffset
offset error
transparent
−1
0
+1
%
∆Gtrack
UV gain tracking error
transparent
−
−
5
%
BUV
bandwidth
1fH mode;
transparent (−3 dB)
2.5
−
−
MHz
2fH mode;
transparent (−3 dB)
5
−
−
MHz
−
−
150
Ω
Ro
output resistance
Io(bias)
output bias current
1.3
−
−
mA
CL
load capacitance
−
−
15
pF
8
10
12
%
maximum non-linearity
setting gain
−
1.1
−
Luminance vector processing
BLACK STRETCH
BLOScor(i)
input black offset correction
HISTOGRAM
White-point stretch
GWP(max)
maximum luminance gain for white
stretch
Non-linear amplifier
Gnla(min)
minimum segment gain
maximum non-linearity
setting gain
−
0.4
−
Gnla(max)
maximum segment gain
maximum non-linearity
setting gain
−
2.0
−
Gnla
non-linear control curve
63 steps
−
0 to 100 −
%
VARIABLE GAMMA
Gg(var)(min)L
minimum variable gamma setting
−
0.5
−
Gg(var)(max)
maximum variable gamma setting
−
1.5
−
Gnla
non-linear control curve
−
0 to 100 −
1999 Sep 24
63 steps
16
%
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
SYMBOL
PARAMETER
CONDITIONS
MIN.
TDA9178
TYP.
MAX.
UNIT
Colour vector processing
SKIN TONE; note 1 and Fig.4
ASK = 0; DSK = 1
−
123
−
deg
ASK = 1; DSK = 1
−
117
−
deg
correction range (or aperture angle) DSK = 1; SSK = 1;
WSK = 0
−
45
−
deg
−
208
−
deg
−
45
−
deg
DBL = 1
−
330
−
deg
note 3
−
12
−
dB
1fH mode; CFS = 0
−
2.0
−
MHz
2fH mode; CFS = 0
−
4.0
−
MHz
1fH mode; CFS = 1
−
3.0
−
MHz
2fH mode; CFS = 1
−
6.0
−
MHz
1fH mode
−
1.18
−
MHz
2fH mode
−
2.36
−
MHz
peaking control curve
63 steps
−
0 to 100 −
%
coring control curve
63 steps
−
0 to 45
−
%
ϕcor
correction angle
ϕap
GREEN ENHANCEMENT; note 1 and Fig.5
ϕcor
correction angle
ϕap
correction range (or aperture angle) DGR = 1; SGR = 0;
WGR = 0
DGR = 1
BLUE STRETCH; note 2 and Fig.6
ϕ(str)
stretch angle
Spectral processing
GENERAL
Qmax
maximum contour amplitude at
centre frequency
Contour filter low frequency peaking
fpc(l)
peaking centre frequency
Contour filter high frequency peaking
fpc(h)
peaking centre frequency
Step detector
fdc
detection centre frequency
PEAKING
GPK
CORING
GCR
LUMINANCE TRANSIENT IMPROVEMENT
tr(min)
minimum rise time 10% to 90%
note 4
−
30
−
ns
GSP
steepness control curve
63 steps
−
0 to 100 −
%
1fH mode
−
140
−
ns
−
70
−
ns
−
33 to 67 −
%
Line width control
tsd(max)
maximum step displacement
GLW
line width control curve (duty factor) 63 steps at 1 MHz
sine wave at 1fH
2fH mode
1999 Sep 24
17
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
SYMBOL
PARAMETER
CONDITIONS
TDA9178
MIN.
TYP.
MAX.
UNIT
COLOUR TRANSIENT IMPROVEMENT
tr(min)
minimum rise time 10% to 90%
note 5
−
50
−
ns
COLOUR DEPENDENT SHARPNESS
fpc
Qmax
peaking centre frequency
maximum contour amplitude at
centre frequency
1fH mode
−
2.0
−
MHz
2fH mode
−
4.0
−
MHz
note 3
−
6
−
dB
V
SCAVEM
SCAVEM OUTPUT (PIN SOUT)
Vo(cl)
output voltage level during
clamping
−
2.2
−
GY
gain luminance input to SCAVEM
output
0.93
1.04
1.15
BY
bandwidth
5
−
−
6.0
−
−
MHz
Ro
output resistance
−
−
150
Ω
Io(bias)
output bias current
0.8
−
−
mA
CL
load capacitance
−
−
15
pF
td(SOUT-YOUT)
delay w.r.t. YOUT
−
−20
−
ns
−
2.0
−
V
1fH mode (−1 dB)
2fH mode (−1 dB)
MHz
Successive approximation ADC
ADC INPUTS (PINS ADEXT1, ADEXT2
AND
ADEXT3)
VFS
full-scale input voltage range
Ii(bias)
input bias current
−
−
0.1
µA
RES
data path resolution
−
6
−
bit
DLE
differential linearity error
−
−
1
LSB
ILE
integral linearity error
fcon
conversion frequency
Qadt
conversion time (video lines)
with respect to ground
−
−
1
LSB
ADEXT1
−
1fV
−
Hz
ADEXT2; ADEXT3
−
0.5fV
−
Hz
each channel
−
8
−
lines
−
−
1
µA
0.9
1.15
1.40
V
−
0.9Vtop
−
V
1fH mode
1.8
−
−
µs
2fH mode
0.9
−
−
µs
lines
Timing
SANDCASTLE INPUT (PIN SC)
Ii(bias)
input bias current
Vsc(bn)
detection level for blank
Vsc(bc)
detection level for clamp
tW(bk)
burst key pulse width
no clamping
tV
vertical retrace time
6
−
−
Vbk(var)(p-p)
ripple on sandcastle burst key level
(peak-to-peak value)
−
−
0.04Vtop V
1999 Sep 24
18
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
SYMBOL
PARAMETER
CONDITIONS
TDA9178
MIN.
TYP.
MAX.
UNIT
Overall output group delay performance
td(YUV)
tdm(UV-Y)
input to output delay of YUV signals 1fH mode; transparent
−
300
−
ns
2fH mode; transparent
−
180
−
ns
1fH mode; transparent
−32
0
+40
ns
2fH mode; transparent
−16
0
+20
ns
see Figure 18
−45
−
−20
dB
−
32fV
−
s
−
−
5.5
V
−
−
1
mA
adjustment delay U and V signals
w.r.t. Y signal
Noise measurement
Rnoise
range of noise detector
tcon
conversion time
Cue flash
CUE FLASH OUTPUT (PIN
CF); OPEN COLLECTOR
Vo(max)
maximum output voltage
Isink(max)
maximum sink current
pull-up to external
supply
Notes
1. The amount of correction depends on the parameters of the incoming YUV signals; therefore it is not possible to give
exact figures for the correction angle. The aperture angle of the correction range of 45° (±22.5°) is just given as an
indication and is valid for an input signal with a luminance signal amplitude of 75% and a colour saturation of 50%.
2. The amount of correction depends on the parameters of the incoming YUV signals; therefore it is not possible to give
exact figures for the correction angle.
3. The contour signal cannot be measured separately from the luminance input signal. The contour signal is also
processed by the smart noise controller. The frequency transfer in the peaking mode of the luminance signal can be
derived from the frequency transfer of the selected contour signal, taking into account the summation of the contour
signal and the luminance input signal. The frequency transfer is most easily measured by sine excitation with a
relatively small signal amplitude of 10% of the selected dynamic range of the luminance input, to avoid interaction
with the step detector.
4. Peaking set to minimum. Input signal is a sine wave with the nominal peak-to-peak amplitude corresponding to the
selected input range.
5. Input signal is a 250 kHz block with a rise time of 260 ns and a nominal peak-to-peak amplitude corresponding to the
selected input range.
1999 Sep 24
19
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
handbook, full pagewidth
red
V
I-axis
fully saturated colours
yellow
−U
MGR900
Fig.4 Skin tone correction range for a correction angle of 123°.
handbook, full pagewidth
yellow
−U
detection-axis
fully saturated colours
−V
green
MGR901
Fig.5 Green enhancement correction range.
1999 Sep 24
20
TDA9178
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
handbook, full pagewidth
U
blue
detection-axis
fully saturated colours
−V
cyan
MGR902
Fig.6 Blue stretch correction range.
1999 Sep 24
21
TDA9178
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video input
sandcastle input
burst key pulse
22
clamping pulse
internal V-pulse
+ FM detection
noise detector
measuring
ADEXT1
conversion
cue flash output
Fig.7 Timing pulses for NTSC input signal, field A.
TDA9178
MGR903
Preliminary specification
ADEXT2,
ADEXT3
conversion
Philips Semiconductors
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
handbook, full pagewidth
1999 Sep 24
NTSC-signal, field A
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video input
sandcastle input
burst key pulse
23
clamping pulse
internal V-pulse
+ FM detection
noise detector
measuring
ADEXT1
conversion
Philips Semiconductors
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
handbook, full pagewidth
1999 Sep 24
NTSC-signal, field B
ADEXT2,
ADEXT3
conversion
MGR904
TDA9178
Fig.8 Timing pulses for NTSC input signal, field B.
Preliminary specification
cue flash output
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video input
sandcastle input
burst key pulse
clamping pulse
24
internal V-pulse
+ FM detection
noise detector
measuring
ADEXT1
conversion
Philips Semiconductors
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
handbook, full pagewidth
1999 Sep 24
PAL-signal, field A
ADEXT2,
ADEXT3
conversion
MGR933
TDA9178
Fig.9 Timing pulses for PAL and SECAM input signal, field A.
Preliminary specification
cue flash output
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video input
sandcastle input
burst key pulse
clamping pulse
25
internal V-pulse
+ FM detection
noise detector
measuring
ADEXT1
conversion
Philips Semiconductors
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
handbook, full pagewidth
1999 Sep 24
PAL-signal, field B
ADEXT2,
ADEXT3
conversion
MGR934
TDA9178
Fig.10 Timing pulses for PAL and SECAM input signal, field B.
Preliminary specification
cue flash output
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
line width
control
handbook, full pagewidth
MINMAX
SELECTOR
Yin
DELAY
CLAMPS
FADER
Ystep
MINMAX
Yenvelope
MGR905
Fig.11 Block diagram of the step improvement processor.
MGR906
1000
Vo
(mV)
handbook, halfpage
(1)
800
600
400
(2)
200
0
0
0.5
1.0
1.5 t (µs)
2.0
(1) 90% of nominal amplitude.
(2) 30% of nominal amplitude.
Fig.12 Response signals for maximum step improvement, no peaking and nominal line width.
1999 Sep 24
26
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
MGR907
1000
Vo
(mV)
handbook, halfpage
(1)
800
600
400
200
(2)
0
0
0.5
1.0
1.5 t (µs)
2.0
(1) 90% of nominal amplitude.
(2) 30% of nominal amplitude.
Fig.13 Response signals for maximum step improvement, no peaking and minimum line width.
MGR908
1000
Vo
(mV)
handbook, halfpage
(1)
800
600
400
(2)
200
0
0
0.5
1.0
1.5 t (µs)
2.0
(1) 90% of nominal amplitude.
(2) 30% of nominal amplitude.
Fig.14 Response signals for maximum step improvement, no peaking and maximum line width.
1999 Sep 24
27
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
MGR909
100
contour
(%)
handbook, halfpage
(1)
80
60
(2)
40
20
0
105
106
f (Hz)
107
(1) 1fH mode.
(2) 2fH mode.
Fig.15 Frequency transfers of contour filter at f = 2.0 MHz.
handbook, full pagewidth
coring
control
STEP
DETECTOR
delay
cells
Yenvelope
Ycontour
CORING
Yc
FADER
Ystep
peaking steepness
control
control
Ystep
MGR910
Fig.16 Block diagram of smart sharpness controller.
1999 Sep 24
28
TDA9178
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
handbook, halfpage
UVin
DELAY
DELAY
A
B C
control
MGR911
UVout
Fig.17 Block diagram of colour transient improvement.
MGR912
80
handbook, halfpage
DACvalue
60
40
20
0
−50
−40
−30
−20
S/N (dB)
−10
Fig.18 Typical noise measurement curve of input noise (dB) versus DAC-value.
1999 Sep 24
29
TDA9178
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
TEST AND APPLICATION INFORMATION
The TDA9178 is especially designed for YUV applications. A typical application diagram is shown in Fig.19.
handbook, full pagewidth
SC
sandcastle
n.c.
ADEXT1
ADEXT1
100 kΩ
ADEXT2
ADEXT2
100 kΩ
ADEXT3
100 kΩ
YIN
ADEXT3
1
YIN
ADR
1
24
2
23
3
22
4
21
5
20
6
19
TDA9178
7
18
8
17
9
16
10
15
n.c.
n.c.
CF
CF
SOUT
SOUT
VCC
YOUT
8V
100
nF
10
µF
YOUT
VEE
0V
0
UIN
UIN
VIN
VIN
TP
100 Ω
SCL
UOUT
UOUT
VOUT
VOUT
DECDIG
100 nF
SCL
n.c.
11
14
12
13
SDA
n.c.
100 Ω
SDA
MGR913
Fig.19 YUV application.
1999 Sep 24
30
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
PACKAGE OUTLINES
SDIP24: plastic shrink dual in-line package; 24 leads (400 mil)
SOT234-1
ME
seating plane
D
A2
A
A1
L
c
e
Z
b1
(e 1)
w M
MH
b
13
24
pin 1 index
E
1
12
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
min.
A2
max.
b
b1
c
D (1)
E (1)
e
e1
L
ME
MH
w
Z (1)
max.
mm
4.7
0.51
3.8
1.3
0.8
0.53
0.40
0.32
0.23
22.3
21.4
9.1
8.7
1.778
10.16
3.2
2.8
10.7
10.2
12.2
10.5
0.18
1.6
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
ISSUE DATE
92-11-17
95-02-04
SOT234-1
1999 Sep 24
EUROPEAN
PROJECTION
31
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
D
E
A
X
c
HE
y
v M A
Z
13
24
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
L
1
12
e
detail X
w M
bp
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
mm
2.65
0.30
0.10
2.45
2.25
0.25
0.49
0.36
0.32
0.23
15.6
15.2
7.6
7.4
1.27
10.65
10.00
1.4
1.1
0.4
1.1
1.0
0.25
0.25
0.1
0.9
0.4
0.012 0.096
0.004 0.089
0.01
0.019 0.013
0.014 0.009
0.61
0.60
0.30
0.29
0.050
0.419
0.043
0.055
0.394
0.016
0.043
0.039
0.01
0.01
0.004
0.035
0.016
inches
0.10
Z
(1)
θ
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT137-1
075E05
MS-013AD
1999 Sep 24
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
95-01-24
97-05-22
32
o
8
0o
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
SOLDERING
Introduction
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
WAVE SOLDERING
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mount components are mixed on
one printed-circuit board. However, wave soldering is not
always suitable for surface mount ICs, or for printed-circuit
boards with high population densities. In these situations
reflow soldering is often used.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
Through-hole mount packages
SOLDERING BY DIPPING OR BY SOLDER WAVE
• For packages with leads on two sides and a pitch (e):
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joints for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg(max)). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
The footprint must incorporate solder thieves at the
downstream end.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
MANUAL SOLDERING
Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than
2 mm above it. If the temperature of the soldering iron bit
is less than 300 °C it may remain in contact for up to
10 seconds. If the bit temperature is between
300 and 400 °C, contact may be up to 5 seconds.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Surface mount packages
REFLOW SOLDERING
MANUAL SOLDERING
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
1999 Sep 24
TDA9178
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
33
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
Suitability of IC packages for wave, reflow and dipping soldering methods
SOLDERING METHOD
MOUNTING
PACKAGE
WAVE
suitable(2)
Through-hole mount DBS, DIP, HDIP, SDIP, SIL
Surface mount
REFLOW(1) DIPPING
−
suitable
BGA, LFBGA, SQFP, TFBGA
not suitable
suitable
−
HBCC, HLQFP, HSQFP, HSOP, HTQFP,
HTSSOP, SMS
not suitable(3)
suitable
−
PLCC(4), SO, SOJ
suitable
suitable
−
suitable
−
suitable
−
recommended(4)(5)
LQFP, QFP, TQFP
not
SSOP, TSSOP, VSO
not recommended(6)
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
3. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
5. Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
6. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
1999 Sep 24
34
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
1999 Sep 24
35
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For all other countries apply to: Philips Semiconductors,
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5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
Internet: http://www.semiconductors.philips.com
SCA 68
© Philips Electronics N.V. 1999
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
545004/01/pp36
Date of release: 1999
Sep 24
Document order number:
9397 750 04621