TPC8406-H TOSHIBA Field Effect Transistor Silicon P/N-Channel MOS Type (P-Channel/N-Channel Ultra-High-Speed U-MOSIII) TPC8406-H High Efficiency DC/DC Converter Applications Notebook PC Applications Portable Equipment Applications CCFL Inverter Applications • • • • • Unit: mm Small footprint due to a small and thin package High speed switching Low drain-source ON-resistance: P-Channel RDS (ON) = 24 mΩ (typ.) N-Channel RDS (ON) = 22 mΩ (typ.) Small gate charge: P-Channel QSW = 9.7 nC (typ.) N-Channel QSW = 3.5 nC (typ.) High forward transfer admittance: P-Channel |Yfs| = 13 S (typ.) N-Channel |Yfs| = 14 S (typ.) • • Low leakage current: P-Channel IDSS = −10 μA (VDS = −40 V) N-Channel IDSS = 10 μA (VDS = 40 V) Enhancement mode : P-Channel Vth = −0.8 to −2.0 V (VDS = −10 V, ID = −1 mA) : N-Channel Vth = 1.1 to 2.3 V (VDS = 10 V, ID = 1 mA) Absolute Maximum Ratings (Ta = 25°C) Characteristic Symbol Rating P-Channel N-Channel Unit Drain-source voltage VDSS −40 40 V Drain-gate voltage (RGS = 20 kΩ) VDGR −40 40 V Gate-source voltage VGSS ±20 ±20 V DC (Note 1) ID −6.5 6.5 Pulse (Note 1) IDP −26 26 PD(1) 1.5 1.5 PD(2) 1.1 1.1 Single-device operation (Note 3a) PD(1) 0.75 0.75 Single-device value at (Note 2b) dual operation (Note 3b) PD(2) 0.45 0.45 Drain current Drain power Single-device operation (Note 3a) dissipation (t = 10s) Single-device value at (Note 2a) dual operation (Note 3b) Drain power dissipation (t = 10s) JEDEC ― JEITA ― TOSHIBA 2-6J1E Weight: 0.085 g (typ.) A Circuit Configuration 8 7 6 5 W 19 (Note 4a) 19 (Note 4b) Single-pulse avalanche energy EAS Avalanche current IAR Repetitive avalanche energy Single-device value at operation (Note 2a, 3b, 5) EAR 0.08 mJ Channel temperature Tch 150 °C Storage temperature range Tstg −55 to 150 °C −6.5 6.5 mJ A 1 2 N-ch 3 4 P-ch Note: For Notes 1 to 5, refer to the next page. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). This transistor is an electrostatic-sensitive device. Handle with care. 1 2009-09-29 TPC8406-H Thermal Characteristics Characteristic Single-device operation (Note 3a) Thermal resistance, channel to ambient (t = 10s) (Note 2a) Single-device value at dual operation (Note 3b) Single-device operation (Note 2a) Thermal resistance, channel to ambient (t = 10s) (Note 2b) Single-device value at dual operation (Note 2b) Symbol Max Rth (ch-a) (1) 83.3 Rth (ch-a) (2) 114 Rth (ch-a) (1) 167 Rth (ch-a) (2) 278 Unit °C/W Marking (Note 6) TPC8406 H Part No. (or abbreviation code) Lot No. Note 7 Note 1: The channel temperature should not exceed 150°C during use. Note 2: a) Device mounted on a glass-epoxy board (a) b) Device mounted on a glass-epoxy board (b) FR-4 25.4 × 25.4 × 0.8 (Unit: mm) FR-4 25.4 × 25.4 × 0.8 (Unit: mm) (a) (b) Note 3: a) The power dissipation and thermal resistance values are shown for a single device (During single-device operation, power is applied to one device only.). b) The power dissipation and thermal resistance values are shown for a single device (During dual operation, power is evenly applied to both devices.). Note 4: a) VDD = 24 V, Tch = 25°C (initial), L = 0.5 mH, RG = 25 Ω, IAR = 6.5 A b) VDD = 24 V, Tch = 25°C (initial), L = 0.5 mH, RG = 25 Ω, IAR = 6.5 A Note 5: Repetitive rating: pulse width limited by maximum channel temperature Note 6: • on the lower left of the marking indicates Pin 1. * Weekly code: (Three digits) Week of manufacture (01 for first week of year, continuing up to 52 or 53) Year of manufacture (The last digit of the calendar year) Note 7: A line under a Lot No. identifies the indication of product Labels. Not underlined: [[Pb]]/INCLUDES > MCV Underlined: [[G]]/RoHS COMPATIBLE or [[G]]/RoHS [[Pb]] Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS compatibility of Product. The RoHS is the Directive 2002/95/EC of the European Parliament and of the Council of 27 January 2003 on the restriction of the use of certain hazardous substances in electrical and electronic equipment. 2 2009-09-29 TPC8406-H Electrical Characteristics (Ta = 25°C) P-Channel Characteristic Symbol Test Condition Min Typ. Max Unit Gate leakage current IGSS VGS = ±16 V, VDS = 0 V ⎯ ⎯ ±10 μA Drain cutoff current IDSS VDS = −40 V, VGS = 0 V ⎯ ⎯ −10 μA V (BR) DSS ID = −10 mA, VGS = 0 V −40 ⎯ ⎯ V (BR) DSX ID = −10 mA, VGS = 20 V −20 ⎯ ⎯ Vth VDS = −10 V, ID = −1 mA −0.8 ⎯ −2.0 VGS = −4.5 V, ID = − 3.3 A ⎯ 29 37 VGS = −10 V, ID = − 3.3 A ⎯ 24 30 VDS = −10 V, ID = − 3.3 A 6.5 13 ⎯ ⎯ 1190 ⎯ ⎯ 170 ⎯ ⎯ 250 ⎯ ⎯ 5 ⎯ ⎯ 12 ⎯ ⎯ 12 ⎯ ⎯ 43 ⎯ VDD ∼ − −32 V, VGS =−10V ID = −6.5 A ⎯ 27 ⎯ VDD ∼ − −32 V, VGS = −5 V ID = − 6.5 A ⎯ 15 ⎯ ⎯ 3.2 ⎯ ⎯ 8.1 ⎯ ⎯ 9.7 ⎯ Drain-source breakdown voltage Gate threshold voltage Drain-source ON-resistance RDS (ON) Forward transfer admittance |Yfs| Input capacitance Ciss Reverse transfer capacitance Crss Output capacitance Coss Rise time VDS = −10 V, VGS = 0 V, f = 1 MHz tr VGS Turn-on time ton −10 V Turn-off time Total gate charge (gate-source plus gate-drain) tf toff Qg Gate-source charge 1 Qgs1 Gate-drain (“Miller”) charge Qgd Gate switch charge QSW RL = 6.1 Ω 4.7 Ω Switching time Fall time ID = −3.3 A VOUT 0V V V mΩ S pF ns VDD ∼ − −20 V Duty < = 1%, tw = 10 μs VDD ∼ − −32 V, VGS = −10 V ID = − 6.5 A nC Source-Drain Ratings and Characteristics (Ta = 25°C) Characteristic Drain reverse current Forward voltage (diode) Pulse (Note 1) Symbol Test Condition Min Typ. Max Unit IDRP ⎯ ⎯ ⎯ −26 A ⎯ ⎯ 1.2 V VDSF IDR = −6.5 A, VGS = 0 V 3 2009-09-29 TPC8406-H Electrical Characteristics (Ta = 25°C) N-channel Characteristic Symbol Test Condition Min Typ. Max Unit Gate leakage current IGSS VGS = ±16 V, VDS = 0 V ⎯ ⎯ ±10 μA Drain cutoff current IDSS VDS = 40 V, VGS = 0 V ⎯ ⎯ 10 μA V (BR) DSS ID = 10 mA, VGS = 0 V 40 ⎯ ⎯ V (BR) DSX ID = 10 mA, VGS = −20 V 25 ⎯ ⎯ VDS = 10 V, ID = 1 mA 1.1 ⎯ 2.3 VGS = 4.5 V, ID = 3.3 A ⎯ 27 35 VGS = 10 V, ID = 3.3 A ⎯ 22 27 VDS = 10 V, ID = 3.3 A 7 14 ⎯ ⎯ 650 ⎯ ⎯ 55 ⎯ ⎯ 240 ⎯ ⎯ 3 ⎯ ⎯ 9 ⎯ ⎯ 2 ⎯ ⎯ 18 ⎯ Drain-source breakdown voltage Gate threshold voltage Vth Drain-source ON-resistance RDS (ON) Forward transfer admittance |Yfs| Input capacitance Ciss Reverse transfer capacitance Crss Output capacitance Coss Rise time VDS = 10 V, VGS = 0 V, f = 1 MHz tr VGS Turn-on time ton Fall time Turn-off time Total gate charge (gate-source plus gate-drain) tf toff Qg Gate-source charge 1 Qgs1 Gate-drain (“Miller”) charge Qgd Gate switch charge QSW 0V RL = 6.1 Ω 4.7 Ω Switching time ID = 3.3 A VOUT 10 V V V mΩ S pF ns VDD ∼ − 20 V Duty < = 1%, tw = 10 μs VDD ∼ − 32 V, VGS =10V, ID = 6.5A ⎯ 11 ⎯ VDD ∼ − 32 V, VGS = 5 V,ID = 6.5A ⎯ 6.2 ⎯ ⎯ 2.1 ⎯ ⎯ 2.7 ⎯ ⎯ 3.5 ⎯ VDD ∼ − 32 V, VGS = 10 V, ID = 6.5A nC Source-Drain Ratings and Characteristics (Ta = 25°C) Characteristic Drain reverse current Forward voltage (diode) Pulse (Note 1) Symbol Test Condition Min Typ. Max Unit IDRP ⎯ ⎯ ⎯ 26 A ⎯ ⎯ −1.2 V VDSF IDR = 6.5 A, VGS = 0 V 4 2009-09-29 TPC8406-H P-Channel ID – VDS −10 −4 −6 (A) −10 −4.5 ID −2.8 −6 −2.7 −2.6 −4 −2.5 −2 −4 −8 −16 −3 Drain current ID Drain current Common source Ta = 25°C Pulse test −3.2 −3.4 −8 −8 ID – VDS −20 (A) −10 Common source Ta = 25°C Pulse test −3.4 −3.2 −6 −4.5 −12 −3.0 −8 −2.8 −4 −2.6 VGS = −2.4 V 0 −0.2 0 −0.4 −0.6 Drain-source voltage −0.8 VDS VGS = −2.4 V 0 −1.0 0 (V) −0.4 −0.8 Drain-source voltage ID – VGS −30 (V) (V) Common source Ta = 25℃ Pulse test −0.4 VDS (A) VDS −2 VDS – VGS −20 Drain-source voltage ID Drain current −1.6 −0.5 Common source VDS = −10 V Pulse test −25 −1.2 −15 −10 −5 100 Ta = −55°C −0.3 −0.2 ID = −6.5 A −3.3 −0.1 25 0 −1 0 −2 −3 Gate-source voltage −4 VGS 0 −5 −1.7 0 (V) −2 −4 Drain-source ON-resistance RDS (ON) (mΩ) (S) |Yfs| Forward transfer admittance Common source VDS = −10 V Pulse test 100 Ta = −55°C 25 1 0.1 −0.1 −1 Drain current −10 ID VGS −10 −12 (V) RDS (ON) – ID 300 10 −8 Gate-source voltage ⎪Yfs⎪ – ID 100 −6 100 −4.5 V 30 VGS = −10 V 10 3 −0.1 −100 (A) Common source Ta = 25°C Pulse test Drain current 5 −10 −1 ID −100 (A) 2009-09-29 TPC8406-H P-Channel RDS (ON) – Ta IDR – VDS −100 Common source Pulse test −1.7 VGS = −4.5 V ID = −1.7/−3.3/−6.5A −10 V 10 40 80 120 Ta 160 Vth (V) Gate threshold voltage (pF) C 100 Crss Common source VGS = 0 V f = 1 MHz Ta = 25°C −10 VDS −0.4 −40 −50 (V) −40 (4) 0.4 Ambient temperature 40 80 120 Ta 160 (°C) Dynamic input/output characteristics (3) 100 0 Ambient temperature Device mounted on a glass-epoxy board (a) (Note 2a) (1)Single-device operation (Note 3a) (2)Single-device value at dual operation (Note 3b) Device mounted on a glass-epoxy board (b) (Note 2b) (3)Single-device operation (Note 3a) (4)Single-device value at dual operation (Note 3b) t=10S 50 (V) Common source VDS = −10 V ID = −1 mA Pulse test (V) 0.8 0 0 VDS 1.2 −0.8 VDS 1.2 (2) 1.0 −1.2 0 −80 −100 Drain-source voltage (W) (1) 0.8 −1.6 PD – Ta 1.6 0.6 Vth – Ta Coss 2.0 0.4 −2.0 1000 Drain-source voltage 0.2 Drain-source voltage Ciss −1 0 (°C) Capacitance – VDS 10 −0.1 VGS = 0 V −1 150 Ta (°C) −16 VDS −16 −30 −20 −8 VGS −10 −4 10 20 Total gate charge 6 −12 −8 VDD = −32 V 0 0 200 −20 Common source ID = −6.5 A Ta = 25°C Pulse test (V) 0 −0. 1 30 Qg 40 VGS −40 −1 Gate-source voltage 20 10000 PD −3 −4.5 −10 30 Ambient temperature Drain power dissipation −10 IDR 40 0 −80 Capacitance Common source Ta = 25°C Pulse test (A) −3.3 ID = −6.5 A Drain reverse current Drain-source ON-resistance RDS (ON) (mΩ) 50 0 50 (nC) 2009-09-29 TPC8406-H Transient thermal impedance rth (°C/W) P-Channel rth – tw 1000 Single - pulse (4) (3) (2) 100 (1) 10 Device mounted on a glass-epoxy board (a) (Note 2a) (1)Single-device operation (Note 3a) (2)Single-device value at dual operation (Note 3b) Device mounted on a glass-epoxy board (b) (Note 2b) (3)Single-device operation (Note 3a) (4)Single-device value at dual operation (Note 3b) 1 0.1 0.001 0.01 0.1 1 Pulse width 10 tw 100 1000 (s) Safe operating area −100 Single-device value at dual operation (Note 3b) Drain current ID (A) ID max (Pulse) * t =1 ms * −10 10 ms * −1 * Single - pulse Ta = 25°C Curves must be derated linearly with increase in temperature. −0.1 −0.1 −1 Drain-source voltage VDSS max −10 VDS −100 (V) 7 2009-09-29 TPC8406-H N-Channel ID – VDS ID – VDS 10 3.8 (A) 4.5 6 3 2.9 4 2.8 2.7 2 Common source Ta = 25°C Pulse test 3.8 6 16 3.1 Drain current ID Drain current 3.2 5 4 10 ID 8 Common source Ta = 25°C Pulse test 3.4 4 3.6 5 (A) 10 6 20 4.5 3.4 12 3.2 8 3 4 2.8 VGS = 2.6 V 0 0 0.2 0.4 0.6 Drain-source voltage 0.8 VDS 0 1.0 VGS = 2.6 V 0 (V) 0.4 0.8 Drain-source voltage ID – VGS 30 (V) VDS (A) Drain-source voltage ID Drain current 10 25 100 0.3 0.2 ID = 6.5 A 3.3 0.1 Ta = −55°C 0 1 2 3 4 Gate-source voltage 5 VGS 0 6 1.7 0 (V) 2 4 10 Common source VDS = 10 V Pulse test 100 Ta = −55°C 25 1 0.1 0.1 1 Drain current 10 ID 8 10 VGS 12 (V) RDS (ON) – ID 300 Drain-source ON-resistance RDS (ON) (mΩ) |Yfs| 100 6 Gate-source voltage ⎪Yfs⎪ – ID (S) (V) Common source Ta = 25℃ Pulse test 0.4 15 5 Forward transfer admittance VDS 2.0 VDS – VGS 20 0 1.6 0.5 Common source VDS = 10 V Pulse test 25 1.2 100 4.5 V 30 VGS = 10 V 10 3 0.1 100 (A) Common source Ta = 25°C Pulse test 1 Drain current 8 10 ID 100 (A) 2009-09-29 TPC8406-H N-Channel RDS (ON) – Ta IDR – VDS 100 Common source Pulse test (A) 3.3 ID = 6.5 A 40 Common source Ta = 25°C Pulse test 10 10 30 VGS = 4.5 V ID = 1.7/3.3/6.5A 20 10 V 10 1 −40 0 40 Ambient temperature 80 120 Ta 0.1 0 160 (°C) −0.2 −0.4 Vth (V) Gate threshold voltage Coss 100 Crss Common source VGS = 0 V f = 1 MHz Ta = 25°C (V) 10 80 120 1.5 1.0 0.5 0 −80 100 VDS 2.0 Common source VDS = 10 V ID = 1 mA Pulse test −40 0 Ambient temperature (V) (V) 40 Drain-source voltage (2) (3) (4) 0.4 50 100 Ambient temperature (°C) 150 Ta 20 Common source ID = 6.5 A Ta = 25°C Pulse test (V) 50 Device mounted on a glass-epoxy board (a) (Note 2a) (1)Single-device operation (Note 3a) (2)Single-device value at dual operation (Note 3b) Device mounted on a glass-epoxy board (b) (Note 2b) (3)Single-device operation (Note 3a) (4)Single-device value at dual operation (Note 3b) t=10S 16 VDS (1) Ta 160 Dynamic input/output characteristics PD – Ta 2.0 40 16 30 (°C) 8 10 4 VGS 4 8 Total gate charge 9 12 VDD = 32 V 20 0 0 200 8 VDS 12 Qg 16 VGS 1 Drain-source voltage 0 0 VDS −1.2 Gate-source voltage Capacitance C (pF) 1000 0.8 −1.0 2.5 Ciss 1.2 −0.8 Vth – Ta Capacitance – VDS 1.6 −0.6 Drain-source voltage 10000 10 0.1 VGS = 0 V 1 0 −80 Drain power dissipation PD (W) 3 4.5 IDR 1.7 Drain reverse current Drain-source ON-resistance RDS (ON) (mΩ) 50 0 20 (nC) 2009-09-29 TPC8406-H N-Channel Transient thermal impedance rth (°C/W) rth – tw 1000 (4) Single - pulse (3) (2) 100 (1) 10 Device mounted on a glass-epoxy board (a) (Note 2a) (1)Single-device operation (Note 3a) (2)Single-device value at dual operation (Note 3b) Device mounted on a glass-epoxy board (b) (Note 2b) (3)Single-device operation (Note 3a) (4)Single-device value at dual operation単発パルス (Note 3b) 1 0.1 0.001 0.01 0.1 1 Pulse width 10 tw 100 1000 (s) Safe operating area 100 Single-device value at dual operation (Note 3b) Drain current ID (A) ID max (Pulse) * 1 ms * 10 10 ms * 1 * Single - pulse Ta = 25°C Curves must be derated linearly with increase in temperature. 0.1 0.1 1 Drain-source voltage VDSS max 10 VDS 100 (V) 10 2009-09-29 TPC8406-H RESTRICTIONS ON PRODUCT USE • Toshiba Corporation, and its subsidiaries and affiliates (collectively “TOSHIBA”), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively “Product”) without notice. • This document and any information herein may not be reproduced without prior written permission from TOSHIBA. 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Before creating and producing designs and using, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the precautions and conditions set forth in the “TOSHIBA Semiconductor Reliability Handbook” and (b) the instructions for the application that Product will be used with or for. Customers are solely responsible for all aspects of their own product design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and applications. 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Product and related software and technology may be controlled under the Japanese Foreign Exchange and Foreign Trade Law and the U.S. Export Administration Regulations. Export and re-export of Product or related software or technology are strictly prohibited except in compliance with all applicable export laws and regulations. • Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS compatibility of Product. Please use Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. TOSHIBA assumes no liability for damages or losses occurring as a result of noncompliance with applicable laws and regulations. 11 2009-09-29