S3C8835/C8837/P8837 1 PRODUCT OVERVIEW PRODUCT OVERVIEW SAM87 PRODUCT FAMILY Samsung's SAM87 family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range of integrated peripherals, and various mask-programmable ROM sizes. Important CPU features include: — Efficient register-oriented architecture — Selectable CPU clock sources — Release by interrupt of Idle and Stop power-down modes — Built-in basic timer circuit with watchdog function A sophisticated interrupt structure recognizes up to eight interrupt levels. Each level can have one or more interrupt sources and vectors. Fast interrupt processing (within a minimum six CPU clocks) can be assigned to specific interrupt levels. S3C8835/C8837/P8837 The S3C8835 microcontroller has 16 K bytes of on-chip program memory and the S3C8837 has 24 K bytes. Both chips have a 272-byte general-purpose internal register file. The interrupt structure has seven interrupt sources with six interrupt vectors. The CPU recognizes six interrupt priority levels. Using a modular design approach, the following peripherals were integrated with the SAM87 core to make the S3C8835/C8837/P8837 suitable for use in color television and other types of screen display applications: — Four programmable I/O ports (26 pins total: 16 general-purpose I/O pins; 8 n-channel, open-drain output pins) — 2 channel A/D converter (4-bit resolution) — 14-bit PWM output (one channels: push-pull type) — Basic timer (BT) with watchdog timer function — One 8-bit timer/counter (T0) with interval timer — One 8-bit general-purpose timer/counter (TA) with prescalers — On-screen display (OSD) with a wide range of programmable features including halftone control signal output The S3C8835/C8837 are available in a versatile 42-pin SDIP package. OTP The S3C8835/C8837 microcontroller is also available in OTP (One Time Programmable) version, S3P8837. S3P8837 microcontroller has an on-chip 24K-byte one-time-programmable EPROM instead of masked ROM. The S3P8837 is comparable to S3C8835/C8837, both in function and in pin configuration. 1-1 PRODUCT OVERVIEW S3C8835/C8837/P8837 FEATURES CPU Pulse Width Modulation Module • • 14-bit PWM with one-channel output (push-pull type) Memory • PWM counter and data capture input pin • 16-K byte (S3C8835) or 24K- byte (S3C8837) internal program memory • Frequency: 5.859 kHz to 23.437 kHz with a 6-MHz CPU clock • 272-byte general-purpose register area SAM87 CPU core On-Screen Display (OSD) Instruction Set • Video RAM: 252 × 12 bits • 78 instructions • • IDLE and STOP instructions added for powerdown modes Character generator ROM: 256 × 18 × 16 bits (256 display characters: fixed: 2, variable: 254) • 252 display positions (12 rows × 21 columns) • 16-dot × 18-dot character resolution • 16 different character sizes • Eight character colors Interrupts • Vertical direction fade-in/fade-out control • 7 interrupt sources with 6 vectors • Eight colors for character and frame background • 6 interrupt levels • • Fast interrupt processing for select levels Halftone control signal output; selectable for individual characters • Synchronous polarity selector for H-sync and V-sync input Instruction Execution Time • 750 ns (minimum) with an 8-MHz CPU clock General I/O • Four I/O ports (26 pins total) • Six open-drain pins for up to 6-volt loads • Two open-drain pins for up to 5-volt loads 8-Bit Basic Timer • Three selectable internal clock frequencies • Watchdog or oscillation stabilization function Timer/Counters • One 8-bit timer/counter (T0) with three internal clocks and interval timer mode. • One general-purpose 8-bit timer/counters with interval timer mode (timer A) A/D Converter • Two analog input pins; 4-bit resolution • 3.125 µs conversion time (8-MHz CPU clock) 1-2 Oscillator Frequency • 5-MHz to 8-MHz external crystal oscillator • Maximum 8-MHz CPU clock Operating Temperature Range • – 20°C to + 85°C Operating Voltage Range • 4.5 V to 5.5 V Package Type • 42-pin SDIP S3C8835/C8837/P8837 PRODUCT OVERVIEW BLOCK DIAGRAM RESET P0.0 - P0.7 P1.0 - P1.7 PORT 0 PORT 1 INT0 - INT1 XIN XOUT OSC IN OSC OUT TEST SAM87 BUS MAIN OSC TIMER A PORT I/O and INTERRUPT CONTROL L-C OSC TIMER 0 H-sync V-sync Vred Vgreen Vblue Vblank OSDHT ADC0 ADC1 ONSCREEN DISPLAY SAM87 CPU 16KB ROM (8835) 4-BIT ADC 24KB ROM (8837) PWM BLOCK 272-BYTE REGISTER FILE PWM COUNTER and DATA CAPTURE 14-BIT PWM CAPA PWM0 SAM87 BUS PORT 2 P2.0 - P2.7 PORT 3 P3.0 - P3.1 Figure 1-1. Block Diagram 1-3 PRODUCT OVERVIEW S3C8835/C8837/P8837 PIN ASSIGNMENTS P2.5/PWM0 1 42 P0.0 P2.1 2 41 P0.1 P2.2(SCL) 3 40 P0.2 P2.3(SDA) 4 39 P0.3 P2.4 5 38 P0.4 P2.0 6 37 VSS2 P2.6 7 36 CAPA P1.7 8 35 P0.5 P3.0/ADC0 9 34 VDD P3.1/ADC1 10 33 P0.6 11 S3C8835 S3C8837 32 RESET XOUT P0.7 12 31 XIN TEST 13 42-PIN SDIP (Top View) 30 VSS1 P1.0/INT0 14 29 OSCOUT P1.1/INT1 15 28 OSCIN P1.2 16 27 V-sync P1.3 17 26 H-sync P1.4 18 25 Vblank P1.5 19 24 Vred P1.6 20 23 Vgreen P2.7/OSDHT 21 22 Vblue Figure 1-2. S3C8835/C8837/P8837 Pin Assignment Diagram 1-4 S3C8835/C8837/P8837 PRODUCT OVERVIEW Table 1-1. S3C8835/C8837 Pin Descriptions Pin Name Pin Type Pin Description Circuit Type Pin Numbers P0.0–P0.7 I/O General I/O port (8-bit), configurable for digital input or push-pull output. 3 11–12, 35, 38–42 P1.0–P1.1 I/O General I/O port (2-bit), configurable for digital input or n-channel open-drain output. P1.0–P1.1 can withstand up to 6-volt loads. Multiplexed for alternative use as external interrupt inputs INT0–INT1. 7 14–15 P1.2–P1.5 General I/O port (4-bit), configurable for digital input or n-channel open-drain output. P1.2–P1.5 can withstand up to 6-volt loads. High current port (10mA). 5 16–19 P1.6–P1.7 General I/O port (2-bit), configurable for digital input or push-pull output. 3 20, 8 General I/O port (6-bit). I/O mode or n-channel open-drain, push-pull output mode is software configurable. Pins can withstand up to 5-volt loads. P2.2: OTP serial clock pin P2.3: OTP serial data pin 2 2–7 General I/O port (2-bit). I/O mode or n-channel open-drain, push-pull output mode is software configurable. Pins can withstand up to 5-volt loads. 2 1, 21 P2.0–P2.4, P2.6 P2.5, P2.7 I/O Share Pins INT0–INT1 PWM0 OSDHT Each pin has an alternative function. P2.5: PWM0 (14-bit PWM output) P2.7: OSDHT (Halftone signal output) 1-5 PRODUCT OVERVIEW S3C8835/C8837/P8837 Table 1-1. S3C8835/C8837 Pin Descriptions (Continued) Pin Name Pin Type Pin Description Circuit Type Pin Numbers Share Pins P3.0–P3.1 I/O General I/O port (2 bits), configurable for digital input or n-channel open-drain output. P3.0–P3.1 can withstand up to 5-volt loads. Multiplexed for alternative use as external interrupt inputs ADC0–ADC1. 6 9–10 ADC0 ADC1 PWM0 O Output pin for 14-bit PWM0 circuit 2 1 P2.5 ADC0–ADC1 I Analog inputs for 4-bit A/D converter 6 9,10 P3.0– P3.1 INT0–INT1 I External interrupt input pins 7 14,15 P1.0– P1.1 OSDHT O Halftone control signal output for OSD 2 21 P2.7 Vblue, Vgreen Vred, Vblank O Digital blue, green, red, and video blank signal outputs for OSD 4 22–25 – H-sync I H-sync input for OSD 8 26 – V-sync OSCIN, OSCOUT TEST XIN, XOUT V-sync input for OSD I, O I I, O 27 L-C oscillator pins for OSD clock frequency generation – 28,29 – 0 V: Normal operation mode 5 V: Factory test mode 12.5 V: OTP write mode – 13 – System clock pins – 31, 32 – RESET I System reset input pin 1 33 – VDD, VSS1, VSS2 – Power supply pins – 13 – CAPA I Input for capture A module 8 26 – 1-6 S3C8835/C8837/P8837 PRODUCT OVERVIEW PIN CIRCUITS VDD V DD DATA 200 KΩ NOISE FILTER IN I/O INPUT VSS INPUT Figure 1-3. Pin Circuit Type 1 (RESET RESET) Figure 1-5. Pin Circuit Type 3 (P0.0–P0.7, P1.6–P1.7) VDD VDD DATA I/O OPENDRAIN DATA OUTPUT DISABLE I/O VSS VSS INPUT Figure 1-4. Pin Circuit Type 2 (P2.0–P2.7, PWM0, OSDHT) Figure 1-6. Pin Circuit Type 4 (Vblue, Vgreen, Vred, Vblank) 1-7 PRODUCT OVERVIEW S3C8835/C8837/P8837 I/O I/O DATA DATA VSS VSS INPUT INPUT INT NOTE: Circuit type 5 can withstand up to 6-volt loads. NOISE FILTER NOTE: Circuit type 7 can withstand up to 6-volt loads. Figure 1-9. Pin Circuit Type 7 (P1.0–P1.1, INT0–INT1) Figure 1-7. Pin Circuit Type 5 (P1.2–P1.5) I/O DATA VSS INPUT INPUT NOISE FILTER A/D IN NOTE: Circuit type 6 can withstand up to 5-volt loads. Figure 1-8. Pin Circuit Type 6 (P3.0–P3.1, ADC0–ADC1) 1-8 Figure 1-10. Pin Circuit Type 8 (V-Sync H-Sync, CAPA) IN S3C8835/C8837/P8837 15 ELECTRICAL DATA ELECTRICAL DATA OVERVIEW In this section, S3C8835/C8837 electrical characteristics are presented in tables and graphs. The information is arranged in the following order: — Absolute maximum ratings — D.C. electrical characteristics — I/O capacitance — A.C. electrical characteristics — Input timing measurement points for tNF1 and tNF2 — Data retention supply voltage in Stop mode — Stop mode release timing when initiated by RESET — Main oscillator and L-C oscillator frequency — Clock timing measurement points for XIN — Main oscillator clock stabilization time (tST) — A/D converter electrical characteristics — Characteristic curves 15-1 ELECTRICAL DATA S3C8835/C8837/P8837 Table 15-1. Absolute Maximum Ratings (TA = 25°C) Parameter Symbol Conditions Rating Unit Supply Voltage VDD – – 0.3 to + 6.0 V Input Voltage VI1 P1.0–P1.5 (open-drain) – 0.3 to + 7 V VI2 All port pins except VI1 – 0.3 to VDD + 0.3 Output Voltage VO All output pins – 0.3 to VDD + 0.3 V Output Current High I OH One I/O pin active – 18 mA All I/O pins active – 60 One I/O pin active + 30 Total pin current for port 1 + 100 Total pin current for ports 0, 2, and 3 + 100 Output Current Low I OL mA Operating Temperature TA – – 20 to + 85 °C Storage Temperature TSTG – – 65 to + 150 °C Table 15-2. D.C. Electrical Characteristics (TA = – 20°C to + 85°C, VDD = 4.5 V to 5.5 V) Parameter Symbol Conditions VIH1 All input pins except VIH2 VIH2 XIN, XOUT VIL1 All input pins except VIL2 VIL2 XIN, XOUT Output High Voltage VOH IOH = – 500 µA P0, P1.6–P1.7, P2 R, G, B, Vblank Output Low Voltage VOL1 Input High Voltage Input Low Voltage 15-2 Min Typ Max Unit 0.8 VDD – VDD V – 0.2 VDD V 2.7 V – 1.0 V VDD – 0.8 – – V IOL = 4 mA P0, P1.6–P1.7 – – 0.4 V VOL2 IOL = 10 mA P1.2–P1.5 – – 0.8 VOL3 IOL = 2 mA P1.0–P1.1, P3.0–P3.1 – – 0.4 VOL4 IOL = 1 mA R, G, B, Vblank, P2 – – 0.4 V S3C8835/C8837/P8837 ELECTRICAL DATA Table 15-2. D.C. Electrical Characteristics (Continued) (TA = – 20°C to + 85°C, VDD = 4.5 V to 5.5 V) Parameter Input High Leakage Current Input Low Leakage Current Symbol Conditions ILIH1 VIN = VDD All input pins except ILIH2 and ILIH3 ILIH2 VIN = VDD, OSCIN, OSCOUT ILIH3 VIN = VDD, XIN, XOUT ILIL1 VIN = 0 V All input pins except ILIL2, Min Typ Max Unit – – 3 µA 10 2.5 10 20 – – –3 µA ILIL3, and RESET ILIL2 VIN = 0 V, OSCIN, OSCOUT ILIL3 VIN = 0 V, XIN, XOUT ILOH1 VOUT = VDD All output pins except ILOH2 ILOH2 VOUT = 6 V P1.0–P1.5 Output Low Leakage Current ILOL VOUT = 0 V All output pins – – –3 µA Supply Current IDD1 Normal mode; VDD = 4.5 V to 5.5 V 8-MHz CPU clock – 7 20 mA IDD2 Idle mode; VDD = 4.5 V to 5.5 V 8-MHz CPU clock 2 10 IDD3 Stop mode; VDD = 4.5 V to 5.5 V 1 10 Output High Leakage Current (note) – 10 – 2.5 – 10 – 20 – – 3 µA 10 µA NOTE: Supply current does not include current drawn through internal pull-up resistors or external output current loads. 15-3 ELECTRICAL DATA S3C8835/C8837/P8837 Table 15-3. Input/Output Capacitance (TA = – 20°C to + 85°C, VDD = 0 V) Parameter Symbol Conditions Min Typ Max Unit Input capacitance CIN f = 1 MHz; unmeasured pins are connected to VSS – – 10 pF Output capacitance COUT CIO I/O capacitance Table 15-4. A.C. Electrical Characteristics (TA = – 20°C to + 85°C, VDD = 4.5 V to 5.5 V) Parameter Symbol Conditions Min Typ Max Unit V-sync Pulse Width tVW – 4 – – µs H-sync Pulse Width tHW – 3 – – µs Noise Filter tNF1 P1.0–P1.1, V-sync – 350 – ns tNF2 RESET – 1000 tNF3 Glitch filter (oscillator block) – 15 tNF4 CAPA – 5 – tCAPA tNF5 H-sync – 650 – ns NOTE: tCAPA = fOSC/128. 1tCPU tNF1L tNF1H t NF2 0.8 VDD 0.2 VDD Figure 15-1. Input Timing Measurement Points for tNF1 and tNF2 15-4 S3C8835/C8837/P8837 ELECTRICAL DATA Table 15-5. Data Retention Supply Voltage in Stop Mode (TA = – 20 °C to + 85 °C) Parameter Symbol Conditions Min Typ Max Unit Data Retention Supply Voltage VDDDR Stop mode 2 – 6 V Data Retention Supply Current IDDDR Stop mode, VDDDR = 2.0 V – – 5 µA NOTES: 1. Supply current does not include current drawn through internal pull-up resistors or external output current loads. 2. During the oscillator stabilization wait time (tWAIT), all CPU operations must be stopped. OSCILLATION STABILIZATION TIME t SREL ~ ~ STOP MODE NORMAL OPERATING MODE DATA RETENTION MODE ~ ~ VDD VDDDR EXECUTION OF STOP INSTRUCTION RESET NOTE: t WAIT is the same as 4096 x 16 x 1 / fOSC t WAIT Figure 15-2. Stop Mode Release Timing When Initiated by a Reset 15-5 ELECTRICAL DATA S3C8835/C8837/P8837 Table 15-6. Main Oscillator and L-C Oscillator Frequency (TA = – 20°C to + 85°C, VDD = 4.5 V to 5.5 V) Oscillator Clock Circuit Conditions C1 Crystal Min Typ Max Unit 5 6 8 MHz 0.5 6 8 5 6 8 0.5 6 8 5 6 8 OSD block inactive 0.5 6 8 Recommend value: C1 = C2 = 20 pF 5 6.5 8 MHz 0.032 6.0 8 MHz OSD block active XIN XOUT C2 OSD block inactive C1 Ceramic OSD block active XIN MHz XOUT C2 OSD block inactive External Clock OSD block active XIN MHz XOUT L-C Oscillator C1 OSCIN OSCOUT C2 CPU Clock Frequency – 1 / fOSC tXL tXH XIN 2.7 V 1.0 V Figure 15-3. Clock Timing Measurement Points for XIN 15-6 S3C8835/C8837/P8837 ELECTRICAL DATA Table 15-7. Main Oscillator Clock Stabilization Time (TA = – 20°C to + 85°C, VDD = 4.5 V to 5.5 V) Oscillator Crystal Symbol Test Condition VDD = 4.5 V to 6.0 V – Min Typ Max Unit – – 20 ms Ceramic (Oscillation stabilization occurs when VDD is equal to the minimum oscillator voltage range.) 10 External Clock XIN input High and Low level width (tXH, tXL) 65 – 100 ns Release Signal Setup Time tSREL Normal operation – 1000 – ns Oscillation Stabilization Wait Time (1) tWAIT CPU clock = 8 MHz; Stop mode released by RESET – 8.3 – ms CPU clock = 8 MHz; Stop mode released by an interrupt (2) NOTES: 1. Oscillation stabilization time is the time required for the CPU clock to return to its normal oscillation frequency after a power-on occurs, or when Stop mode is released. 2. The oscillation stabilization interval is determined by the basic timer (BT) input clock setting. Table 15-8. A/D Converter Electrical Characteristics (TA = – 20°C to + 85°C, VDD = 4.5 V to 5.5 V, VSS = 0 V) Parameter Symbol Conditions Min Typ Max Unit Absolute Accuracy (1) – CPU clock = 8 MHz – – ± 0.5 LSB Conversion Time (2) tCON tCPU × 25 – Analog Input Voltage VIAN – VSS Analog Input Impedance RAN – 2 µs (3) – VDD V – MΩ NOTES: 1. Excluding quantization error, absolute accuracy values are within ± 1/2 LSB. 2. 'Conversion time' is the time required from the moment a conversion operation starts until it ends. 3. The unit tCPU means one CPU clock period. 15-7 S3C8835/C8837/P8837 16 MECHANICAL DATA MECHANICAL DATA OVERVIEW The S3C8835/C8837 microcontrollers are available in a 42-pin SIP package (42-SDIP-600). 22 0 ~ 15 ° 15.24 42-SDIP-600 0.50 ± 0.1 1.00 ± 0.1 1.778 5.08MAX (1.77) 3.30 ± 0.3 39.10 ± 0.2 3.50 ± 0.2 21 0.51MIN #1 0.25 +0.1 – 0.0 5 14.00 ± 0.2 42 NOTE: Package dimensions are in millimeters. Figure 16-1. 42-Pin SDIP Package Mechanical Data (42-SDIP-600) 16-1 S3C8835/C8837/P8837 17 S3P8837 OTP S3P8837 OTP OVERVIEW The S3P8837 single-chip CMOS microcontroller is the OTP (One Time Programmable) version of the S3C8835/C8837 microcontroller. It has an on-chip OTP ROM instead of masked ROM. The EPROM is accessed by serial data format. The S3P8837 is fully compatible with the S3C8835/C8837, both in function and in pin configuration. Because of its simple programming requirements, the S3P8837 is ideal for use as an evaluation chip for the S3C8835/C8837. 17-1 S3P8837 OTP S3C8835/C8837/P8837 P2.7 /OSDHT 1 42 OSC OUT P0.7 2 41 OSC IN P0.6 3 40 Vblank P0.5 4 39 Vblue P0.4 5 38 Vgreen P0.3 6 37 Vred P0.2 7 36 V-sync P0.1 8 35 H-sync P0.0 9 34 P1.0/INT0 33 P1.1/INT1 32 P1.2 31 P1.3 VSS/VSS 10 VDD /VDD 11 XOUT 12 XIN 13 30 P1.4 P2.6 14 29 P1.5 15 28 P1.6 P2.5/PWM0 16 27 TEST/TEST P2.4 17 26 CAP.A SDA/P2.3 18 25 VSS/VSS SCL /P2.2 19 24 P1.7 P2.1 20 23 P3.0/ADC0 P2.0 21 22 P3.1/ADC1 RESET /RESET S3P8837 42-PIN SDIP (Top View) NOTE: The bolds indicate an OTP pin name. Figure 17-1. S3P8837 Pin Assignments (42-SDIP) 17-2 S3C8835/C8837/P8837 S3P8837 OTP Table 17-1. Descriptions of Pins Used to Read/Write the EPROM Main Chip During Programming Pin Name Pin Name Pin No. I/O Function P2.3 (Pin 4) SDAT 4 I/O Serial data Pin (Output when reading, Input when writing) Input and Push-pull Output Port can be assigned P2.2 (Pin 3) SCLK 3 I/O Serial clock Pin (Input Only Pin) TEST VPP (TEST) 13 I 0 V: Operating mode 5 V: Test mode 12.5 V: OTP mode RESET RESET 33 I 0 V: Chip initialization, OTP mode 5 V: Operating mode VDD/VSS VDD/VSS 34/30, 37 I Logic Power Supply Pin. Table 17-2. Comparison of S3P8837 and S3C8835/C8837 Features Characteristic S3P8837 S3C8835/C8837 Program Memory 24K-byte EPROM 24K-byte mask ROM Operating Voltage (VDD) 4.5 V to 5.5 V 4.5 V to 5.5 V OTP Programming Mode VDD = 5 V, VPP (TEST) = 12.5 V Pin Configuration 42-SDIP 42-SDIP EPROM Programmability User Program 1 time Programmed at the factory – 17-3