STMICROELECTRONICS STP8NS25

STP8NS25
STP8NS25FP
N-CHANNEL 250V - 0.38Ω - 8A TO-220/TO-220FP
MESH OVERLAY™ MOSFET
TYPE
STP8NS25
STP8NS25FP
■
■
■
VDSS
RDS(on)
ID
250 V
250 V
< 0.45 Ω
< 0.45 Ω
8A
8A
TYPICAL RDS(on) = 0.38 Ω
EXTREMELY HIGH dv/dt CAPABILITY
100% AVALANCHE TESTED
3
1
DESCRIPTION
Using the latest high voltage MESH OVERLAY™
process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding
performance. The new patented STrip layout coupled with the Company’s proprietary edge termination structure, makes it suitable in coverters for
lighting applications.
3
2
1
TO-220
2
TO-220FP
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
■ HIGH CURRENT, HIGH SPEED SWITCHING
■ SWITH MODE POWER SUPPLIES (SMPS)
■ DC-DC CONVERTERS FOR TELECOM,
INDUSTRIAL, AND LIGHTING EQUIPMENT
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
STP8NS25
VDS
VDGR
VGS
Unit
STP8NS25FP
Drain-source Voltage (VGS = 0)
250
V
Drain-gate Voltage (RGS = 20 kΩ)
250
V
Gate- source Voltage
± 20
V
ID
Drain Current (continuos) at TC = 25°C
8
8(*)
A
ID
Drain Current (continuos) at TC = 100°C
5
5(*)
A
Drain Current (pulsed)
32
32(*)
A
IDM (●)
PTOT
Total Dissipation at TC = 25°C
Derating Factor
dv/dt (1)
Insulation Withstand Voltage (DC)
Tstg
Storage Temperature
Max. Operating Junction Temperature
(•)Pulse width limited by safe operating area
April 2001
30
W
0.24
W/°C
Peak Diode Recovery voltage slope
VISO
Tj
80
0.64
5
-
V/ns
2000
V
–65 to 150
°C
150
°C
(1) ISD≤ 8A, di/dt≤300 A/µs, VDD≤ V (BR)DSS, Tj≤TjMAX
(*)Limited only by maximum temperature allowed
1/9
STP8NS25/STP8NS25FP
THERMAL DATA
Rthj-case
Thermal Resistance Junction-case Max
TO-220
TO-220FP
1.56
4.11
°C/W
Rthj-amb
Thermal Resistance Junction-ambient Max
62.5
°C/W
Rthc-sink
Thermal Resistance Case-sink Typ
0.5
°C/W
Maximum Lead Temperature For Soldering Purpose
300
°C
Tl
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
Symbol
V(BR)DSS
IDSS
IGSS
Parameter
Test Conditions
Min.
Typ.
Max.
250
Unit
Drain-source
Breakdown Voltage
ID = 250 µA, VGS = 0
V
Zero Gate Voltage
Drain Current (VGS = 0)
VDS = Max Rating
1
µA
VDS = Max Rating, TC = 125 °C
10
µA
Gate-body Leakage
Current (VDS = 0)
VGS = ±20V
±100
nA
ON (1)
Symbol
Parameter
Test Conditions
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250µA
RDS(on)
Static Drain-source On
Resistance
VGS = 10V, ID = 4 A
ID(on)
On State Drain Current
VDS > ID(on) x RDS(on)max,
VGS = 10V
Min.
Typ.
Max.
Unit
2
3
4
V
0.38
0.45
Ω
8
A
DYNAMIC
Symbol
gfs (1)
2/9
Parameter
Forward Transconductance
Test Conditions
VDS > ID(on) x RDS(on)max,
ID = 4A
VDS = 25V, f = 1 MHz, VGS = 0
Min.
Typ.
7
8
Max.
Unit
S
770
pF
Ciss
Input Capacitance
Coss
Output Capacitance
118
pF
Crss
Reverse Transfer
Capacitance
48
pF
STP8NS25/STP8NS25FP
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
Symbol
td(on)
tr
Parameter
Turn-on Delay Time
Rise Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
Test Conditions
Min.
VDD = 125 V, ID = 4 A
RG = 4.7Ω VGS = 10 V
(see test circuit, Figure 3)
VDD = 200V, ID = 8 A,
VGS = 10V
Typ.
Max.
Unit
13
ns
18
ns
37
51.8
nC
5.2
nC
14.8
nC
SWITCHING OFF
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
td(Voff)
tf
Turn-off- Delay Time
Fall Time
VDD = 125V, ID = 4 A,
RG = 4.7Ω, VGS = 10V
(see test circuit, Figure 3)
51
16
ns
ns
tr(Voff)
tf
tc
Off-voltage Rise Time
Fall Time
Cross-over Time
Vclamp = 200V, ID = 8 A,
RG = 4.7Ω, VGS = 10V
(see test circuit, Figure 5)
12.5
12.5
28
ns
ns
ns
SOURCE DRAIN DIODE
Symbol
ISD
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Source-drain Current
8
A
ISDM (2)
Source-drain Current (pulsed)
32
A
VSD (1)
Forward On Voltage
ISD = 8 A, VGS = 0
1.7
V
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
ISD = 8 A, di/dt = 100A/µs
VDD = 30V, Tj = 150°C
(see test circuit, Figure 5)
IRRM
Reverse Recovery Current
198
ns
1.1
µC
11.3
A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
Safe Operating Area for TO-220
Safe Operating Area for TO-220FP
3/9
STP8NS25/STP8NS25FP
Thermal Impedence for TO-220
Output Characteristics
Transconductance
4/9
Thermal Impedence for TO-220FP
Transfer Characteristics
Static Drain-source On Resistance
STP8NS25/STP8NS25FP
Gate Charge vs Gate-source Voltage
Normalized Gate Thereshold Voltage vs Temp.
Capacitance Variations
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
5/9
STP8NS25/STP8NS25FP
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuit For
Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/9
STP8NS25/STP8NS25FP
TO-220 MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
MAX.
A
4.40
4.60
0.173
0.181
C
1.23
1.32
0.048
0.051
D
2.40
2.72
0.094
D1
0.107
1.27
0.050
E
0.49
0.70
0.019
0.027
F
0.61
0.88
0.024
0.034
F1
1.14
1.70
0.044
0.067
F2
1.14
1.70
0.044
0.067
G
4.95
5.15
0.194
0.203
G1
2.4
2.7
0.094
0.106
H2
10.0
10.40
0.393
0.409
L2
16.4
0.645
13.0
14.0
0.511
0.551
L5
2.65
2.95
0.104
0.116
L6
15.25
15.75
0.600
0.620
L7
6.2
6.6
0.244
0.260
L9
3.5
3.93
0.137
0.154
DIA.
3.75
3.85
0.147
0.151
D1
C
D
A
E
L4
H2
G
G1
F1
L2
F2
F
Dia.
L5
L9
L7
L6
L4
P011C
7/9
STP8NS25/STP8NS25FP
TO-220FP MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
MAX.
A
4.4
4.6
0.173
0.181
B
2.5
2.7
0.098
0.106
D
2.5
2.75
0.098
0.108
E
0.45
0.7
0.017
0.027
F
0.75
1
0.030
0.039
F1
1.15
1.7
0.045
0.067
F2
1.15
1.7
0.045
0.067
G
4.95
5.2
0.195
0.204
G1
2.4
2.7
0.094
0.106
H
10
10.4
0.393
0.409
L2
16
0.630
28.6
30.6
1.126
1.204
L4
9.8
10.6
0.385
0.417
L6
15.9
16.4
0.626
0.645
L7
9
9.3
0.354
0.366
Ø
3
3.2
0.118
0.126
B
D
A
E
L3
L3
L6
F2
H
G
G1
¯
F
F1
L7
1 2 3
L2
8/9
L4
STP8NS25/STP8NS25FP
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a trademark of STMicroelectronics
© 2001 STMicroelectronics – Printed in Italy – All Rights Reserved
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