ST7LCRE4U1 ST7LCRDIE6 Full-speed USB MCU with smartcard interface Features ■ Clock, reset and supply management – Low voltage reset – Halt power saving mode – PLL for generating 48 MHz USB clock using a 4 MHz crystal ■ USB (Universal Serial Bus) host interface – USB 2.0 compliant – CCID v1.0 – Full speed, hubless – Bus-powered, low consumption ■ ■ DIE – Programmable smartcard internal voltage regulator (1.8 to 3.0V) with current overload protection and 4 kV ESD protection (human body model) for all smartcard Interface I/Os ISO7816-3 UART Interface – 4 MHz clock generation – Synchronous/asynchronous protocols (T=0, T=1) – Automatic retry on parity error – Programmable baud rate from 372 to 11.625 clock pulses (D=32/F=372) – Card insertion/removal detection ■ Development tools – Full hardware/software development package. – Fully compatible with Flash ST7FSCR family for development purposes ■ ECOPACK® package Description ST7LCRE4U1 and ST7LCRDIE6 are an 8-bit microcontrollers dedicated to smartcard reading applications. They have been developed to be the core of smartcard readers communicating through USB link. Optimized for mass-market applications, it offers a single integrated circuit solution with very few external components. Smartcard power supply – Fixed card VCC: 1.8 V, and 3 V – Internal step-up converter for 5 V supplied smartcards (with current of up to 55 mA) using only two external components Table 1. VFQFPN24(Y1) Device summary Part numbers Features ST7LCRE4U1 ST7LCRDIE6 Program memory 16 Kbyte of ROM User RAM + USB data buffer 512 + 256 bytes Peripherals USB full-speed (7 Ep), TBU, watchdog timer, ISO7816-3 interface Operating Supply 4.0 to 5.5 V Package VFQFPN24 Die format (Refer to Die Specifications) CPU Frequency 4 or 8 MHz Operating temperature 0°C to +70 °C October 2007 Rev 1 1/29 www.st.com 1 ST7LCR Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 ST7LCR implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4 3.1 Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.2 Smartcard interface features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.2 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.2.2 Current injection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.2.3 Current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.2.4 I/O port pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.3 Supply and reset characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.4 Clock and timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.4.1 General timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.4.2 External clock source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.4.3 Crystal resonator oscillators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.5 Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.6 Smartcard supply supervisor electrical characteristics . . . . . . . . . . . . . . 17 4.7 EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.8 5 4.2.1 4.7.1 Functional EMS (electromagnetic susceptibility) . . . . . . . . . . . . . . . . . . 19 4.7.2 Electromagnetic interference (EMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.7.3 Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . . 20 Communication interface characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 21 Package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.1 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 6 Device configuration and ordering information . . . . . . . . . . . . . . . . . . 26 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 2/29 ST7LCR List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Current injection on I/O port and control pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 I/O port pins characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Low voltage detector and supervisor (LVDs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 General timings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Crystal resonator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Typical crystal resonator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Recommended values for 4 MHz crystal resonator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 RAM and hardware registers characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Smartcard supply supervisor electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 EMS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 EMI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Electrical sensitivities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 USB DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 USB full-speed electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 24-lead very thin fine pitch quad flat no-lead 5x5mm,0.65mm pitch, mechanical data. . . . 24 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3/29 ST7LCR List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. 4/29 ST7LCR block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 24-lead VFQFPN package pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Smartcard interface reference application - VFQFPN24 pin block diagram . . . . . . . . . . . . . 9 Typical application with an external clock source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Typical application with a crystal resonator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 USB data signal rise and fall time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 24-lead very thin fine pitch quad flat no-lead 5x5 mm 0.65 mm pitch, package outline . . . 24 Recommended reflow oven profile (MID JEDEC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 ST7LCR option list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 ST7LCR 1 Description The ST7LCRE4U1 and ST7LCRDIE6 devices are members of the ST7 microcontroller family designed for USB applications. All devices are based on a common industry-standard 8-bit core, featuring an enhanced instruction set. ST7LCRE4U1 and ST7LCRDIE6 are factory-programmed ROM devices. They operate at a 4 MHz external oscillator frequency. Under software control, all devices can be placed in Halt mode, to reduce power consumption when the application is in idle or standby state. The enhanced instruction set and addressing modes of the ST7 offer both power and flexibility to software developers, enabling the design of highly efficient and compact application code. In addition to standard 8-bit data management, all ST7 microcontrollers feature true bit manipulation, 8x8 unsigned multiplication and indirect addressing modes. The devices include an ST7 Core, up to 16 Kbytes of program memory, up to 512 bytes of user RAM and the following on-chip peripherals: ● USB full speed interface with 7 endpoints, programmable in/out configuration and embedded 3.3 V voltage regulator and transceivers (no external components are needed) ● ISO7816-3 UART interface with programmable baud rate from 372 clock pulses up to 11.625 clock pulses ● Smartcard supply block able to provide programmable supply voltage and I/O voltage levels to the smartcards ● Low voltage reset ensuring proper power-on or power-off of the device (selectable by option) ● 8-bit Timer (TBU) 5/29 ST7LCR Figure 1. ST7LCR block diagram OSCIN 4 MHz OSCILLATOR OSCOUT PLL 48 MHz DIVIDER USBDP USBDM USBVCC USB ADDRESS AND DATA BUS USB DATA BUFFER (256 bytes) 8 MHz or 4 MHz ISO7816 UART 8-bit TIMER SUPPLY MANAGER 8-bit CORE ALU CONVERTER DC/DC C4 RAM (512 bytes) 6/29 CRDDET CRDIO LVD PROGRAM MEMORY (16 Kbytes) CRDVCC C8 3/1.8 V Vreg CRDRST CRDCLK ST7LCR Pin description GNDA NC NC VDD VDDA 24-lead VFQFPN package pinout 24 23 22 21 20 19 CRDRST 2 17 DP CRDCLK 3 16 DM C4 4 15 NC CRDIO 5 14 NC C8 6 13 GND CRDDET 7 9 10 11 12 Pin description Level Port/control 1 CDRVCC O CT X 2 CRDRST O CT X X Smartcard reset 3 CRDCLK O CT X X Smartcard clock 4 C4 O CT X X Smartcard C4 5 CRDIO I/O 6 C8 O 7 CRDDET I 8 NC Not used(1) 9 NC Not used(1) 10 NC Not used(1) CT CT CT X Alternate function PP OD int Input Output Main function (after reset) wpu Input VFQFPN24 Output Pin name Type Pin number VCARD supplied Table 2. 8 OSCOUT USBVCC OSCIN 18 NC 1 NC CRDVCC NC Figure 2. GND 2 Smartcard supply pin X X X Smartcard I/O X X Smartcard C8 Smartcard detection 7/29 ST7LCR Port/control Alternate function PP OD int Input Output Main function (after reset) wpu VFQFPN24 Input Pin name Output Level Pin number VCARD supplied Pin description (continued) Type Table 2. 11 OSCIN CT 12 OSCOUT 13 GND 14 NC Not used(1) 15 NC Not used 16 DM I/O CT USB Data Minus line 17 DP I/O CT USB Data Plus line 18 USBVCC O 19 VDDA S Power supply voltage 4-5.5 V 20 VDD S Power supply voltage 4-5.5 V 21 NC Not used 22 NC Not used 23 GNDA S 24 GND S CT S Input/Output oscillator pins. These pins connect a 4 MHz parallel-resonant crystal, or an external source to the on-chip oscillator. Must be held low in normal operating mode. 3.3 V Output for USB CT Ground 1. Pins 8,9,10, and 14 must be connected to ground. Legend/abbreviations 8/29 ● Type: I = input, O = output, S = supply ● In/Output level: CT = CMOS 0.3VDD/0.7VDD with input trigger ● Output level: HS = 10 mA high sink (on N-buffer only) ● Port and control configuration: – Input: float = floating, wpu = weak pull-up, int = interrupt, ana = analog – Output: OD = open drain, PP = push-pull ST7LCR Figure 3. Smartcard interface reference application - VFQFPN24 pin block diagram VDD C2 24 C4 C5 23 1 22 21 20 19 18 2 17 3 16 4 15 5 14 6 C6 7 8 9 10 11 R D+ D- 13 12 CL1 CL2 1. Mandatory values for the external components: C1 = 4.7 µF, C2 = 100 nF. C1 and C2 must be located close to the chip. C3 = 1 nF C4 = 4.7 µF, ESR = 0.5Ω C5 = 470 pF C6 =100 pF R = 1.5 kΩ L1 = 10 µH, 2 Ω Crystal 4.0 MHz, maximum impedance = 100 Ω Cl1, Cl2 (refer Section 4.4.3: Crystal resonator oscillators). D1: BAT42 Shottky 9/29 ST7LCR 3 ST7LCR implementation ST7LCRE4U1 and ST7LCRDIE6 offer single IC solutions and simplifies the integration of smartcard interfaces into smartcard readers. 3.1 Functionality A dedicated analog block provides the power supplies 1.8 V and 3 V necessary to interface with different smartcard voltages available on the market. Voltages are selected by software. A dedicated UART interface provides an IS07816 communication port for connection with the smartcard connector. A full-speed USB interface port allows external connection to a host computer. 3.2 Smartcard interface features The ST7LCRE4U1 and ST7LCRDIE6 include the following features: ● Compatibility with asynchronous cards ● Compatibility with T=0 and T=1 protocols ● Compatibility with EMV and PC/SC modes. ● Compliance with ISO 7816-3 and 4 and ability to supply the cards with 1.8 V or 3 V (class A, B or C cards, respectively) ● Resume/wake-up mode upon smartcard insertion/removal The reader is able to communicate with smartcards up to the maximum baud rate allowed, namely 344 086 bps (TA1=16) for a clock frequency of 4 MHz. Because the size of the smartcard buffer is 261 bytes, care must be taken not to exceed this size during APDU exchanges when the protocol in use is T=1. 10/29 ST7LCR 4 Electrical characteristics 4.1 Absolute maximum ratings This product contains devices for protecting the inputs against damage due to high static voltages, however it is advisable to take normal precautions to avoid applying any voltage higher than the specified maximum rated voltages. For proper operation it is recommended that VI and VO be higher than VSS and lower than VDD. Reliability is enhanced if unused inputs are connected to an appropriate logic voltage level (VDD or VSS). Power considerations The average chip-junction temperature, TJ, in Celsius can be obtained from: T J = T A + PD × RthJA where: TA = Ambient temperature RthJA = Package thermal resistance (junction-to ambient) PD = PINT + PPORT PINT = IDD x VDD (chip internal power) PPORT = Port power dissipation determined by the user Stresses above those listed as “absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these conditions is not implied. Exposure to maximum rating for extended periods may affect device reliability. Table 3. Absolute maximum ratings Symbol Ratings Value Unit VDD - VSS Supply voltage 6.0 V VIN Input voltage VSS - 0.3 to VDD + 0.3 V VOUT Output voltage VSS - 0.3 to VDD + 0.3 V ESD ESD susceptibility 2000 V ESDCard ESD susceptibility for card pads 4000 V IVDD_I Total current into VDD_I (source) 250 IVSS_I Total current out of VSS_I (sink) 250 Warning: mA Direct connection to VDD or VSS of the I/O pins could damage the device in case of program counter corruption (due to unwanted change of the I/O configuration). To guarantee safe conditions, this connection has to be done through a typical 10kΩ pull-up or pull-down resistor. 11/29 ST7LCR Table 4. 4.2 Thermal characteristics Symbol Ratings Value Unit RthJA Package thermal resistance VFQFPN24 42 °C/W TJmax Max. junction temperature 150 °C TSTG Storage temperature range -65 to +150 °C PDmax Power dissipation VFQFPN24 600 mW Recommended operating conditions Operating conditions are given for TA = 0 to +70 °C unless otherwise specified. 4.2.1 General operating conditions Table 5. 4.2.2 General operating conditions Symbol Parameter VDD Supply voltage fOSC External clock source TA Ambient temperature range Conditions Min 4.0 0 Typ Max Unit 5.5 V 16 MHz 70 °C Current injection Positive injection The positive injection current, IINJ+, is applied through protection diodes insulated from the substrate of the die. Negative injection The negative injection current, IINJ-, is applied through protection diodes NOT INSULATED from the substrate of the die. The drawback is a small leakage of few µA induced inside the die when a negative injection is performed. This leakage is tolerated by the digital structure. The effect depends on the pin which is submitted to the injection. Of course, external digital signals applied to the component must have a maximum impedance close to 50 kΩ. Pure digital pins can tolerate a negative current injection of 1.6 mA. In addition, the best choice is to inject the current as far as possible from the analog input pins. Note: When several inputs are submitted to a current injection, the maximum injection current is the sum of the positive (respectively negative) currents (instantaneous values). Refer to Table 6 for the values of IINJ- and IINJ+. 12/29 ST7LCR Table 6. Current injection on I/O port and control pins Symbol Parameter IINJ+ Total positive injected current(1) IINJ- Total negative injected current Conditions Max Unit VEXTERNAL > VDD (standard I/Os) 20 mA VEXTERNAL > VCRDVCC (smartcard I/Os) 20 mA Digital pins 20 mA Analog pins 20 mA VEXTERNAL < VSS Min Typ 1. For SmartCard I/Os, VCRDVCC has to be considered. 4.2.3 Current consumption Table 7 are measured at TA=0 to +70°C, and VDD-VSS=5.5 V unless otherwise specified. Table 7. Symbol IDD Current consumption(1) Parameter Conditions Min Supply current in Run mode(2) fOSC = 4 MHz Supply current in suspend mode External ILOAD = 0 mA (USB transceiver enabled) Supply current in Halt mode External ILOAD = 0 mA (USB transceiver disabled) Typ Max Unit 10 15 mA 500 µA 50 100 1. All I/O pins are in input mode with a static value at VDD or VSS. Clock input (OSCIN) is driven by external square wave. 2. CPU running with memory access, all I/O pins in input mode with a static value at VDD or VSS; clock input (OSCIN) driven by external square wave. 4.2.4 I/O port pin characteristics Table 8 characteristics are measured at TA=0 to +70°C. Voltages are referred to VSS unless otherwise specified. Table 8. I/O port pins characteristics Symbol Parameter Conditions VIL Input low level voltage VDD = 5 V VIH Input high level voltage VDD = 5 V VHYS Schmidt trigger voltage hysteresis(1) VOL Output low level voltage for Standard I/O port pins Min Typ Max 0.3VDD mV I=-5mA 1.3 I=-2mA 0.4 Output high level voltage I=3mA IL Input leakage current VSS<VPIN< VDD RPU Pull-up equivalent resistor V 0.7VDD 400 VOH Unit V VDD0.8 50 90 1 µA 170 kΩ 13/29 ST7LCR Table 8. I/O port pins characteristics (continued) Symbol Parameter Conditions Min Typ Max tOHL Output high to low level fall time for high sink I/O port pins (Port D)(2) 6 8 13 tOHL Output high to low level fall time for standard I/O port pins (Port A, B or C)(2) tOLH Output L-H rise time (Port D)(2) 7 tOLH Output L-H rise time for standard I/O port pins (Port A, B or C)(2) 19 tITEXT External interrupt pulse time 1 18 Unit 23 Cl=50 pF ns 9 14 28 tCPU 1. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested. 2. Guaranteed by design, not tested in production. 4.3 Supply and reset characteristics Table 9 characteristics are measured for TA = 0 to +70 °C, and VDD - VSS = 5.5 V unless otherwise specified. Table 9. Low voltage detector and supervisor (LVDs) Symbol Parameter Conditions VIT+ Reset release threshold (VDD rising) VIT- Reset generation threshold (VDD falling) Vhys Hysteresis VIT+ - VIT-(1) VtPOR VDD rise time rate(1) Min 3.3 Typ Max Unit 3.7 3.9 V 3.5 V 200 mV 20 ms/V 1. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested. 4.4 Clock and timing characteristics 4.4.1 General timings Table 10 are measured at TA=0 to +70 °C unless otherwise specified. Table 10. General timings Symbol Parameter tc(INST) Instruction cycle time tv(IT) Interrupt reaction time tv(IT) = ∆tc(INST) + 10 (2) Conditions fCPU=4 MHz fCPU=4 MHz Min Typ(1) Max Unit 2 3 12 tCPU 500 750 3000 ns 10 22 tCPU 2.5 5.5 µs 1. Data based on typical application software. 2. Time measured between interrupt event and interrupt vector fetch. ∆tc(INST) is the number of tCPU cycles needed to finish the current instruction execution. 14/29 ST7LCR 4.4.2 External clock source Table 11. External clock source characteristics Symbol Parameter Conditions Min VOSCINH OSCIN input pin high level voltage 0.7VDD VDD VOSCINL OSCIN input pin low level voltage VSS 0.3VDD tw(OSCINH) tw(OSCINL) OSCIN high or low time(1) tr(OSCIN) tf(OSCIN) OSCIN rise or fall time IL OSCx Input leakage current see Figure 4 Typ Max Unit V 15 ns 15 VSS≤VIN≤VDD ±1 µA 1. Data based on design simulation and/or technology characteristics, not tested in production. Figure 4. Typical application with an external clock source 90% VOSCINH 10% VOSCINL tr(OSCIN) tf(OSCIN) tw(OSCINH) tw(OSCINL) OSCOUT fOSC EXTERNAL CLOCK SOURCE OSCIN IL ST7XXX 15/29 ST7LCR 4.4.3 Crystal resonator oscillators The ST7 internal clock is supplied with one Crystal resonator oscillator. All the information given in this paragraph are based on characterization results with specified typical external components. In the application, the resonator and the load capacitors have to be placed as close as possible to the oscillator pins in order to minimize output distortion and start-up stabilization time. Refer to the crystal resonator manufacturer for more details (frequency, package, accuracy...). Table 12. Crystal resonator characteristics Symbol Parameter Conditions Min fOSC Oscillator Frequency(1) MP: Medium power oscillator RF Feedback resistor CL1 CL2 Recommended load capacitances versus equivalent serial resistance of the crystal resonator (RS) See Table 14 i2 OSCOUT driving current VDD=5V VIN=VSS Typ Max Unit 4 MHz 90 150 kΩ (MP oscillator) 22 56 pF (MP oscillator) 1.5 3.5 mA 1. The oscillator selection can be optimized in terms of supply current using an high quality resonator with small RS value. Contact crystal resonator manufacturer for more details. Table 13. Typical crystal resonator characteristics Crystal Oscillator Freq. Characteristic(1) 4 MHz ∆fOSC=[±30ppm25°C,±30ppm∆Ta] (Typ) RS=60Ω Reference MP JAUCH SS3-400-3030/30 CL1 CL2 tSU(osc) (pF) (pF) (ms)(2) 33 33 7~10 1. Resonator characteristics given by the crystal resonator manufacturer. 2. tSU(OSC) is the typical oscillator start-up time measured between VDD = 2.8 V and the fetch of the first instruction (with a quick VDD ramp-up from 0 to 5 V (<50 µs). Table 14. Recommended values for 4 MHz crystal resonator Symbol Min Typ Max RSMAX(1) 20 Ω 25 Ω 70 Ω COSCIN 56 pF 47 pF 22 pF COSCOUT 56 pF 47 pF 22 pF 1. RSMAX is the equivalent serial resistor of the crystal (see crystal specification). 16/29 ST7LCR Figure 5. Typical application with a crystal resonator WHEN RESONATOR WITH INTEGRATED CAPACITORS i2 fOSC CL1 OSCIN RESONATOR CL2 RF OSCOUT ST7XXX 4.5 Memory characteristics Subject to general operating conditions for VDD, fOSC, and TA unless otherwise specified. Table 15. RAM and hardware registers characteristics Symbol Parameter Conditions Min VRM Data retention mode(1) Halt mode (or Reset) 2 Typ Max Unit V 1. Minimum VDD supply voltage without losing data stored in RAM (in Halt mode or under Reset) or in hardware registers (only in Halt mode). Not tested in production. 4.6 Smartcard supply supervisor electrical characteristics Table 16 characteristics are measured for TA = 0 to +70 °C, and 4.0 < VDD - VSS < 5.5 V unless otherwise specified. Table 16. Symbol Smartcard supply supervisor electrical characteristics Parameter Conditions Min Typ Max Unit 2.7 3.0 3.3 V 3 V regulator output (for IEC7816-3 class B cards) VCRDVCC SmartCard Power Supply Voltage ISC SmartCard Supply Current 50 mA IOVDET Current Overload Detection 100(1) mA tIDET Detection time on Current Overload 1400(1) µs tOFF VCRDVCC Turn off Time CLOADmax≤4.7uF 750 µs tON VCRDVCC Turn on Time CLOADmax ≤ 4.7uF 150 500 µs 1.8 1.95 V 170(1) 1.8 V regulator output (for IEC7816-3 Class C Cards) VCRDVCC SmartCard Power Supply Voltage ISC SmartCard Supply Current 20 mA Current Overload Detection 100(1) mA IOVDET 1.65 17/29 ST7LCR Table 16. Smartcard supply supervisor electrical characteristics (continued) Symbol Parameter Conditions tIDET Detection time on Current Overload tOFF VCRDVCC Turn off Time CLOADmax ≤ 4.7uF tON VCRDVCC Turn on Time CLOADmax ≤ 4.7uF Min Typ Max Unit 1400(1) µs 750 µs 150 500 µs 170(1) Smartcard CLKPin VOL Output Low Level Voltage I=-50uA - - 0.4(1) V VOH Output High Level Voltage I=50uA VCRDVCC0.5(1) - - V TOHL Output H-L Fall Time(1) Cl=30pF - 20 ns TOLH Output L-H Rise Time(1) Cl=30pF - 20 ns - 1 % 45 55 % -0.25 0.4 V VCRDVCC-0.5 VCRDVCC+0.2 5 V FVAR Frequency FDUTY Duty variation(1) cycle(1) perturbation(1) POL Signal low POH Signal high perturbation(1) ISGND Short-circuit to Ground(1) 15 mA Smartcard I/O Pin Input Low Level Voltage - - 0.5(1) V VIH Input High Level Voltage 0.6VCRDVCC(1) - - V VOL Output Low Level Voltage I=-0.5mA - - 0.4 (1) I=20uA 0.8VCRDVCC(1) - VSS<VIN<VSC_PWR -10 - 10 µA 24 30 kΩ VIL VOH IL Output High Level Voltage Input Leakage Current (1) VCRDVCC V (1) V IRPU Pull-up Equivalent Resistance VIN=VSS TOHL Output H-L Fall Time(1) Cl=30pF - 0.8 µs TOLH (1) Cl=30pF - 0.8 µs ISGND Output L-H Rise Time Short-circuit to Ground(1) 15 mA Smartcard RST C4 and C8 Pin VOL Output Low Level Voltage I=-0.5mA - - 0.4(1) V VOH Output High Level Voltage I=20uA VCRDVCC0.5(1) - VCRDVCC(1) V TOHL Output H-L Fall Time(1) Cl=30pF - 0.8 µs TOLH Time(1) Cl=30pF - 0.8 µs ISGND Output L-H Rise Short-circuit to Ground(1) 1. Data based on characterization results, not tested in production. 18/29 15 mA ST7LCR 4.7 EMC characteristics Susceptibility tests are performed on a sample basis during product characterization. 4.7.1 Functional EMS (electromagnetic susceptibility) Based on a simple running application on the product (toggling 2 LEDs through I/O ports), the product is stressed by two electromagnetic events until a failure occurs (indicated by the LEDs). ● ESD: electrostatic discharge (positive and negative) is applied on all pins of the device until a functional disturbance occurs. This test conforms with the IEC 1000-4-2 standard. ● FTB: A Burst of Fast Transient voltage (positive and negative) is applied to VDD and VSS through a 100pF capacitor, until a functional disturbance occurs. This test conforms with the IEC 1000-4-4 standard. A device reset allows normal operations to be resumed. The test results are given in the table below based on the EMS levels and classes defined in application note AN1709. Designing hardened software to avoid noise problems EMC characterization and optimization are performed at component level with a typical application environment and simplified MCU software. It should be noted that good EMC performance is highly dependent on the user application and the software in particular. Therefore it is recommended that the user applies EMC software optimization and prequalification tests in relation with the EMC level requested for his application. ● Software recommendations The software flowchart must include the management of runaway conditions such as: ● – Corrupted program counter – Unexpected reset – Critical Data corruption (control registers...) Prequalification trials Most of the common failures (unexpected reset and program counter corruption) can be reproduced by manually forcing a low state on the Reset pin or the Oscillator pins for 1 second. To complete these trials, ESD stress can be applied directly on the device, over the range of specification values. When unexpected behavior is detected, the software can be hardened to prevent unrecoverable errors occurring (see application note AN1015). Table 17. EMS characteristics Symbol Parameter Conditions Level/ Class VFESD Voltage limits to be applied on any I/O pin to induce a functional disturbance VDD=5 V, TA=+25 °C, fOSC=8 MHz conforms to IEC 1000-4-2 2B VFFTB Fast transient voltage burst limits to be applied through 100 pF on VDD and VDD pins to induce a functional disturbance VDD=5 V, TA=+25 °C, fOSC=8 MHz conforms to IEC 1000-4-4 4B 19/29 ST7LCR 4.7.2 Electromagnetic interference (EMI) Based on a simple application running on the product (toggling 2 LEDs through the I/O ports), the product is monitored in terms of emission. This emission test is in line with the norm SAE J 1752/3 which specifies the board and the loading of each pin. Table 18. Symbol SEMI EMI characteristics Parameter Peak level Conditions VDD=5 V, TA=+25 °C, conforming to SAE J 1752/3 Monitored Frequency Band Max vs. [fOSC/fCPU](1) Unit 4/8MHz 4/4MHz 0.1 MHz to 30 MHz 19 18 30 MHz to 130 MHz 32 27 130 MHz to 1 GHz 31 26 SAE EMI Level 4 3.5 dBµV - 1. Data based on characterization results, not tested in production. 4.7.3 Absolute maximum ratings (electrical sensitivity) Based on three different tests (ESD, LU and DLU) using specific measurement methods, the product is stressed in order to determine its performance in terms of electrical sensitivity. For more details, refer to the application note AN1181. Electrostatic discharge (ESD) Electrostatic discharges (a positive then a negative pulse separated by 1 second) are applied to the pins of each sample according to each pin combination. The sample size depends on the number of supply pins in the device (3 parts*(n+1) supply pin). The Human Body Model is simulated. This test conforms to the JESD22-A114A standard. Table 19. Absolute maximum ratings Symbol Ratings Conditions Maximum value(1) Unit VESD(HBM) Electrostatic discharge voltage (Human body model) TA=+25 °C 2000 V 1. Data based on characterization results, not tested in production. Static and dynamic latch-up 20/29 ● LU: 3 complementary static tests are required on 10 parts to assess the latch-up performance. A supply overvoltage (applied to each power supply pin) and a current injection (applied to each input, output and configurable I/O pin) are performed on each sample. This test conforms to the EIA/JESD 78 IC latch-up standard. For more details, refer to the application note AN1181. ● DLU: Electrostatic discharges (one positive then one negative test) are applied to each pin of 3 samples when the micro is running to assess the latch-up performance in dynamic mode. Power supplies are set to the typical values, the oscillator is connected ST7LCR as near as possible to the pins of the micro and the component is put in reset mode. This test conforms to the IEC1000-4-2 and SAEJ1752/3 standards. For more details, refer to the application note AN1181. Table 20. Electrical sensitivities Symbol Parameter Conditions Class(1) LU Static latch-up class TA=+25°C A DLU Dynamic latch-up class VDD=5.5V, fOSC=4MHz,TA=+25°C A 1. Class description: A Class is an STMicroelectronics internal specification. All its limits are higher than the JEDEC specifications, that means when a device belongs to Class A it exceeds the JEDEC standard. B Class strictly covers all the JEDEC criteria (international standard). 4.8 Communication interface characteristics Table 21. USB DC electrical characteristics Parameter Symbol Conditions Min. Max. Unit Differential input sensitivity VDI I(D+, D-) 0.2 Differential common mode range VCM Includes VDI range 0.8 2.5 V Single ended receiver threshold VSE 1.3 2.0 V 0.3 V Input levels V Output levels Static output low VOL RL of 1.5 kΩ to 3.6 V(1) Static output high VOH RL of 15 kΩ to VSS(1) 2.8 3.6 V USBVCC: voltage level USBV VDD=5 V 3.00 3.60 V 1. RL is the load connected on the USB drivers. All the voltages are measured from the local ground potential. Figure 6. USB data signal rise and fall time Differential Data Lines Crossover points VCRS VSS tf tr 21/29 ST7LCR Table 22. USB full-speed electrical characteristics Parameter Symbol Conditions Min Max Unit Rise time(1) tr CL=50 pF 4 20 ns (1) tf CL=50 pF 4 20 ns Rise/ Fall time matching trfm tr/tf 90 110 % Output signal crossover voltage VCRS 1.3 2.0 V Driver characteristics Fall Time 1. Measured from 10% to 90% of the data signal. For more detailed informations, please refer to Chapter 7 (Electrical) of the USB specification (version 1.1). 22/29 ST7LCR 5 Package characteristics In order to meet environmental requirements, ST offers these devices in ECOPACK® package. The package has a lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 23/29 ST7LCR 5.1 Package mechanical data Figure 7. 24-lead very thin fine pitch quad flat no-lead 5x5 mm 0.65 mm pitch, package outline D ddd A3 e 24 19 K 1 18 E2 e b E 13 K2 6 L2 L 7 12 K2 A1 A D2 Y1_ME Table 23. 24-lead very thin fine pitch quad flat no-lead 5x5mm,0.65mm pitch, mechanical data inches(1) mm Dim. Min Typ Max Min Typ Max A 0.800 0.900 1.000 0.0315 0.0354 0.0394 A1 0.000 0.020 0.050 0.0000 0.0010 0.0020 A3 b 0.020 0.250 D D2 0.350 3.500 3.600 3.500 3.600 0.0118 0.0138 0.1969 3.700 0.1378 5.000 e 0.1417 0.1457 0.1969 3.700 0.1378 0.650 0.1417 0.1457 0.0256 L 0.350 0.450 0.550 0.0138 0.0177 0.0217 L2 0.870 0.875 0.880 0.0343 0.0344 0.0346 ddd 0.080 1. Values in inches are converted from mm and rounded to 4 decimal digits. 24/29 0.0098 5.000 E D2 0.300 0.0008 0.0031 ST7LCR Figure 8. Recommended reflow oven profile (MID JEDEC) 250 Tmax=220+/-5°C for 25 sec 200 Temp. [°C] 150 150 sec above 183°C 90 sec at 125°C 100 50 ramp down natural 2°C/sec max ramp up 2°C/sec for 50sec Time [s] 0 100 200 300 400 25/29 ST7LCR 6 Device configuration and ordering information Device ordering information and transfer of customer code Customer code is made up of the ROM contents and the list of the selected options (if any). The ROM contents are to be sent on diskette, or by electronic means, with the hexadecimal file in .S19 format generated by the development tool. All unused bytes must be set to FFh. The selected options are communicated to STMicroelectronics using the correctly completed OPTION LIST appended. See Figure 9: ST7LCR option list. Refer to application note AN1635 for information on the counter listing returned by ST after code has been transferred. The STMicroelectronics Sales Organization will be pleased to provide detailed information on contractual points. Table 24. Ordering information Program memory (bytes) RAM (bytes) Package ST7LCRE4U1/xxx(1) 16K ROM 768 VFQFPN24 (1) 16K ROM 768 Die Sales type ST7LCRDIE6/xxx 1. Customer ROM code name is assigned by STMicroelectronics. 26/29 ST7LCR Figure 9. ST7LCR option list 67/&50,&52&21752//(5237,21/,67 /DVWXSGDWH2FWREHU &XVWRPHU $GGUHVV &RQWDFW 3KRQH1R 5HIHUHQFH520&RGH 7KH520FRGHQDPHLVDVVLJQHGE\670LFURHOHFWURQLFV 520FRGHPXVWEHVHQWLQ6IRUPDW+H[H[WHQVLRQFDQQRWEHSURFHVVHG 'HYLFH7\SH0HPRU\6L]H3DFNDJHFKHFNRQO\RQHRSWLRQ 520'HYLFH _ . 9)4)31 _ >@67/&5(8 ',( _ >@67/&5',( &RQGLWLRQLQJFKHFNRQO\RQHRSWLRQ 3DFNDJHG3URGXFW _ 'LH3URGXFW >@7UD\9)4)31SDFNDJHRQO\_ >@7DSH5HHO _ >@:DIIOHSDFN _ >@6DZQZDIHURQVWLFN\IRLO _ >@,QNHGZDIHU 6SHFLDO0DUNLQJ>@1R >@<HVBBBBBBBBBB $XWKRUL]HGFKDUDFWHUVDUHOHWWHUVGLJLWV DQGVSDFHVRQO\ 0D[LPXPFKDUDFWHUFRXQW9)4)31FKDUPD[BBBBBBBB 9FF&DUG&5'9&& >@9 >@9 :DWFKGRJ :'*6: >@6RIWZDUH$FWLYDWLRQ >@+DUGZDUH$FWLYDWLRQ 1HVWHG,QWHUUXSWV1(67 >@1HVWHG,QWHUUXSWV >@1RQ1HVWHG,QWHUUXSWV ,62&ORFN6RXUFH ,62&/. >@2VFLOODWRU >@'LYLGHU 1RRI5HWULHV 5(75< >@ >@ 5HDGRXW3URWHFWLRQ )03B5 >@'LVDEOHG >@(QDEOHG 'DWH6LJQDWXUH 27/29 ST7LCR 7 Revision history Table 25. Document revision history Date Revision 26-Aug-06 0.1 Initial release 0.2 QFN24 package added Option List added External clock source frequency modified (to maximum value), Section 4.2 Die sales type added to Table Note added to Table 2 (NC pins must be connected to ground) 26-Mar-07 23-Oct-2007 28/29 1 Changes Document reformatted. Replaced ST7LCR by ST7LCRE4U1and ST7LCRDIE6. ECOPACK text added. Changed “selectable card VCC” into “fixed card VCC”. 5 V removed in Section : Features, Section 3: ST7LCR implementation and Table 16: Smartcard supply supervisor electrical characteristics. Changed QFN24 into VFQFPN24. Added Figure 8: Recommended reflow oven profile (MID JEDEC). CRDC4 and CRDC8 renamed C4 and C8 respectively in Figure 1: ST7LCR block diagram. Removed LED functional block and LEDO pin from Figure 1: ST7LCR block diagram. LEDO pin left unconnected in Figure 2: 24lead VFQFPN package pinout and Table 2: Pin description, and Figure 3: Smartcard interface reference application - VFQFPN24 pin block diagram. Removed mention of external LEDS in Section 3.1: Functionality. SLEF and DIODE pins removed from Figure 1: ST7LCR block diagram, and left unconnected in Figure 2: 24-lead VFQFPN package pinout,Table 2: Pin description, and Figure 3: Smartcard interface reference application - VFQFPN24 pin block diagram. Removed LED pin characteristics table. Added Figure 8: Recommended reflow oven profile (MID JEDEC). Updated Figure 9: ST7LCR option list. ST7LCR Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. 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