BIC702C Bias Controlled Monolithic IC VHF/UHF RF Amplifier ADE-208-814D (Z) 5th. Edition Mar. 2001 Features • Bias Controlled Monolithic IC (No external DC biasing voltage on gate1.); To reduce using parts cost & PC board space. • High |yfs| ; |yfs| = 29 mS typ. ( f = 1kHz) • Low noise; NF = 1.0 dB typ. (at f = 200 MHz), NF = 1.6 dB typ. (at f = 900 MHz) • Withstanding to ESD; Build in ESD absorbing diode. Withstand up to 200V at C = 200pF, Rs = 0 conditions. • Provide mini mold package; CMPAK-4 (SOT-343mod) Outline CMPAK-4 2 3 1 4 Notes: 1. 2. 1. Source 2. Gate1 3. Gate2 4. Drain Marking is “BZ–”. BIC702C is individual type number of HITACHI BICMIC. BIC702C Absolute Maximum Ratings (Ta = 25°C) Item Symbol Ratings Unit Drain to source voltage VDS 6 V Gate1 to source voltage VG1S +6 –0 V Gate2 to source voltage VG2S +6 –0 V Drain current ID 30 mA Channel power dissipation Pch 100 mW Channel temperature Tch 150 °C Storage temperature Tstg –55 to +150 °C Electrical Characteristics (Ta = 25°C) Item Symbol Min Typ Max Unit Test Conditions Drain to source breakdown voltage V(BR)DSS 6 — — V I D = 200µA VG2S = 0,VG1 = open Gate1 to source breakdown voltage V(BR)G1SS +6 — — V I G1 =+10µA, VG2S = VDS = 0 Gate2 to source breakdown voltage V(BR)G2SS +6 — — V I G2 = +10µA, VG1S = VDS = 0 Gate2 to source cutoff current I G2SS — — +100 nA VG2S = +5V, V G1S = VDS = 0 Gate2 to source cutoff voltage VG2S(off) 0.5 0.7 1.0 V VDS = 5V, ID = 100µA VG1 = open Drain current I D(op) 10 13 16 mA VDS = 5V , VG2S = 4V VG1 = open Forward transfer admittance |yfs| 24 29 34 mS VDS = 5V, ID = 13mA VG2S =4V, f = 1kHz Input capacitance c iss 1.6 2.0 2.3 pF VDS = 5V, VG2S =4V Output capacitance c oss 0.7 1.1 1.5 pF VG1 = open Reverse transfer capacitance c rss — 0.02 0.05 pF f = 1MHz Power gain PG1 24 28.5 — dB VDS = 5V, VG2S =4V VG1 = open Noise figure NF1 — 1.0 1.5 dB f = 200MHz Power gain PG2 18 23 — dB VDS = 5V, VG2S =4V VG1 = open Noise figure NF2 — 1.6 2.2 dB f = 900MHz 2 BIC702C Test Circuits • DC Biasing Circuit for Operating Characteristic Items (ID(op), |yfs|, Ciss, Coss, Crss, NF, PG) VG1 VG2 Open Gate 2 Gate 1 Drain Source A ID • 200 MHz Power Gain, Noise Figure Test Circuit 1000p 1000p 47k VT VG2 VT 1000p 47k 1000p 47k BICMIC Output(50Ω) 1000p L2 Input(50Ω) L1 10p max 1000p 1000p 36p RFC 1SV70 1SV70 1000p VD Unit: : Resistance (Ω) Capacitance (F) L1 : φ1mm Enameled Copper Wire,Inside dia 10mm, 2Turns L2 : φ1mm Enameled Copper Wire,Inside dia 10mm, 2Turns RFC : φ1mm Enameled Copper Wire,Inside dia 5mm, 2Turns 3 BIC702C • 900 MHz Power Gain, Noise Figure Test Circuit VD VG2 C5 C4 R1 C3 R2 RFC D G2 Output L3 L4 G1 Input S L1 L2 C1 C1, C2 C3 C4, C5 R1 R2 C2 : : : : : Variable Capacitor (10pF MAX) Disk Capacitor (1000pF) Air Capacitor (1000pF) 47 kΩ 4.7 kΩ L2: L1: 10 3 3 8 10 26 (φ1mm Copper wire) Unit : mm 21 L4: L3: 18 10 10 7 7 29 RFC : φ1mm Copper wire with enamel 4turns inside dia 6mm 4 BIC702C Power Gain vs. Gate2 to Source Voltage 200 30 Power Gain PG (dB) Channel Power Dissipation Pch (mW) Maximum Channel Power Dissipation Curve 150 100 50 25 20 15 10 5 0 50 100 150 Ambient Temperature 0 1 200 Ta (°C) 4 V DS = 5 V V G1 = open f = 200 MHz 2 1 Power Gain PG (dB) 30 3 0 1 3 Power Gain vs. Gate2 to Source Voltage 5 4 2 Gate2 to Source Voltage V G2S (V) Noise Figure vs. Gate2 to Source Voltage Noise Figure NF (dB) V DS = 5 V V G1 = open f = 200 MHz 25 20 15 10 5 4 2 3 Gate2 to Source Voltage V G2S (V) 0 1 V DS = 5 V V G1 = open f = 900 MHz 4 2 3 Gate2 to Source Voltage V G2S (V) 5 BIC702C Power Gain vs. Drain to Source Voltage Noise Figure vs. Gate2 to Source Voltage 4 30 V DS = 5 V V G1 = open f = 900 MHz 3 2 1 0 1 25 Power Gain PG (dB) Noise Figure NF (dB) 5 20 15 10 VG2S = 4 V V G1 = open f = 200 MHz 5 0 1 4 2 3 Gate2 to Source Voltage V G2S (V) 2 3 4 5 6 7 Drain to Source Voltage V DS (V) Noise Figure vs. Drain to Source Voltage Power Gain vs. Drain to Source Voltage 30 VG2S = 4 V V G1 = open f = 200 MHz 3 2 1 Power Gain PG (dB) Noise Figure NF (dB) 4 25 20 15 10 VG2S = 4 V V G1 = open f = 900 MHz 5 0 6 1 2 3 4 5 6 7 Drain to Source Voltage V DS (V) 0 1 2 3 4 5 Drain to Source Voltage 6 V DS (V) 7 BIC702C 0 Gain Reduction GR (dB) 4 Noise Figure NF (dB) Gain Reduction vs. Gate2 to Source Voltage Noise Figure vs. Drain to Source Voltage 3 2 1 0 VG2S = 4 V V G1 = open f = 900 MHz 10 20 40 50 2 3 4 Drain to Source Voltage 5 6 7 V DS (V) 3 2 1 0 Input Capacitance vs. Gate2 to Source Voltage 0 4 Input Capacitance Ciss (pF) Gain Reduction GR (dB) 4 Gate2 to Source Voltage V G2S (V) Gain Reduction vs. Gate2 to Source Voltage 10 20 V DS = 5 V V G1 = open V G2S = 4 V f = 900 MHz 30 40 50 V DS = 5 V V G1 = open V G2S = 4 V f = 200 MHz 30 4 3 2 1 0 Gate2 to Source Voltage V G2S (V) 3 2 V DS = 4 V V G1 = open f = 1 MHz 1 0 1 2 3 4 Gate2 to Source Voltage V G2S (V) 7 BIC702C S21 Parameter vs. Frequency S11 Parameter vs. Frequency .8 1 .6 90° 1.5 Scale: 1 / div. 60° 120° 2 .4 3 30° 150° 4 5 .2 10 .2 0 .4 .6 .8 1 1.5 2 3 45 10 180° 0° -10 -5 -4 - .2 -3 - .4 - 30° - 150° -2 - .6 - .8 -1 - 60° - 120° - 1.5 - 90° Test Condition: VDS = 5 V , VG1 = open VG2S = 4 V , Zo = 50 Ω 50 to 1000 MHz (50 MHz step) Test Condition: VDS = 5 V , VG1 = open VG2S = 4 V , Zo = 50 Ω S12 Parameter vs. Frequency S22 Parameter vs. Frequency 90° 50 to 1000 MHz (50 MHz step) Scale: 0.004/ div. .8 60° 120° 1 .6 1.5 2 .4 3 30° 150° 4 5 .2 10 180° 0° .2 0 .4 .6 .8 1 1.5 2 3 45 10 -10 -5 -4 - .2 - 30° - 150° -3 - .4 - 60° - 120° - 90° Test Condition: VDS = 5 V , VG1 = open VG2S = 4 V , Zo = 50 Ω 50 to 1000 MHz (50 MHz step) 8 -2 - .6 - .8 -1 - 1.5 Test Condition: VDS = 5 V , VG1 = open VG2S = 4 V , Zo = 50 Ω 50 to 1000 MHz (50 MHz step) BIC702C Sparameter (VDS = 5 V, VG2S = 4 V, VG1 = open, Zo = 50 Ω) S11 S21 S12 S22 f (MHz) MAG ANG MAG ANG MAG ANG MAG ANG 50 0.998 -3.3 2.80 175.9 0.00106 58.8 0.990 -2.4 100 0.993 -7.2 2.78 170.9 0.00171 75.7 0.992 -4.7 150 0.991 -10.9 2.77 166.1 0.00253 75.1 0.991 -7.2 200 0.984 -15.0 2.74 161.2 0.00356 77.4 0.987 -9.6 250 0.978 -19.0 2.72 156.5 0.00442 78.2 0.985 -12.2 300 0.970 -22.8 2.68 151.8 0.00485 80.0 0.982 -14.7 350 0.958 -26.7 2.64 147.2 0.00576 74.7 0.978 -17.1 400 0.954 -30.3 2.60 142.7 0.00642 71.7 0.973 -19.6 450 0.945 -33.8 2.56 138.6 0.00689 73.3 0.968 -22.0 500 0.932 -37.5 2.50 134.1 0.00712 71.8 0.963 -24.2 550 0.920 -40.6 2.46 129.8 0.00765 70.7 0.958 -26.7 600 0.910 -44.3 2.41 125.7 0.00804 69.9 0.952 -28.9 650 0.900 -47.5 2.37 121.6 0.00798 69.1 0.947 -31.3 700 0.887 -50.9 2.31 117.8 0.00787 67.8 0.942 -33.4 750 0.870 -54.4 2.27 113.6 0.00785 70.8 0.936 -35.8 800 0.863 -57.6 2.22 110.0 0.00758 73.3 0.929 -37.9 850 0.853 -60.9 2.18 105.8 0.00721 75.2 0.924 -40.3 900 0.839 -63.6 2.12 102.2 0.00694 75.8 0.917 -42.5 950 0.827 -66.5 2.07 98.6 0.00716 88.1 0.912 -44.5 1000 0.819 -70.1 2.04 94.9 0.00667 92.7 0.906 -46.7 9 BIC702C Package Dimensions As of January, 2001 Unit: mm 0.1 0.3 +– 0.05 0.2 0.65 0.6 1.25 ± 0.2 0.9 ± 0.1 0.1 0.4 +– 0.05 0 – 0.1 0.425 0.1 0.3 +– 0.05 + 0.1 0.16– 0.06 2.1 ± 0.3 0.65 0.65 1.25 ± 0.1 0.1 0.3 +– 0.05 0.425 2.0 ± 0.2 1.3 ± 0.2 Hitachi Code JEDEC EIAJ Mass (reference value) 10 CMPAK-4(T) — Conforms 0.006 g BIC702C Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi’s sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products. Hitachi, Ltd. Semiconductor & Integrated Circuits. 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(Taipei Branch Office) 4/F, No. 167, Tun Hwa North Road, Hung-Kuo Building, Taipei (105), Taiwan Tel : <886>-(2)-2718-3666 Fax : <886>-(2)-2718-8180 Telex : 23222 HAS-TP URL : http://www.hitachi.com.tw Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower, World Finance Centre, Harbour City, Canton Road Tsim Sha Tsui, Kowloon, Hong Kong Tel : <852>-(2)-735-9218 Fax : <852>-(2)-730-0281 URL : http://www.hitachi.com.hk Copyright Hitachi, Ltd., 2000. All rights reserved. Printed in Japan. Colophon 2.0 11