DATA SHEET COMPOUND FIELD EFFECT POWER TRANSISTOR µPA1523B P-CHANNEL POWER MOS FET ARRAY SWITCHING INDUSTRIAL USE DESCRIPTION The µPA1523B is P-channel Power MOS FET Array that built PACKAGE DIMENSIONS in millimeters in 4 circuits designed for solenoid, motor and lamp driver. 4.0 26.8 MAX. FEATURES 10 • Full Mold Package with 4 Circuits 2.5 10 MIN. • –4 V driving is possible • Low On-state Resistance RDS(on)1 = 0.8 Ω MAX. (@VGS = –10 V, ID = –1 A) 1.4 0.5 ± 0.1 2.54 RDS(on)2 = 1.3 Ω MAX. (@VGS = –4 V, ID = –1 A) 1.4 0.6 ± 0.1 • Low Input Capacitance Ciss = 190 pF TYP. 1 2 3 4 5 6 7 8 910 ORDERING INFORMATION CONNECTION DIAGRAM Type Number Package µPA1523BH 10 Pin SIP 3 2 ABSOLUTE MAXIMUM RATINGS (TA = 25 ˚C) Drain to Source Voltage (VGS = 0) VDSS –60 Gate to Source Voltage (VDS = 0) VGSS(AC) ± Drain Current (DC) ID(DC) ± Drain Current (pulse) ID(pulse) *1 ± Total Power Dissipation PT1 *2 V 20 V 2.0 A/unit 8.0 A/unit 28 W Total Power Dissipation PT2 *3 3.5 W Channel Temperature TCH 150 ˚C Storage Temperature Tstg Single Avalanche Current IAS *4 –2.0 A Single Avalanche Energy EAS *4 0.4 mJ 5 4 7 6 9 8 1 10 ELECTRODE CONNECTION 2, 4, 6, 8 : Gate 3, 5, 7, 9 : Drain 1, 10 : Source –55 to + 150 ˚C *1 PW ≤ 10 µs, Duty Cycle ≤ 1% *2 4 Circuits, TC = 25 ˚C *3 4 Circuits, TA = 25 ˚C *4 Starting TCH = 25 ˚C, VDD = –30 V, VGS = –20 V → 0, RG = 25 Ω, L = 100 µH Build-in Gate Diodes are for protection from static electricity in handing. In case high voltage over VGSS is applied, please append gate protection circuits. The information in this document is subject to change without notice. Document No. G11331EJ1V0DS00 Date Published May 1996 P Printed in Japan © 1996 µ PA1523B ELECTRICAL CHARACTERISTICS (TA = 25 ˚C) TEST CONDITIONS Drain Leakage Current IDSS VDS = –60 V, VGS = 0 Gate Leakage Current IGSS VGS = 20 V, VDS = 0 MIN. TYP. MAX. UNIT –10 µA 10 µA –2.0 V ± Gate Cutoff Voltage VGS(off) VDS = –10 V, ID = –1.0 mA –1.0 Forward Transfer Admittance | Yfs | VDS = –10 V, ID = –1.0 A 0.8 Drain to Source ON-Resistance RDS(on)1 VGS = –10 V, ID = –1.0 A 0.5 0.8 Ω Drain to Source ON-Resistance RDS(on)2 VGS = –4.0 V, ID = –1.0 A 0.8 1.3 Ω VDS = –10 V, VGS = 0, f = 1.0 MHz 190 pF S Input Capacitance Ciss Output Capacitance Coss 115 pF Reverse Transfer Capacitance Crss 43 pF Turn-on Delay Time td(on) 8 ns 53 ns td(off) 400 ns tf 230 ns 10 nC Rise Time Turn-off Delay Time Fall Time tr ID = –1.0 A, VGS(on) = –10 V, . VDD = . –30 V, RL = 30 Ω Total Gate Charge QG Gate to Source Charge QGS 1.1 nC Gate to Drain Charge QGD 3.5 nC IF = 2.0 A, VGS = 0 1.0 V IF = 2.0 A, VGS = 0, di/dt = 50 A/µs 180 ns 250 nC Body Diode Forward Voltage 2 SYMBOL ± CHARACTERISTIC VF(S-D) Reverse Recovery Time trr Reverse Recovery Charge Qrr VGS = –10 V, ID = –2.0 A, VDD = –48 V µPA1523B Test Circuit 1 Avalanche Capability D.U.T. L RG = 25 Ω PG. VGS = –20 V → 0 50 Ω VDD BVDSS IAS VDS ID VDD Starting TCH Test Circuit 2 Switching Time D.U.T. RL RG RG = 10 Ω PG. VDD VGS Wave Form VGS 0 VGS(on) 10 % 90 % 90 % ID (—) 90 % 0 ID Wave Form VGS 0 ID 10 % td(on) t tr ton t = 1 µs Duty cycle ≤ 1 % 10 % td(off) tf toff Test Circuit 3 Gate Charge D.U.T. IG = 2 mA PG. 50 Ω RL VDD 3 µ PA1523B TYPICAL CHARACTERISTICS (TA = 25 ˚C) TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE Under Same dissipation in each circuit 3.0 PT - Total Power Dissipation - W PT - Total Power Dissipation - W 3.5 TOTAL POWER DISSIPATION vs. CASE TEMPERATURE 2.5 4 Circuits operation 2.0 3 Circuits operation ,, 2 Circuits operation 1.5 1 Circuit operation NEC µPA1523BH Lead Print Circuit Boad 1.0 0.5 0 50 100 150 4 Circuits operation 20 3 Circuits operation 2 Circuits operation 1 Circuit operation 10 0 50 100 150 TA - Ambient Temperature - ˚C TC - Case Temperature - ˚C FORWARD BIAS SAFE OPERATING AREA DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA –10 V) Pw ID(Pulse) = 10 s m s µ µs m 0 s D ipa C tio nL RD im TC = 25 ˚C Single Pulse –0.1 –0.1 10 1 0 –1.0 50 0 –1 = S ID(DC) VG d( Po ite we rD Lim n) iss o S( ite d –1.0 –10 dT - Percentage of Rated Power - % –100 ID - Drain Current - A Tc is grease Under Same Temperature dissipation in on back surface each circuit 30 –100 100 80 60 40 20 0 VDS - Drain to Source Voltage - V 20 40 60 80 100 120 140 160 TC - Case Temperature - ˚C FORWARD TRANSFER CHARACTERISTICS –8 –10 DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE –1 ID - Drain Current - A ID - Drain Current - A Pulsed –0.1 TA=125 ˚C 75 ˚C 25 ˚C –25 ˚C –0.01 –6 VGS = – 10 V –4 VGS = –4 V –2 Pulsed VDS = –10 V 0 –2 –4 –6 –8 VGS - Gate to Source Voltage - V 4 –10 0 –2 –4 VDS - Drain to Source Voltage - V –6 µPA1523B TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH rth(t) - Transient Thermal Resistance - ˚C/W 1 000 Rth(CH-A) 4ircuits 3ircuits 2ircuits 1ircuit 100 Rth(CH-C) 10 1.0 Single Pulse 0.1 100 µ 1m 10 m 100 m 1 10 100 1 000 | yfs | - Forward Transfer Admittance - S FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 100 VDS = –10 V Pulsed 10 TA = –25 ˚C 25 ˚C 75 ˚C 125 ˚C 1.0 0.1 –0.01 –0.1 –1.0 –10 DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 1.5 Pulsed ID = –2 A –1 A –0.4 A 1.0 0.5 0 –10 GATE TO SOURCE CUTOFF VOLTAGE vs. CHANNEL TEMPERATURE Pulsed 1 500 1 000 VGS = –4 V 500 VGS = –10 V 0 –0.1 –1.0 ID - Drain Current - A –20 VGS - Gate to Source Voltage - V DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT –10 VGS(off) - Gate to Source Cutoff Voltage - V RDS(on) - Drain to Source On-State Resistance - mΩ ID - Drain Current - A RDS(on) - Drain to Source On-State Resistance - Ω PW - Pulse Width - s VDS = –10 V ID = –1 mA –2 –1 0 –50 0 50 100 150 TCH - Channel Temperature - ˚C 5 SOURCE TO DRAIN DIODE FORWARD VOLTAGE DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 1600 VGS = –4 V 800 VGS = –10 V 400 0 –50 1.0 VGS = –2 V VGS=0 0.1 ID = –1 A 0 50 100 Pulsed 0 150 1.0 VSD - Source to Drain Voltage - V TCH - Channel Temperature - ˚C CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE Ciss 100 Coss Crss –1 –10 trr - Reverse Recovery time - ns tf 100 tr 10 td(on) VDD = –30 V VGS = –10 V RG = 10 Ω 1.0 –0.01 –100 –1.0 –0.1 –10 VDS - Drain to Source Voltage - V ID - Drain Current - A REVERSE RECOVERY TIME vs. DRAIN CURRENT DYNAMIC INPUT/OUTPUT CHARACTERISTICS 1 000 di/dt = 50A/ µ s VGS = 0 100 10 –0.1 td(off) td(on), tr, td(off), tf - Switching Time - ns 1 000 10 –0.1 –16 –80 ID = –2 A VGS –60 –40 –14 –12 –10 VDD = –12 V –30 V –48 V –8 –6 –4 –20 –2 VDS 0 –1.0 ID - Drain Current - A 6 SWITCHING CHARACTERISTICS 1 000 VGS = 0 f = 1 MHz VDS - Drain to Source Voltage - V Ciss, Coss, Crss - Capacitance - pF 10 000 2.0 –10 0 2 4 6 8 QG - Gate Charge - nC 10 12 VGS - Gate to Source Voltage - V 1200 10 ISD - Diode Forward Current - A RDS(on) - Drain to Source On-State Resistance - mΩ µ PA1523B µPA1523B SINGLE AVALANCHE ENERGY DERATING FACTOR SINGLE AVALANCHE CURRENT vs. INDUCTIVE LOAD 100 Energy Derating Factor - % IAS - Single Avalanche Current - A –10 IAS = –2 A EAS –1.0 =0 .4 m J –0.1 –0.1 VDD = –30 V VGS = –20 V → 0 RG = 25 Ω Starting TCH = 25 ˚C 10 µ 100 µ 10 m 1m L - Inductive Load - H VDD = –30 V RG = 25 Ω VGS = –20 V → 0 IAS ≤ 1.0 A 80 60 40 20 0 25 50 75 100 125 150 Starting TCH - Starting Channel Temperature - ˚C REFERENCE Document Name Document No. NEC semiconductor for device reliability/quality control system TEI-1202 Quality grade on NEC semiconductor devices IEI-1209 Semiconductor device mounting technology manual C10535E Semiconductor device package manual C10943X Guide to quality assurance for semiconductor devices MEI-1202 Semiconductor selection guide X10679E Power MOS FET features and application switching power supply TEA-1034 Application circuits using Power MOS FET TEA-1035 Safe operating area of Power MOS FET TEA-1037 7 µ PA1523B [MEMO] No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customer must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: “Standard“, “Special“, and “Specific“. The Specific quality grade applies only to devices developed based on a customer designated “quality assurance program“ for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices in “Standard“ unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact NEC Sales Representative in advance. Anti-radioactive design is not implemented in this product. M4 94.11