NEC UPA1723G

DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA1723
SWITCHING
N-CHANNEL POWER MOS FET
INDUSTRIAL USE
DESCRIPTION
PACKAGE DRAWING (Unit : mm)
The µPA1723 is N-Channel MOS Field Effect Transistor
8
5
designed for power management switch.
1,2,3 ; Source
; Gate
4
5,6,7,8 ; Drain
FEATURES
• Low on-state resistance
RDS(on)1 = 6.7 mΩ MAX. (VGS = 4.5 V, ID = 7.0 A)
0.05 MIN.
• Built-in G-S protection diode
• Small and surface mount package (Power SOP8)
4.4
5.37 MAX.
0.8
+0.10
–0.05
• Low Ciss : Ciss = 3800 pF TYP.
6.0 ±0.3
4
0.15
1.8 MAX.
RDS(on)3 = 8.7 mΩ MAX. (VGS = 2.5 V, ID = 7.0 A)
1.44
1
RDS(on)2 = 7.4 mΩ MAX. (VGS = 4.0 V, ID = 7.0 A)
0.5 ±0.2
0.10
1.27 0.78 MAX.
0.40
+0.10
–0.05
0.12 M
ORDERING INFORMATION
PART NUMBER
PACKAGE
µPA1723G
Power SOP8
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.)
Drain to Source Voltage (VGS = 0 V)
VDSS
20
V
Gate to Source Voltage (VDS = 0 V)
VGSS
±12
V
Drain Current (DC)
ID(DC)
±13
A
ID(pulse)
±52
A
PT
2.0
W
Channel Temperature
Tch
150
°C
Storage Temperature
Tstg
–55 to + 150
°C
Drain Current (pulse)
Note1
Total Power Dissipation (TA = 25°C)
Note2
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1 %
EQUIVALENT CIRCUIT
Drain
Body
Diode
Gate
Gate
Protection
Diode
Source
2
2. Mounted on ceramic substrate of 1200 mm x 2.2mm
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage exceeding
the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No.
G14026EJ1V0DS00 (1st edition)
Date Published December 1999 NS CP(K)
Printed in Japan
The mark ★ shows major revised points.
©
1998, 1999
µ PA1723
ELECTRICAL CHARACTERISTICS (TA = 25 °C, All terminals are connected.)
CHARACTERISTICS
SYMBOL
Drain to Source On-state Resistance
MIN.
TYP.
MAX.
UNIT
RDS(on)1
VGS = 4.5 V, ID = 7.0 A
5.4
6.7
mΩ
RDS(on)2
VGS = 4.0 V, ID = 7.0 A
5.5
7.4
mΩ
RDS(on)3
VGS = 2.5 V, ID = 7.0 A
6.5
8.7
mΩ
VGS(off)
VDS = 10 V, ID = 1 mA
0.5
0.9
1.5
V
Forward Transfer Admittance
| yfs |
VDS = 10 V, ID = 7.0 A
15.0
32
Drain Leakage Current
IDSS
VDS = 20 V, VGS = 0 V
10
µA
Gate to Source Leakage Current
IGSS
VGS = ±12 V, VDS = 0 V
±10
µA
Input Capacitance
Ciss
VDS = 10 V
3800
pF
Output Capacitance
Coss
VGS = 0 V
1200
pF
Reverse Transfer Capacitance
Crss
f = 1 MHz
700
pF
Turn-on Delay Time
td(on)
ID = 7.0 A
70
ns
VGS(on) = 4.5 V
440
ns
td(off)
VDD = 10 V
230
ns
tf
RG = 10 Ω
300
ns
Total Gate Charge
QG
ID = 13 A
47.0
nC
Gate to Source Charge
QGS
VDD = 16 V
11.0
nC
Gate to Drain Charge
QGD
VGS = 4.5 V
12.0
nC
VF(S-D)
IF = 13.0 A, VGS = 0 V
0.75
V
Reverse Recovery Time
trr
IF = 13.0 A, VGS = 0 V
68
ns
Reverse Recovery Charge
Qrr
di/dt = 100 A/ µs
70
nC
Gate to Source Cut-off Voltage
★
TEST CONDITIONS
Rise Time
tr
Turn-off Delay Time
Fall Time
Body Diode Forward Voltage
TEST CIRCUIT 1 SWITCHING TIME
TEST CIRCUIT 2 GATE CHARGE
D.U.T.
D.U.T.
RL
RG
RG = 10 Ω
PG.
VGS
VGS
Wave Form
0
PG.
VDD
ID
90 %
90 %
10 %
0 10 %
Wave Form
τ = 1µ s
Duty Cycle ≤ 1 %
tr
td(on)
ton
IG = 2 mA
RL
50 Ω
VDD
90 %
ID
τ
2
VGS(on)
10 %
ID
VGS
0
S
td(off)
tf
toff
Data Sheet G14026EJ1V0DS00
µ PA1723
★ TYPICAL CHARACTERISTICS (TA = 25 °C)
FORWARD TRANSFER CHARACTERISTICS
100
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
Pulsed
ID - Drain Current - A
ID - Drain Current - A
Pulsed
50
10
TA = 125˚C
75˚C
25˚C
-25˚C
1
40
30
VGS = 4.5 V
20
VGS = 4.0 V
VGS = 2.5 V
10
VDS = 10 V
4
3
0.1
1
0
2
0
0.0
10
8
4
VGS = 2.5 V
VGS = 4.0 V
VGS = 4.5 V
2
0
− 100
− 50
0
50
100
150
Tch - Channel Temperature - ˚C
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
10
Pulsed
8
VGS = 2.5 V
6
VGS = 4.0 V
VGS = 4.5 V
4
2
0
0.1
1
10
100
RDS(on) - Drain to Source On-state Resistance - mΩ
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
6
0.1
0.2
0.4
0.3
VDS - Drain to Source Voltage - V
VGS(off) - Gate to Source Cut-off Voltage - V
RDS(on) - Drain to Source On-state Resistance - mΩ
RDS(on) - Drain to Source On-state Resistance - mΩ
VGS - Gate to Source Voltage - V
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
10
Pulsed
ID = 3 A
8
ID = 6 A
6
4
2
0
0
5
10
VGS - Gate to Source Voltage - V
GATE TO SOURCE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
VDS = 10 V
ID = 1 mA
1.0
0.5
0.2
− 50
0
50
100
150
Tch - Channel Temperature - ˚C
ID - Drain Current - A
Data Sheet G14026EJ1V0DS00
3
µ PA1723
100
VDS =10 V
Pulsed
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
1 000
TC = 25˚C
TC = 75˚C
10
TC = 125˚C
1
0.1
0.1
Pulsed
TC = -25˚C
IF - Diode Forward Current - A
|yfs| - Forward Transfer Admittance - S
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
1
10
100
VGS = 4.0 V
VGS = 0 V
10
1
0.1
0.0
100
CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
Ciss
Coss
Crss
1
1.0
1.4
1.2
10
10 000
td(on), tr, td(off), tf - Switching Time - ns
Ciss, Coss, Crss - Capacitance - pF
10 000
100
0.1
0.8
SWITCHING CHARACTERISTICS
VGS = 0 V
f = 1 MHz
1 000
0.6
0.4
VSD - Source to Drain Voltage - V
ID- Drain Current - A
100 000
0.2
tr
1 000
tf
td(off)
100
10
1
100
td(on)
1
0.1
VDS - Drain to Source Voltage - V
10
VDS = 10 V
VGS = 4.5 V
RG = 10 Ω
100
ID - Drain Current - A
trr - Reverse Recovery Time - ns
1 000
di/dt = 100A/µs
VGS = 0 V
100
10
1
0.1
VDS - Drain to Source Voltage - V
REVERSE RECOVERY TIME vs.
DRAIN CURRENT
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
12
30
ID = 10 A
25
10
20
8
VDD = 16 V
10 V
4V
15
VGS
10
4
2
5
VDS
0
0
1
10
100
0
10
20
30
40
QG - Gate Charge - nC
ID - Drain Current - A
4
6
Data Sheet G14026EJ1V0DS00
50
60
VGS - Gate to Source Voltage - V
Remark
2
Mounted on ceramic substrate of 1200 mm x 2.2
mm
µ PA1723
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
PT - Total Power Dissipation - W
dT - Percentage of Rated Power - %
2.8
100
80
60
40
20
0
20
40
60
80
2.0
1.6
1.2
0.8
0.4
0
100 120 140 160
Mounted on ceramic
substrate of
1200 mm 2 ×2.2 mm
2.4
0
TA - Ambient Temperature - ˚C
20
40
60
80
100 120 140 160
TA - Ambient Temperature - ˚C
FORWARD BIAS SAFE OPERATING AREA
100
PW
1
m
=
s
10
13 A
10
0
µs
m
s
10
10
0
m
s
Po
we
rD
iss
ipa
tio
1
n
Lim
ite
d
Remark
2
Mounted on ceramic substrate of 1200 mm x 2.2 mm
TA = 25 ˚C
0.1 Single Pulse
0.1
1
10
100
VDS - Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1 000
rth(t) - Transient Thermal Resistance - ˚C/W
ID - Drain Current - A
ID(pulse) = 52 A
d
ite )
m V
Li .5
n) = 4
(o
S
S
RD V G
ID(DC) =
(@
Rth(ch-A) = 62.5˚C/W
100
10
1
0.1
0.01
0.001
Mounted on ceramic
substrate of 1200mm2 × 2.2mm
Single Pulse
10 µ
100 µ
1m
10 m
100 m
1
10
100
1 000
PW - Pulse Width - s
Data Sheet G14026EJ1V0DS00
5
µ PA1723
[MEMO]
6
Data Sheet G14026EJ1V0DS00
µ PA1723
[MEMO]
Data Sheet G14026EJ1V0DS00
7
µ PA1723
• The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
• No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
• NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from use of a device described herein or any other liability arising from use
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other
intellectual property rights of NEC Corporation or others.
• Descriptions of circuits, software, and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these circuits,
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parties arising from the use of these circuits, software, and information.
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the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
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customer designated "quality assurance program" for a specific application. The recommended applications of
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M7 98. 8