NEC UPA1756G

DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA1756
SWITCHING
N-CHANNEL POWER MOS FET
INDUSTRIAL USE
DESCRIPTION
This product is Dual N-Channel MOS Field Effect
Transistor designed for power management
application of notebook computers, and Li-ion
battery application.
PACKAGE DRAWING (Unit : mm)
8
5
1 ; Source 1
2 ; Gate 1
7, 8 ; Drain 1
FEATURES
3 ; Source 2
4 ; Gate 2
5, 6 ; Drain 2
PACKAGE
µ PA1756G
Power SOP8
6.0 ±0.3
4
4.4
0.8
0.15
+0.10
–0.05
5.37 Max.
0.05 Min.
ORDERING INFORMATION
PART NUMBER
1.44
1
1.8 Max.
• Dual MOS FET chips in small package
• 2.5-V gate drive type and low on-resistance
RDS(on)1 = 30 mΩ MAX. (VGS = 4.5 V, ID = 3.0 A)
RDS(on)2 = 40 mΩ MAX. (VGS = 2.5 V, ID = 3.0 A)
• Low Ciss Ciss = 800 pF TYP.
• Built-in G-S protection diode
• Small and surface mount package (Power SOP8)
1.27
0.40
0.5 ±0.2
0.10
0.78 Max.
+0.10
–0.05
0.12 M
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C)
Drain to Source Voltage (VGS = 0 V)
VDSS
20
V
Gate to Source Voltage (VDS = 0 V)
VGSS
±12.0
V
Drain Current (DC)
ID(DC)
±6.0
A
ID(pulse)
±24
A
Total Power Dissipation (1 unit)Note2
PT
1.7
W
Total Power Dissipation (2 unit)Note2
PT
2.0
W
Channel Temperature
Tch
150
°C
Storage Temperature
Tstg
−55 to +150
°C
Drain Current (Pulse)Note1
EQUIVALENT CIRCUIT
Drain
Body
Diode
Gate
Gate
Protection
Diode
Source
Notes 1. PW ≤ 10 µ s, Duty Cycle ≤ 1 %
2. TA = 25 °C, Mounted on ceramic substrate of 2000 mm2 x 1.1 mm
The diode connected between the gate and source of the transistor serves as a protector against ESD. When this
device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may
be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. D12909EJ1V0DS00 (1st edition)
Date Published February 1999 NS CP (K)
Printed in Japan
©
1999
µ PA1756
ELECTRICAL CHARACTERISTICS (TA = 25 °C)
CHARACTERISTICS
SYMBOL
Drain to Source On-state Resistance
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
RDS(on)1
VGS = 4.5 V, ID = 3.0 A
20.0
30
mΩ
RDS(on)2
VGS = 2.5 V, ID = 3.0 A
25.8
40
mΩ
VGS(off)
VDS = 10 V, ID = 1.0 mA
0.5
0.7
1.5
V
4.0
12
Gate to Source Cut-off Voltage
Forward Transfer Admittance
| yfs |
VDS = 10 V, ID = 3.0 A
Drain Leakage Current
IDSS
VDS = 20 V, VGS = 0 V
10
µA
Gate to Source Leakage Current
IGSS
VGS = ±12.0 V, VDS = 0 V
±10
µA
Input Capacitance
Ciss
VDS = 10 V
800
pF
Output Capacitance
Coss
VGS = 0 V
360
pF
Reverse Transfer Capacitance
Crss
f = 1 MHz
70
pF
Turn-on Delay Time
td(on)
ID = 3.0A
110
ns
VGS(on) = 4.0 V
425
ns
td(off)
VDD = 10 V
1050
ns
tf
RG = 10 Ω
1200
ns
Total Gate Charge
QG
ID = 6.0 A
11
nC
Gate to Source Charge
QGS
VDD = 16 V
2.0
nC
Gate to Drain Charge
QGD
VGS = 4.0 V
4.6
nC
IF = 6.0 A, VGS = 0 V
0.8
V
Rise Time
tr
Turn-off Delay Time
Fall Time
Body Diode Forward Voltage
VF(S-D)
TEST CIRCUIT 1 SWITCHING TIME
TEST CIRCUIT 2 GATE CHARGE
D.U.T.
D.U.T.
RL
RG
RG = 10 Ω
PG.
VGS
VGS
Wave Form
0
PG.
VDD
ID
90 %
90 %
10 %
0 10 %
Wave Form
τ = 1µ s
Duty Cycle ≤ 1 %
tr
td(on)
ton
IG = 2 mA
RL
50 Ω
VDD
90 %
ID
τ
2
VGS(on)
10 %
ID
VGS
0
S
td(off)
tf
toff
Data Sheet D12909EJ1V0DS00
µ PA1756
TYPICAL CHARACTERISTICS (TA = 25 °C)
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
rth(t) - Transient Thermal Resistance - ˚C/W
1 000
100
10
1
0.1
0.01
0.001
Mounted on ceramic
substrate of 2000mm 2 x 1.1mm
Single Pulse , 1 unit
10µ
100 µ
1m
10 m
100 m
1
10
100
1 000
100
VDS=10V
Pulsed
TA = -50 ˚C
-25 ˚C
25 ˚C
10
TA = 75 ˚C
125 ˚C
150 ˚C
1
0.1
1
10
100
RDS(on) - Drain to Source On-State Resistance - mΩ
ID- Drain Current - A
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
Pulsed
60
40
VGS=2.5V
VGS=4V
20
0
VGS=4.5V
1
10
100
VGS(off) - Gate to Source Cut-off Voltage - V
| yfs | - Forward Transfer Admittance - S
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
RDS(on) - Drain to Source On-State Resistance - mΩ
PW - Pulse Width - S
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
75
Pulsed
50
25
ID=3A
2
0
4
8
6
10
12
14
VGS - Gate to Source Voltage - V
GATE TO SOURCE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
1.0
VDS = 10 V
ID = 1 mA
0.5
0
ID - Drain Current - A
- 50
0
50
100
150
Tch - Channel Temperature -˚C
Data Sheet D12909EJ1V0DS00
3
RDS(on) - Drain to Source On-State Resistance - mΩ
µ PA1756
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
Pulsed
ISD - Diode Forward Current - A
VGS=2.5V
40
VGS=4V
30
VGS=4.5V
20
10
100
VGS=4V
10
VGS=2.5V
VGS=0V
1
0.1
ID= 3A
0
0
- 50
50
100
0
150
Tch - Channel Temperature -˚C
td(on), tr, td(off), tf - Switching Time - ns
Ciss, Coss, Crss - Capacitance - pF
SWITCHING CHARACTERISTICS
10 000
VGS = 0 V
f = 1 MHz
1 000
Ciss
Coss
100
Crss
10
0.1
1
10
100
tf
1 000
td(on)
10
0.1
4
VGS
10
2
VGS - Gate to Source Voltage - V
VDS - Drain to Source Voltage - V
6
VDD=16V
10V
4V
VDS
0
4
8
12
0
16
QG - Gate Charge - nC
4
tr
1
VDD =10V
VGS(on) = 4V
RG =10Ω
10
100
ID - Drain Current - A
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
8
40
ID= 6A
20
td(off)
100
VDS - Drain to Source Voltage - V
30
1.5
1.0
VSD - Source to Drain Voltage - V
CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
10 000
0.5
Data Sheet D12909EJ1V0DS00
µ PA1756
80
60
40
20
20
40
60
80
100 120 140 160
PT - Total Power Dissipation - W/package
100
0
2.8
Mounted on ceramic
substrate of
2000mm 2 x 1.1mm
2.4
2.0
2 unit
1 unit
1.6
1.2
0.8
0.4
0
20
40
60
80
100 120 140 160
TA - Ambient Temperature - ˚C
TA - Ambient Temperature - ˚C
FORWARD BIAS SAFE OPERATING AREA
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
100
ID - Drain Current - A
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
Mounted on ceramic
substrate of
2000mm x 1.1mm2 1unit
d
ite V)
ID(pulse)=24A
Lim 4.5
n)
o
=
(
S
S
RD t VG
(a
ID(DC)=6A
10
1
Pulsed
25
ID - Drain Current - A
dT - Percentage of Rated Power - %
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
m
s
10
m
s
10
0m
Po
s
we
rD
iss
1
DC
ipa
tio
n
Lim
ite
VGS=4V
20
VGS=4.5V
15
10
VGS=2.5V
5
d
TA = 25 ˚C
Single Pulse
0.1
0.1
1
10
100
0
VDS - Drain to Source Voltage - V
0.2
0.4
0.6
0.8
VDS - Drain to Source Voltage - V
FORWARD TRANSFER CHARACTERISTICS
ID - Drain Current - A
100
Pulsed
10
TA=150˚C
125˚C
1
75˚C
TA=25˚C
-25˚C
-50˚C
0.1
0
1
2
VDS=10V
3
VGS - Gate to Source Voltage - V
Data Sheet D12909EJ1V0DS00
5
µ PA1756
[MEMO]
6
Data Sheet D12909EJ1V0DS00
µ PA1756
[MEMO]
Data Sheet D12909EJ1V0DS00
7
µ PA1756
• The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
• No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
• NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from use of a device described herein or any other liability arising from use
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other
intellectual property rights of NEC Corporation or others.
• Descriptions of circuits, software, and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these circuits,
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parties arising from the use of these circuits, software, and information.
• While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
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"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
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M7 98. 8